Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180124232625.30105-1-richard.henderson@linaro.org
Subject: [Qemu-devel] [PATCH v3 00/45] hppa-softmmu
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
git config --local diff.renamelimit 0
git config --local diff.renames True
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
82de978a8b..834a336eb9 master -> master
t [tag update] patchew/20180124131315.30567-1-alex.bennee@linaro.org -> patchew/20180124131315.30567-1-alex.bennee@linaro.org
* [new tag] patchew/20180124232625.30105-1-richard.henderson@linaro.org -> patchew/20180124232625.30105-1-richard.henderson@linaro.org
Switched to a new branch 'test'
b99944c81d target/hppa: Implement PROBE for system mode
3af572c526 target/hppa: Fix 32-bit operand masks for 0E FCVT
07e8e53239 hw/hppa: Add MAINTAINERS entry
5ce6196a7b pc-bios: Add hppa-firmware.img and git submodule
a5f6d71bc3 hw/hppa: Implement DINO system board
0a021c31ca target/hppa: Enable MTTCG
78fc84282d target/hppa: Implement STWA
fc7ac055da target/hppa: Implement a pause instruction
59e0b0dfc5 target/hppa: Implement LDSID for system mode
427cda161a target/hppa: Fix comment
ac33014238 target/hppa: Increase number of temp regs
749bf4607e target/hppa: Use MMU_DEBUG_LOAD when reloading for CR[IIR]
ad66abd76f qom: Add MMU_DEBUG_LOAD
ab96c7dc94 target/hppa: Only use EXCP_DTLB_MISS
d701de4fc9 target/hppa: Implement B,GATE insn
817022de56 target/hppa: Add migration for the cpu
4f0d3489a1 target/hppa: Add system registers to gdbstub
5a48bce3ec target/hppa: Optimize for flat addressing space
6e79d150e6 target/hppa: Implement halt and reset instructions
5d244025ad target/hppa: Implement SYNCDMA insn
1287570da1 target/hppa: Implement LCI
d21a81fbb2 target/hppa: Implement LPA
6b044368cb target/hppa: Implement LDWA
9380959272 target/hppa: Implement P*TLB and P*TLBE insns
d32053d405 target/hppa: Implement I*TLBA and I*TLBP insns
9d25a6de7c target/hppa: Log unimplemented instructions
1affc34952 target/hppa: Implement the interval timer
db25bc4f01 target/hppa: Implement external interrupts
21cbd1150e target/hppa: Implement tlb_fill
0586d94c71 target/hppa: Implement IASQ
d57e1c4062 target/hppa: Avoid privilege level decrease during branches
a9dc542fcc target/hppa: Use space registers in data operations
8cf161b867 target/hppa: Implement unaligned access trap
92a252ebe6 target/hppa: Fill in hppa_cpu_do_interrupt/hppa_cpu_exec_interrupt
40ea019434 target/hppa: Implement rfi
0dbf97fb19 target/hppa: Adjust insn mask for mfctl, w
40b31dd70b target/hppa: Add control registers
53a773f7c2 target/hppa: Add space registers
c20c384026 target/hppa: Implement the system mask instructions
56cdabcccb target/hppa: Implement mmu_idx from IA privilege level
a7c6af1c7e target/hppa: Split address size from register size
0ef947e1f7 target/hppa: Define hardware exception types
1d2ec5df74 target/hppa: Disable gateway page emulation for system mode
4b896e5406 target/hppa: Define the rest of the PSW
bba2453869 target/hppa: Skeleton support for hppa-softmmu
=== OUTPUT BEGIN ===
Checking PATCH 1/45: target/hppa: Skeleton support for hppa-softmmu...
Checking PATCH 2/45: target/hppa: Define the rest of the PSW...
Checking PATCH 3/45: target/hppa: Disable gateway page emulation for system mode...
Checking PATCH 4/45: target/hppa: Define hardware exception types...
Checking PATCH 5/45: target/hppa: Split address size from register size...
Checking PATCH 6/45: target/hppa: Implement mmu_idx from IA privilege level...
Checking PATCH 7/45: target/hppa: Implement the system mask instructions...
Checking PATCH 8/45: target/hppa: Add space registers...
Checking PATCH 9/45: target/hppa: Add control registers...
Checking PATCH 10/45: target/hppa: Adjust insn mask for mfctl, w...
Checking PATCH 11/45: target/hppa: Implement rfi...
Checking PATCH 12/45: target/hppa: Fill in hppa_cpu_do_interrupt/hppa_cpu_exec_interrupt...
Checking PATCH 13/45: target/hppa: Implement unaligned access trap...
Checking PATCH 14/45: target/hppa: Use space registers in data operations...
Checking PATCH 15/45: target/hppa: Avoid privilege level decrease during branches...
Checking PATCH 16/45: target/hppa: Implement IASQ...
Checking PATCH 17/45: target/hppa: Implement tlb_fill...
ERROR: spaces prohibited around that ':' (ctx:WxW)
#25: FILE: target/hppa/cpu.h:172:
+ unsigned u : 1;
^
ERROR: spaces prohibited around that ':' (ctx:WxW)
#26: FILE: target/hppa/cpu.h:173:
+ unsigned t : 1;
^
ERROR: spaces prohibited around that ':' (ctx:WxW)
#27: FILE: target/hppa/cpu.h:174:
+ unsigned d : 1;
^
ERROR: spaces prohibited around that ':' (ctx:WxW)
#28: FILE: target/hppa/cpu.h:175:
+ unsigned b : 1;
^
ERROR: spaces prohibited around that ':' (ctx:WxW)
#29: FILE: target/hppa/cpu.h:176:
+ unsigned page_size : 4;
^
ERROR: spaces prohibited around that ':' (ctx:WxW)
#30: FILE: target/hppa/cpu.h:177:
+ unsigned ar_type : 3;
^
ERROR: spaces prohibited around that ':' (ctx:WxW)
#31: FILE: target/hppa/cpu.h:178:
+ unsigned ar_pl1 : 2;
^
ERROR: spaces prohibited around that ':' (ctx:WxW)
#32: FILE: target/hppa/cpu.h:179:
+ unsigned ar_pl2 : 2;
^
ERROR: spaces prohibited around that ':' (ctx:WxW)
#33: FILE: target/hppa/cpu.h:180:
+ unsigned entry_valid : 1;
^
ERROR: spaces prohibited around that ':' (ctx:WxW)
#34: FILE: target/hppa/cpu.h:181:
+ unsigned access_id : 16;
^
total: 10 errors, 0 warnings, 242 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 18/45: target/hppa: Implement external interrupts...
Checking PATCH 19/45: target/hppa: Implement the interval timer...
Checking PATCH 20/45: target/hppa: Log unimplemented instructions...
Checking PATCH 21/45: target/hppa: Implement I*TLBA and I*TLBP insns...
Checking PATCH 22/45: target/hppa: Implement P*TLB and P*TLBE insns...
Checking PATCH 23/45: target/hppa: Implement LDWA...
Checking PATCH 24/45: target/hppa: Implement LPA...
Checking PATCH 25/45: target/hppa: Implement LCI...
Checking PATCH 26/45: target/hppa: Implement SYNCDMA insn...
Checking PATCH 27/45: target/hppa: Implement halt and reset instructions...
Checking PATCH 28/45: target/hppa: Optimize for flat addressing space...
Checking PATCH 29/45: target/hppa: Add system registers to gdbstub...
Checking PATCH 30/45: target/hppa: Add migration for the cpu...
Checking PATCH 31/45: target/hppa: Implement B,GATE insn...
Checking PATCH 32/45: target/hppa: Only use EXCP_DTLB_MISS...
Checking PATCH 33/45: qom: Add MMU_DEBUG_LOAD...
Checking PATCH 34/45: target/hppa: Use MMU_DEBUG_LOAD when reloading for CR[IIR]...
Checking PATCH 35/45: target/hppa: Increase number of temp regs...
Checking PATCH 36/45: target/hppa: Fix comment...
Checking PATCH 37/45: target/hppa: Implement LDSID for system mode...
Checking PATCH 38/45: target/hppa: Implement a pause instruction...
Checking PATCH 39/45: target/hppa: Implement STWA...
Checking PATCH 40/45: target/hppa: Enable MTTCG...
Checking PATCH 41/45: hw/hppa: Implement DINO system board...
Checking PATCH 42/45: pc-bios: Add hppa-firmware.img and git submodule...
Checking PATCH 43/45: hw/hppa: Add MAINTAINERS entry...
Checking PATCH 44/45: target/hppa: Fix 32-bit operand masks for 0E FCVT...
Checking PATCH 45/45: target/hppa: Implement PROBE for system mode...
=== OUTPUT END ===
Test command exited with code: 1
---
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