[Qemu-devel] [PATCH v14 00/34] Generic translation framework

Richard Henderson posted 34 patches 74 weeks ago
Failed in applying to current master (apply log)
Test FreeBSD passed
Test checkpatch failed
Test docker passed
Test s390x passed
include/exec/exec-all.h       |   8 +-
include/exec/translator.h     | 141 +++++++++++++
target/arm/translate.h        |  39 ++--
accel/tcg/translate-all.c     |   2 +-
accel/tcg/translator.c        | 133 ++++++++++++
target/alpha/translate.c      |   5 +-
target/arm/translate-a64.c    | 288 +++++++++++++------------
target/arm/translate.c        | 481 +++++++++++++++++++++++-------------------
target/cris/translate.c       |  14 +-
target/hppa/translate.c       |   5 +-
target/i386/translate.c       | 299 +++++++++++++-------------
target/lm32/translate.c       |  10 +-
target/m68k/translate.c       |  12 +-
target/microblaze/translate.c |  10 +-
target/mips/translate.c       |   5 +-
target/moxie/translate.c      |   4 +-
target/nios2/translate.c      |  11 +-
target/openrisc/translate.c   |  10 +-
target/ppc/translate.c        |   5 +-
target/s390x/translate.c      |   8 +-
target/sh4/translate.c        |   5 +-
target/sparc/translate.c      |   5 +-
target/tilegx/translate.c     |   5 +-
target/tricore/translate.c    |   5 +-
target/unicore32/translate.c  |  12 +-
target/xtensa/translate.c     |   9 +-
accel/tcg/Makefile.objs       |   1 +
27 files changed, 936 insertions(+), 596 deletions(-)
create mode 100644 include/exec/translator.h
create mode 100644 accel/tcg/translator.c

[Qemu-devel] [PATCH v14 00/34] Generic translation framework

Posted by Richard Henderson 74 weeks ago
This is my take on Lluis' v13.  I've also written patches for
Alpha, SH4, and HPPA as examples of more complicated cases.
I have not included them here, but for the record:

  git://github.com/rth7680/qemu.git tgt-axp-2 tgt-sh4-2 tgt-pa

have the patches.  In the case of Alpha and SH4, there were
other dependencies not in tree.

Changes to the generic loop include

  * Move adjustment of max_insns from tb_start to init_disas_context.

  * Removed pc_next return from translate_insn.
    Just assign to that field from within the hook.

  * Removed tcg_check_temp_count from generic loop.

    It turns out that HPPA is not ameanable to this at all.
    There is in fact a temp that may be live between
    tb_start -> translate_insn and translate_insn -> tb_stop.

    I've added the check back to arm specifically, added a
    common function that can log the error, and use qem_log
    instead of error_report.

  * Moved gen_io_end to exactly match gen_io_start.
    I'm pretty sure this is what we always intended anyway.
    
  * Moved TB size/icount assignments before disas_log.

Changes to the ARM and i386 targets include

  * Tidy DisasJumpType usage wrt DISAS_NORETURN.

Changes to the ARM target include

  * Move the kernel magic page check after breakpoint checks.
    There's no reason why gdb couldn't attach in the magic page.
    This movement allows the insn_start hook to not be so weird
    generically.

  * Split out a separate thum translate_insn hook.
    There's a lot that T32 needs to do that A32 doesn't.

  * Reduce the number of end-of-TB checks in translate_insn.
    For A64 and A32, this means page crossing checks moved to
    init_disas_context.  Even T32 can have its single-step
    check moved.


r~


Lluís Vilanova (25):
  Pass generic CPUState to gen_intermediate_code()
  target: [tcg] Use a generic enum for DISAS_ values
  tcg: Add generic translation framework
  target/i386: [tcg] Port to DisasContextBase
  target/i386: [tcg] Port to init_disas_context
  target/i386: [tcg] Port to insn_start
  target/i386: [tcg] Port to breakpoint_check
  target/i386: [tcg] Port to translate_insn
  target/i386: [tcg] Port to tb_stop
  target/i386: [tcg] Port to disas_log
  target/i386: [tcg] Port to generic translation framework
  target/arm: [tcg] Port to DisasContextBase
  target/arm: [tcg] Port to init_disas_context
  target/arm: [tcg,a64] Port to init_disas_context
  target/arm: [tcg] Port to tb_start
  target/arm: [tcg] Port to insn_start
  target/arm: [tcg,a64] Port to insn_start
  target/arm: [tcg,a64] Port to breakpoint_check
  target/arm: [tcg] Port to translate_insn
  target/arm: [tcg,a64] Port to translate_insn
  target/arm: [tcg] Port to tb_stop
  target/arm: [tcg,a64] Port to tb_stop
  target/arm: [tcg] Port to disas_log
  target/arm: [tcg,a64] Port to disas_log
  target/arm: [tcg] Port to generic translation framework

Richard Henderson (9):
  tcg: Add generic DISAS_NORETURN
  target/i386: Use generic DISAS_* enumerators
  target/arm: Use DISAS_NORETURN
  target/arm: Delay check for magic kernel page
  target/arm: Set is_jmp properly after single-stepping
  target/arm: [a64] Move page and ss checks to init_disas_context
  target/arm: Move ss check to init_disas_context
  target/arm: Split out thumb_tr_translate_insn
  target/arm: Perform per-insn cross-page check only for Thumb

 include/exec/exec-all.h       |   8 +-
 include/exec/translator.h     | 141 +++++++++++++
 target/arm/translate.h        |  39 ++--
 accel/tcg/translate-all.c     |   2 +-
 accel/tcg/translator.c        | 133 ++++++++++++
 target/alpha/translate.c      |   5 +-
 target/arm/translate-a64.c    | 288 +++++++++++++------------
 target/arm/translate.c        | 481 +++++++++++++++++++++++-------------------
 target/cris/translate.c       |  14 +-
 target/hppa/translate.c       |   5 +-
 target/i386/translate.c       | 299 +++++++++++++-------------
 target/lm32/translate.c       |  10 +-
 target/m68k/translate.c       |  12 +-
 target/microblaze/translate.c |  10 +-
 target/mips/translate.c       |   5 +-
 target/moxie/translate.c      |   4 +-
 target/nios2/translate.c      |  11 +-
 target/openrisc/translate.c   |  10 +-
 target/ppc/translate.c        |   5 +-
 target/s390x/translate.c      |   8 +-
 target/sh4/translate.c        |   5 +-
 target/sparc/translate.c      |   5 +-
 target/tilegx/translate.c     |   5 +-
 target/tricore/translate.c    |   5 +-
 target/unicore32/translate.c  |  12 +-
 target/xtensa/translate.c     |   9 +-
 accel/tcg/Makefile.objs       |   1 +
 27 files changed, 936 insertions(+), 596 deletions(-)
 create mode 100644 include/exec/translator.h
 create mode 100644 accel/tcg/translator.c

-- 
2.9.4


Re: [Qemu-devel] [PATCH v14 00/34] Generic translation framework

Posted by no-reply@patchew.org 74 weeks ago
Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20170715094243.28371-1-rth@twiddle.net
Subject: [Qemu-devel] [PATCH v14 00/34] Generic translation framework
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]      patchew/20170710204521.2058-1-rth@twiddle.net -> patchew/20170710204521.2058-1-rth@twiddle.net
 * [new tag]         patchew/20170715094243.28371-1-rth@twiddle.net -> patchew/20170715094243.28371-1-rth@twiddle.net
Switched to a new branch 'test'
3f2e70e target/arm: Perform per-insn cross-page check only for Thumb
24e9350 target/arm: Split out thumb_tr_translate_insn
253dd0d target/arm: Move ss check to init_disas_context
9a77e52 target/arm: [a64] Move page and ss checks to init_disas_context
a6cbc9a target/arm: [tcg] Port to generic translation framework
3d38ce2 target/arm: [tcg, a64] Port to disas_log
eddb40e target/arm: [tcg] Port to disas_log
4c33728 target/arm: [tcg, a64] Port to tb_stop
6904495 target/arm: [tcg] Port to tb_stop
874d408 target/arm: [tcg, a64] Port to translate_insn
b6bd28d target/arm: [tcg] Port to translate_insn
d575933 target/arm: [tcg, a64] Port to breakpoint_check
d79e9e5 target/arm: [tcg, a64] Port to insn_start
a34da7a target/arm: [tcg] Port to insn_start
8e6770c target/arm: [tcg] Port to tb_start
f63f314 target/arm: [tcg, a64] Port to init_disas_context
c81fcd4 target/arm: [tcg] Port to init_disas_context
9749b3e target/arm: [tcg] Port to DisasContextBase
3b0e4b5 target/i386: [tcg] Port to generic translation framework
f9ed7a5 target/i386: [tcg] Port to disas_log
97fb814 target/i386: [tcg] Port to tb_stop
7ec9c0c target/i386: [tcg] Port to translate_insn
5b58ae7 target/i386: [tcg] Port to breakpoint_check
68bf26a target/i386: [tcg] Port to insn_start
6e70ea1 target/i386: [tcg] Port to init_disas_context
0c3d720 target/i386: [tcg] Port to DisasContextBase
2272588 tcg: Add generic translation framework
b5a537a target/arm: Set is_jmp properly after single-stepping
7fd4bd1 target/arm: Delay check for magic kernel page
23dbe85 target: [tcg] Use a generic enum for DISAS_ values
54b4f6d target/arm: Use DISAS_NORETURN
c2e1dc3 target/i386: Use generic DISAS_* enumerators
2900a33 tcg: Add generic DISAS_NORETURN
42d07ca Pass generic CPUState to gen_intermediate_code()

=== OUTPUT BEGIN ===
Checking PATCH 1/34: Pass generic CPUState to gen_intermediate_code()...
WARNING: line over 80 characters
#125: FILE: target/arm/translate.h:158:
+static inline void gen_intermediate_code_a64(CPUState *cpu, TranslationBlock *tb)

total: 0 errors, 1 warnings, 303 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 2/34: tcg: Add generic DISAS_NORETURN...
Checking PATCH 3/34: target/i386: Use generic DISAS_* enumerators...
Checking PATCH 4/34: target/arm: Use DISAS_NORETURN...
Checking PATCH 5/34: target: [tcg] Use a generic enum for DISAS_ values...
Checking PATCH 6/34: target/arm: Delay check for magic kernel page...
Checking PATCH 7/34: target/arm: Set is_jmp properly after single-stepping...
Checking PATCH 8/34: tcg: Add generic translation framework...
Checking PATCH 9/34: target/i386: [tcg] Port to DisasContextBase...
WARNING: line over 80 characters
#487: FILE: target/i386/translate.c:8513:
+                != ((dc->base.pc_next + TARGET_MAX_INSN_SIZE - 1) & TARGET_PAGE_MASK)

WARNING: line over 80 characters
#527: FILE: target/i386/translate.c:8551:
+        log_target_disas(cs, dc->base.pc_first, dc->base.pc_next - dc->base.pc_first,

total: 0 errors, 2 warnings, 478 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 10/34: target/i386: [tcg] Port to init_disas_context...
Checking PATCH 11/34: target/i386: [tcg] Port to insn_start...
Checking PATCH 12/34: target/i386: [tcg] Port to breakpoint_check...
Checking PATCH 13/34: target/i386: [tcg] Port to translate_insn...
Checking PATCH 14/34: target/i386: [tcg] Port to tb_stop...
Checking PATCH 15/34: target/i386: [tcg] Port to disas_log...
Checking PATCH 16/34: target/i386: [tcg] Port to generic translation framework...
Checking PATCH 17/34: target/arm: [tcg] Port to DisasContextBase...
WARNING: line over 80 characters
#55: FILE: target/arm/translate-a64.c:351:
+    if (s->base.singlestep_enabled || s->ss_active || (s->base.tb->cflags & CF_LAST_IO)) {

WARNING: line over 80 characters
#222: FILE: target/arm/translate-a64.c:11223:
+    dc->mmu_idx = core_to_arm_mmu_idx(env, ARM_TBFLAG_MMUIDX(dc->base.tb->flags));

ERROR: line over 90 characters
#278: FILE: target/arm/translate-a64.c:11289:
+                           included in [dc->base.tb->pc, dc->base.tb->pc + dc->base.tb->size) in order

WARNING: line over 80 characters
#291: FILE: target/arm/translate-a64.c:11301:
+        if (dc->base.num_insns == max_insns && (dc->base.tb->cflags & CF_LAST_IO)) {

ERROR: space required before the open parenthesis '('
#781: FILE: target/arm/translate.c:12096:
+        switch(dc->base.is_jmp) {

WARNING: line over 80 characters
#854: FILE: target/arm/translate.h:159:
+static inline void gen_intermediate_code_a64(DisasContextBase *db, CPUState *cpu,

total: 2 errors, 4 warnings, 762 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 18/34: target/arm: [tcg] Port to init_disas_context...
WARNING: line over 80 characters
#75: FILE: target/arm/translate.c:11810:
+    dc->mmu_idx = core_to_arm_mmu_idx(env, ARM_TBFLAG_MMUIDX(dc->base.tb->flags));

total: 0 errors, 1 warnings, 128 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 19/34: target/arm: [tcg, a64] Port to init_disas_context...
Checking PATCH 20/34: target/arm: [tcg] Port to tb_start...
Checking PATCH 21/34: target/arm: [tcg] Port to insn_start...
Checking PATCH 22/34: target/arm: [tcg, a64] Port to insn_start...
Checking PATCH 23/34: target/arm: [tcg, a64] Port to breakpoint_check...
Checking PATCH 24/34: target/arm: [tcg] Port to translate_insn...
Checking PATCH 25/34: target/arm: [tcg, a64] Port to translate_insn...
Checking PATCH 26/34: target/arm: [tcg] Port to tb_stop...
Checking PATCH 27/34: target/arm: [tcg, a64] Port to tb_stop...
Checking PATCH 28/34: target/arm: [tcg] Port to disas_log...
Checking PATCH 29/34: target/arm: [tcg, a64] Port to disas_log...
Checking PATCH 30/34: target/arm: [tcg] Port to generic translation framework...
Checking PATCH 31/34: target/arm: [a64] Move page and ss checks to init_disas_context...
Checking PATCH 32/34: target/arm: Move ss check to init_disas_context...
Checking PATCH 33/34: target/arm: Split out thumb_tr_translate_insn...
Checking PATCH 34/34: target/arm: Perform per-insn cross-page check only for Thumb...
=== OUTPUT END ===

Test command exited with code: 1


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