target-arm queue for rc2

[Qemu-devel] [PULL 0/5] target-arm queue for rc2

Peter Maydell posted 5 patches 6 years, 4 months ago

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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/1511199444-17922-1-git-send-email-peter.maydell@linaro.org

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include/hw/misc/aspeed_scu.h |  3 +++
hw/arm/aspeed.c              |  9 +++++++++
hw/arm/aspeed_soc.c          |  2 ++
hw/arm/xlnx-zcu102.c         |  7 +++++--
hw/intc/armv7m_nvic.c        |  2 +-
hw/misc/aspeed_scu.c         |  5 +++--
target/arm/helper.c          | 46 +++++++++++++++++++++++++++++++++++++++-----
7 files changed, 64 insertions(+), 10 deletions(-)

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[Qemu-devel] [PULL 0/5] target-arm queue for rc2

Posted by Peter Maydell 6 years, 4 months ago

A small set of bugfixes for rc2. (Some are patches I
should have put into rc1 but forgot about; oops.)

thanks
-- PMM


The following changes since commit b11ce33fe0266f8ede18cfcf961536f6a209b02b:

  Revert "cpu-exec: don't overwrite exception_index" (2017-11-20 10:58:27 +0000)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20171120

for you to fetch changes up to b350ae138fcb062f49904f5115cc5fe188a02906:

  hw/arm: Silence xlnx-ep108 deprecation warning during tests (2017-11-20 13:48:27 +0000)

----------------------------------------------------------------
target-arm queue:
 * hw/arm: Silence xlnx-ep108 deprecation warning during tests
 * hw/arm/aspeed: Unlock SCU when running kernel
 * arm: check regime, not current state, for ATS write PAR format
 * nvic: Fix ARMv7M MPU_RBAR reads
 * target/arm: Report GICv3 sysregs present in ID registers if needed

----------------------------------------------------------------
Joel Stanley (1):
      hw/arm/aspeed: Unlock SCU when running kernel

Peter Maydell (3):
      target/arm: Report GICv3 sysregs present in ID registers if needed
      nvic: Fix ARMv7M MPU_RBAR reads
      arm: check regime, not current state, for ATS write PAR format

Thomas Huth (1):
      hw/arm: Silence xlnx-ep108 deprecation warning during tests

 include/hw/misc/aspeed_scu.h |  3 +++
 hw/arm/aspeed.c              |  9 +++++++++
 hw/arm/aspeed_soc.c          |  2 ++
 hw/arm/xlnx-zcu102.c         |  7 +++++--
 hw/intc/armv7m_nvic.c        |  2 +-
 hw/misc/aspeed_scu.c         |  5 +++--
 target/arm/helper.c          | 46 +++++++++++++++++++++++++++++++++++++++-----
 7 files changed, 64 insertions(+), 10 deletions(-)

Re: [Qemu-devel] [PULL 0/5] target-arm queue for rc2

Posted by Peter Maydell 6 years, 4 months ago

On 20 November 2017 at 17:37, Peter Maydell <peter.maydell@linaro.org> wrote:
> A small set of bugfixes for rc2. (Some are patches I
> should have put into rc1 but forgot about; oops.)
>
> thanks
> -- PMM
>
>
> The following changes since commit b11ce33fe0266f8ede18cfcf961536f6a209b02b:
>
>   Revert "cpu-exec: don't overwrite exception_index" (2017-11-20 10:58:27 +0000)
>
> are available in the git repository at:
>
>   git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20171120
>
> for you to fetch changes up to b350ae138fcb062f49904f5115cc5fe188a02906:
>
>   hw/arm: Silence xlnx-ep108 deprecation warning during tests (2017-11-20 13:48:27 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * hw/arm: Silence xlnx-ep108 deprecation warning during tests
>  * hw/arm/aspeed: Unlock SCU when running kernel
>  * arm: check regime, not current state, for ATS write PAR format
>  * nvic: Fix ARMv7M MPU_RBAR reads
>  * target/arm: Report GICv3 sysregs present in ID registers if needed
>
> ----------------------------------------------------------------
> Joel Stanley (1):
>       hw/arm/aspeed: Unlock SCU when running kernel
>
> Peter Maydell (3):
>       target/arm: Report GICv3 sysregs present in ID registers if needed
>       nvic: Fix ARMv7M MPU_RBAR reads
>       arm: check regime, not current state, for ATS write PAR format
>
> Thomas Huth (1):
>       hw/arm: Silence xlnx-ep108 deprecation warning during tests

Applied, thanks.

-- PMM