[v1] OvmfPkg/RiscVVirt: Add CLANGDWARF toolchain support

[edk2-devel] [PATCH 0/4] OvmfPkg/RiscVVirt: Add CLANGDWARF toolchain support

Posted by Sunil V L 9 months, 4 weeks ago

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4478

This series adds support for building RiscVVirtQemu EDK2 using
CLANGDWARF toolchain. Adding this support helps people to use
the same toolchain to build EDK2 for different architectures.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc  Gerd Hoffmann <kraxel@redhat.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

Sunil V L (4):
  OvmfPkg/RiscVVirt: use 'auto' alignment and FIXED for XIP modules
  OvmfPkg/RiscVVirt: SecEntry: Remove unnecessary assembly directives
  BaseTools/tools_def: Add CLANGDWARF support for RISC-V
  OvmfPkg/RiscVVirt: Update README for CLANGDWARF support

 OvmfPkg/RiscVVirt/RiscVVirtQemu.fdf | 34 ++++++-------------
 BaseTools/Conf/tools_def.template   | 52 +++++++++++++++++++++++++++++
 OvmfPkg/RiscVVirt/README.md         | 28 ++++++++++++++--
 OvmfPkg/RiscVVirt/Sec/SecEntry.S    |  3 --
 4 files changed, 87 insertions(+), 30 deletions(-)

-- 
2.34.1



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Re: [edk2-devel] [PATCH 0/4] OvmfPkg/RiscVVirt: Add CLANGDWARF toolchain support

Posted by Ard Biesheuvel 9 months, 4 weeks ago

On Mon, 3 Jul 2023 at 10:08, Sunil V L <sunilvl@ventanamicro.com> wrote:
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4478
>
> This series adds support for building RiscVVirtQemu EDK2 using
> CLANGDWARF toolchain. Adding this support helps people to use
> the same toolchain to build EDK2 for different architectures.
>
> Cc: Rebecca Cran <rebecca@bsdio.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Bob Feng <bob.c.feng@intel.com>
> Cc: Yuwei Chen <yuwei.chen@intel.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc  Gerd Hoffmann <kraxel@redhat.com>
> Cc: Andrei Warkentin <andrei.warkentin@intel.com>
> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
>
> Sunil V L (4):
>   OvmfPkg/RiscVVirt: use 'auto' alignment and FIXED for XIP modules
>   OvmfPkg/RiscVVirt: SecEntry: Remove unnecessary assembly directives
>   BaseTools/tools_def: Add CLANGDWARF support for RISC-V
>   OvmfPkg/RiscVVirt: Update README for CLANGDWARF support
>

This looks good to me, although I am not an expert when it comes to
RISC-V specifics

Acked-by: Ard Biesheuvel <ardb@kernel.org>

Thanks a lot for this work - it will surely make my life a bit easier


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