From nobody Thu Dec 18 19:25:22 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 288FAC77B61 for ; Mon, 1 May 2023 16:19:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232643AbjEAQS5 (ORCPT ); Mon, 1 May 2023 12:18:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231229AbjEAQSx (ORCPT ); Mon, 1 May 2023 12:18:53 -0400 Received: from out203-205-221-192.mail.qq.com (out203-205-221-192.mail.qq.com [203.205.221.192]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4736E128 for ; Mon, 1 May 2023 09:18:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qq.com; s=s201512; t=1682957928; bh=qjJiyzBNBbUlf4yh42f8z12rbSe6xROgU/PEvKYl9WY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=zsdYFVH+eXgM1V4khs9DxIP/19Uscz+GnMj7CB+thDkHHFGvqKw8GfY51znpeFG7k OxM68HAlGswGg7sdFARFPqP8R3ZyT3U6PWkhEv3m1t7HeFTHRbS2OjyxGs1LAcAAhI ej3f3s4sqlyY15OW28iHYFA+wTwZIaxLjYK6/uP0= Received: from cyy-pc.lan ([2001:da8:c800:d084:c65a:644a:13d7:e72c]) by newxmesmtplogicsvrsza10-0.qq.com (NewEsmtp) with SMTP id 4A78EECC; Tue, 02 May 2023 00:18:39 +0800 X-QQ-mid: xmsmtpt1682957919tn47q1wz9 Message-ID: X-QQ-XMAILINFO: MmpliBmRb3iCy16tAaa39EEOagJjQ/rnxcLb/w1MiUhusue37gubn/ccZAhw6G roM8215nTTF3jNos8LmPBjZW0CUOzczJMEAx30b5eg1B9mFyJAkBxz8c/QH3qPkz3vZbUDrUb4mI qtp5jjj4V+Fl30GJmSaWo4p+Ip4nkaGvrWd9+NhSbIeYR3157oy8kOTAr9Y/Xc70PTU3tMlcUd5v U90AcX/zwxWIPS6+DyWPaovc7D6GoJSh1N9AULZpfutwGS9mYMMqlydWY0y5Hg3Iew8WzdOUrJBM nlaMjwGuXng93ZQ0fx3omZkVy4F5D/nxvZfDWY+PbnTbeibCwcoImujyW9/0Il72/1aAdi5IOLcX 6WNNpPk1ezubO/bvLQte1+iqX+ajJycr+b4649ZCrkBi1W/PlxYWmlPuJzwyypNDu/5j2W4zRGLC J6h90ijjtsEfm9WSxNd9Ae7+oAzuBUFJW0T0P59n9qpqosvJJ/CdDSen09wPOLH/ffmqa2Ctbjg+ x8olpSk2ndGcwjkHE5MPI63jPdi81k+tU7TYjR5iowMota7xdQGOBGYnZgQ76owSJGKKRy3XTLrN 44mtvMg7GyCb79bUKYSYFgdp7Ebbu+igBLCjdGpRBbrQiiOGGRtVBQq/0+NP4orBIka6XDkQ8OEB 5itRtcTNHUmSmCQeOVBDbQO5mlDLQOamciQYpnTRThh9/FL5fzNEuvtCgxw2E5WBGBKjBINOBysy V0HReKhIFa0EECUoQ5aStcL2CRRr6mN08ITB5F7TobII4dM8u2Vbtul/8fnIB+F6sEQiGNrl2FDi 3k5jJY3NtL+8PJAPfpBfr6kboIMbJ2XvFgOguqHZeC7Er7B7N86naNOznEAdTNorPD8P3g41EWE9 jJ0fJ4myt3jhRTSFrXHjlCsmJcmBM4jGk3hhy4P0ssPoWc898LrPB1JL8OS7t8OS1u0VV8AN9YJa aaIMDyiyWfkF1JvRmjFAf7EAxZKP7oz188IIA2gLNSOWujrMbVPdDQrheoW9OMSF+91vRC4Eg= From: Yangyu Chen To: Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Rob Herring , Krzysztof Kozlowski Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Jones , Wende Tan , Soha Jin , Hongren Zheng , Yangyu Chen , Conor Dooley Subject: [PATCH v3 1/2] riscv: allow case-insensitive ISA string parsing Date: Tue, 2 May 2023 00:17:38 +0800 X-OQ-MSGID: <20230501161739.152403-1-cyy@cyyself.name> X-Mailer: git-send-email 2.40.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" According to RISC-V Hart Capabilities Table (RHCT) description in UEFI Forum ECR, the format of the ISA string is defined in the RISC-V unprivileged specification which is case-insensitive. However, the current ISA string parser in the kernel does not support ISA strings with uppercase letters. This patch modifies the ISA string parser in the kernel to support case-insensitive ISA string parsing. Reviewed-by: Andrew Jones Reviewed-by: Conor Dooley Signed-off-by: Yangyu Chen --- arch/riscv/kernel/cpu.c | 3 ++- arch/riscv/kernel/cpufeature.c | 35 +++++++++++++++++----------------- 2 files changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 3df38052dcbd..f4dadbfecd04 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -4,6 +4,7 @@ */ =20 #include +#include #include #include #include @@ -42,7 +43,7 @@ int riscv_of_processor_hartid(struct device_node *node, u= nsigned long *hart) pr_warn("CPU with hartid=3D%lu has no \"riscv,isa\" property\n", *hart); return -ENODEV; } - if (isa[0] !=3D 'r' || isa[1] !=3D 'v') { + if (tolower(isa[0]) !=3D 'r' || tolower(isa[1]) !=3D 'v') { pr_warn("CPU with hartid=3D%lu has an invalid ISA of \"%s\"\n", *hart, i= sa); return -ENODEV; } diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 52585e088873..af2b468642a4 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -126,13 +126,10 @@ void __init riscv_fill_hwcap(void) } =20 temp =3D isa; -#if IS_ENABLED(CONFIG_32BIT) - if (!strncmp(isa, "rv32", 4)) + if (IS_ENABLED(CONFIG_32BIT) && !strncasecmp(isa, "rv32", 4)) isa +=3D 4; -#elif IS_ENABLED(CONFIG_64BIT) - if (!strncmp(isa, "rv64", 4)) + else if (IS_ENABLED(CONFIG_64BIT) && !strncasecmp(isa, "rv64", 4)) isa +=3D 4; -#endif /* The riscv,isa DT property must start with rv64 or rv32 */ if (temp =3D=3D isa) continue; @@ -156,13 +153,15 @@ void __init riscv_fill_hwcap(void) break; } fallthrough; + case 'S': case 'x': + case 'X': case 'z': + case 'Z': ext_long =3D true; /* Multi-letter extension must be delimited */ for (; *isa && *isa !=3D '_'; ++isa) - if (unlikely(!islower(*isa) - && !isdigit(*isa))) + if (unlikely(!isalnum(*isa))) ext_err =3D true; /* Parse backwards */ ext_end =3D isa; @@ -173,7 +172,7 @@ void __init riscv_fill_hwcap(void) /* Skip the minor version */ while (isdigit(*--ext_end)) ; - if (ext_end[0] !=3D 'p' + if (tolower(ext_end[0]) !=3D 'p' || !isdigit(ext_end[-1])) { /* Advance it to offset the pre-decrement */ ++ext_end; @@ -185,7 +184,7 @@ void __init riscv_fill_hwcap(void) ++ext_end; break; default: - if (unlikely(!islower(*ext))) { + if (unlikely(!isalpha(*ext))) { ext_err =3D true; break; } @@ -195,7 +194,7 @@ void __init riscv_fill_hwcap(void) /* Skip the minor version */ while (isdigit(*++isa)) ; - if (*isa !=3D 'p') + if (tolower(*isa) !=3D 'p') break; if (!isdigit(*++isa)) { --isa; @@ -209,18 +208,18 @@ void __init riscv_fill_hwcap(void) if (*isa !=3D '_') --isa; =20 -#define SET_ISA_EXT_MAP(name, bit) \ - do { \ - if ((ext_end - ext =3D=3D sizeof(name) - 1) && \ - !memcmp(ext, name, sizeof(name) - 1) && \ - riscv_isa_extension_check(bit)) \ - set_bit(bit, this_isa); \ - } while (false) \ +#define SET_ISA_EXT_MAP(name, bit) \ + do { \ + if ((ext_end - ext =3D=3D sizeof(name) - 1) && \ + !strncasecmp(ext, name, sizeof(name) - 1) && \ + riscv_isa_extension_check(bit)) \ + set_bit(bit, this_isa); \ + } while (false) \ =20 if (unlikely(ext_err)) continue; if (!ext_long) { - int nr =3D *ext - 'a'; + int nr =3D tolower(*ext) - 'a'; =20 if (riscv_isa_extension_check(nr)) { this_hwcap |=3D isa2hwcap[nr]; --=20 2.40.1 From nobody Thu Dec 18 19:25:22 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D98A0C77B61 for ; Mon, 1 May 2023 16:19:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232884AbjEAQTJ (ORCPT ); Mon, 1 May 2023 12:19:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232688AbjEAQTG (ORCPT ); Mon, 1 May 2023 12:19:06 -0400 Received: from out162-62-57-64.mail.qq.com (out162-62-57-64.mail.qq.com [162.62.57.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13CE8E61 for ; Mon, 1 May 2023 09:19:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qq.com; s=s201512; t=1682957939; bh=mXp6SRcjWPRCwi6nlesU+F55lVnmPqOB5ATTOwT5NWM=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=DBCIDQTKb1NSQ+gn4QF6NCTPVAMO2feE0q4HALY9pFqRDJIAE7DGGf+Zjo/XpqTbd IvzRmrdP4BLylmwVpUGiDgliJkVPXa3s2a2wZr8EVF8swkSGBgn9xUJ5w5qwEsj3kx SAL1zig+AruKzY8TrdBi8ZpNI8Bn2iFJU3TiDlWo= Received: from cyy-pc.lan ([2001:da8:c800:d084:c65a:644a:13d7:e72c]) by newxmesmtplogicsvrsza10-0.qq.com (NewEsmtp) with SMTP id 4A78EECC; Tue, 02 May 2023 00:18:39 +0800 X-QQ-mid: xmsmtpt1682957927t9od3563r Message-ID: X-QQ-XMAILINFO: MW5hkHoBpWXyzdhmgeaTiGdwAayVVBNizcyU1Jfob9MZjrC9CFbTPRnmCQIVCA baJDKCSZw/z8pNn+tVF9I/qytqEgyqxcUySgaCif5lWD9BXTtrUtbRSkGtzOmer++Av4Oihic5Of Ln0U2ZLwijgWnvk0pheO9ZJ1/doXtLUyYcUg9TQAgxvQEw12tU4caKmi6UADJByOohcBMMjQ55jz Qcw5j2EQH99Y1xlIkZp3fxQyL+qhLjLQDf5bj8S13TZEcYt17D1Pn25cFfRsvZT/DgAhmoaX/Jul 1idHVhKOYEqy/p3f4ZpPqsqHCi7F2F83rzS4ulr4rld8hnFwcHMmYcPD5zlYarAyWlYfBnlOWUNo ycTS2YTFY9mJP6lVvTCkZ8ul7CKqPHVHZ2Z0b6c1FYVOfTU6P694SLz3flyh+iPUmCnAuU4u1UAV elPMahYdm2b/GL+GL/5m1Cw275YpfYlLweieY1EZjo6vwTFSIhXZlBcF5XIZ6S94KqtDEIlnDVBK Lm6kBxK2XDbCiBP8yldxjJ4rs5FF9jPVsWQ1zOdSs6YWKmIw97WWqp4GmWwKol4wLjpmSGgDYIS9 TztSJrrbF4r+Kx4/jVUMSRK7WPMtvQxefMlDjiZYhzh699D7YKIq3sj/iO+oRnu0AYa735/9CJ3v ihuuRzES/+oIf4tzdMHQ3a/LcAyuhopvfd0AwXjvk5O/POfW/qR9xrVh2CdfORNfVTf+pxBIn8UM KNQ+oBQUlES1cVNX0UpzrTwYGZzwiqa3CYMqISzt71kz8SSBfkWYKwgc/JlPBdPdXNTcHUix318k H3pjaXZFwtmRgYT6jC2mlDN9i4srDTNe8ujw2CkuW5KOIGR30O9cGFDK2ijGgQxRBR7YjNlI4svX Os+QEanAavVhcIfd89w10DbFidhCmZvXMRxKAbbUmvMh6RHYL2ca68xdi+yQul0ZMig19Zz7C7Ms qZ+fdzZkuACVCScXunC8ArPOkAFsTGymvdlNi3HN5CqcUyajj/l4WJ6Obj5VGDHPNEIDS7LxA= From: Yangyu Chen To: Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Rob Herring , Krzysztof Kozlowski Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Jones , Wende Tan , Soha Jin , Hongren Zheng , Conor Dooley , Rob Herring , Yangyu Chen Subject: [PATCH v3 2/2] dt-bindings: riscv: drop invalid comment about riscv,isa lower-case reasoning Date: Tue, 2 May 2023 00:17:39 +0800 X-OQ-MSGID: <20230501161739.152403-2-cyy@cyyself.name> X-Mailer: git-send-email 2.40.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Conor Dooley "Ease of parsing" may have been the initial argument for keeping this string in lower-case, but parsers may have been written that expect lower-case only. For example, the one in released kernels currently does not behave correctly for multi-letter extensions that begin with a capital letter. Allowing upper-case here brings about no benefit but would break compatibility between new devicetrees and older kernels. Drop the comment to avoid confusing people. Signed-off-by: Conor Dooley Reviewed-by: Andrew Jones Acked-by: Rob Herring Signed-off-by: Yangyu Chen --- Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentat= ion/devicetree/bindings/riscv/cpus.yaml index 25d6e8dbffb8..7dd792e7bb45 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -88,7 +88,7 @@ properties: =20 While the isa strings in ISA specification are case insensitive, letters in the riscv,isa string must be all - lowercase to simplify parsing. + lowercase. $ref: "/schemas/types.yaml#/definitions/string" pattern: ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[= hsxz](?:[a-z])+)*$ =20 --=20 2.40.1