From nobody Thu Dec 25 18:13:10 2025 Received: from out203-205-221-191.mail.qq.com (out203-205-221-191.mail.qq.com [203.205.221.191]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2523101D2 for ; Sun, 14 Jan 2024 20:04:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=cyyself.name Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=cyyself.name Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=qq.com header.i=@qq.com header.b="hds7Os04" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qq.com; s=s201512; t=1705262364; bh=mIJ1kDf5bfgkPOpxk66bvJG+nTigHTLkaT19djw6SEo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=hds7Os04ZoOOx6f/YZHre5eeaAKqNosf35iZl34Am73oxjlXEuVvEwxXKKYfGC7yZ wxQDpwFIz/9cb7P2UMUjFPlHQlfCyRZfTJcIYqpqowdrLpA1K2EH7vw6ZpzZ5/E6o5 RbrBxT/Sw7p3Gl/yh1foYmH+hNTjdE5F4Rjdvdls= Received: from cyy-pc.lan ([2001:da8:c800:d084:c65a:644a:13d7:e72c]) by newxmesmtplogicsvrszc5-2.qq.com (NewEsmtp) with SMTP id ED316C15; Mon, 15 Jan 2024 03:59:19 +0800 X-QQ-mid: xmsmtpt1705262359t0vi5uqm6 Message-ID: X-QQ-XMAILINFO: MllZffuBkEb5+DdQxOt7Ebl9C7ZpFS3BPZWuIdJo03ot75wGberYlBdXLvqxY6 LulfA0H2Y/dabjKoWHWpsgLA7/7gerUxzhAHgqIslSLXqPWTyhIOz3ZWbxOs/ZvLolrj4lkt3Mh+ z/OB40WrVh9O03y5S1YSpKkpW8QbLdkerIhu45pjrA4f/p+YpWhq0LbN+GpO3Ke0L7VD6sQodYa5 p1p5K8RcszASdnff3Xeer5ay7abOg+I5ofA1F/9Fqn9eyUWmZn/h6pZliVvLwo5eetJ5QSv625bn CqiNRTdwF9X06DE95WZqhPrR9qWLCRmEksA4KapQwyVDT4XN7KHv4xaBWYvcIyY/HoFaJae6DLQh EUM2auf2Q9r214a+hsUC66NE/iH3TD0/jGNBxRIsFkLw1LtPbTLjB4418/pshgBdzLDX6Qyx1sF4 sTmjsHsV60oo4gnf4K8F44djtskkHLRrXkUuA1htNazrZLKpmj9lXuyE7KqYZ75Z4c7brS2CsDlN l42BiEfIy5bBsJvq+UzrqkYi3/UxcnrA7PY41m5IWAp249dLz4fL660VSphu/Oq3eKRDkNDrfjkO b9rUFL5DCWb3qcq6QTwrCQQv4T4TFn0tpJQNyRnHqoZ92KHOj0I834KptAfaeaa5MdR/45ifHWvt SOhguWhNPE4HAF5XDsvebkHMStgZvqBMDuXDiTDlysRxhbEQ0f1PFPuUjxt61UDpWpId+HleceKp VT1c/nkxtIdLx92witceCZgJqEJeUPw0Zp6/tLc/8++U5SenTF4quM3W1bCX2nVnNTVt6kaYY4LC rNI8lRnfE0xuAJ9jMvBgNSEtjzemxY8X/dTBsyFOm/zITeIg0mvhKIsDSpgotIlkCioQ6rF8xfcN AKFYOA5M0zODhKDUZ5ZJCaLAbhsizQS2WR+ag7OcAbK6CpuN4PSbVgYWI83XLGj5uS1XUDceERQ3 s2MDb0oIzhjf8CE295JtRrR28LMn2/NjYFzLbhdpDuhhr09ilrB9h17I4LFhLx6EmFNsPlVuv2y/ JFqZN/ZfSLwM4bTj5E X-QQ-XMRINFO: M/715EihBoGSf6IYSX1iLFg= From: Yangyu Chen To: linux-riscv@lists.infradead.org Cc: Charlie Jenkins , Paul Walmsley , Palmer Dabbelt , Albert Ou , Guo Ren , Andy Chiu , Conor Dooley , linux-kernel@vger.kernel.org, Yangyu Chen Subject: [PATCH 1/3] RISC-V: mm: fix mmap behavior in sv48 address space Date: Mon, 15 Jan 2024 03:58:30 +0800 X-OQ-MSGID: <20240114195832.275982-1-cyy@cyyself.name> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" A commit add2cc6b6515 ("RISC-V: mm: Restrict address space for sv39,sv48,sv57") from patch[1] restricts regular mmap return address in the sv48 space if the address hint is not above the sv48 userspace address. However, this commit treats the address wrong which only use sv48 if the hint address is above sv48 user address space. Actually, it should use sv48 if the address is above sv39 user address space. Moreover, the original patch code looks very complex in logic, we can simplify it with min marco. [1]. https://lore.kernel.org/r/20230809232218.849726-2-charlie@rivosinc.com Signed-off-by: Yangyu Chen --- arch/riscv/include/asm/processor.h | 39 ++++++------------------------ 1 file changed, 8 insertions(+), 31 deletions(-) diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/pr= ocessor.h index e1944ff0757a..7ead6a3e1f12 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -9,6 +9,7 @@ #include #include #include +#include =20 #include =20 @@ -18,37 +19,13 @@ #define DEFAULT_MAP_WINDOW (UL(1) << (MMAP_VA_BITS - 1)) #define STACK_TOP_MAX TASK_SIZE =20 -#define arch_get_mmap_end(addr, len, flags) \ -({ \ - unsigned long mmap_end; \ - typeof(addr) _addr =3D (addr); \ - if ((_addr) =3D=3D 0 || (IS_ENABLED(CONFIG_COMPAT) && is_compat_task())) \ - mmap_end =3D STACK_TOP_MAX; \ - else if ((_addr) >=3D VA_USER_SV57) \ - mmap_end =3D STACK_TOP_MAX; \ - else if ((((_addr) >=3D VA_USER_SV48)) && (VA_BITS >=3D VA_BITS_SV48)) \ - mmap_end =3D VA_USER_SV48; \ - else \ - mmap_end =3D VA_USER_SV39; \ - mmap_end; \ -}) - -#define arch_get_mmap_base(addr, base) \ -({ \ - unsigned long mmap_base; \ - typeof(addr) _addr =3D (addr); \ - typeof(base) _base =3D (base); \ - unsigned long rnd_gap =3D DEFAULT_MAP_WINDOW - (_base); \ - if ((_addr) =3D=3D 0 || (IS_ENABLED(CONFIG_COMPAT) && is_compat_task())) \ - mmap_base =3D (_base); \ - else if (((_addr) >=3D VA_USER_SV57) && (VA_BITS >=3D VA_BITS_SV57)) \ - mmap_base =3D VA_USER_SV57 - rnd_gap; \ - else if ((((_addr) >=3D VA_USER_SV48)) && (VA_BITS >=3D VA_BITS_SV48)) \ - mmap_base =3D VA_USER_SV48 - rnd_gap; \ - else \ - mmap_base =3D VA_USER_SV39 - rnd_gap; \ - mmap_base; \ -}) +#define arch_get_mmap_end(addr, len, flags) \ + ((addr) >=3D DEFAULT_MAP_WINDOW ? STACK_TOP_MAX :\ + min(DEFAULT_MAP_WINDOW, STACK_TOP_MAX)) + +#define arch_get_mmap_base(addr, base) \ + ((addr) >=3D DEFAULT_MAP_WINDOW ? base :\ + min(base, DEFAULT_MAP_WINDOW)) =20 #else #define DEFAULT_MAP_WINDOW TASK_SIZE --=20 2.43.0