From nobody Thu Apr 2 01:37:05 2026 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55258302163 for ; Mon, 30 Mar 2026 14:34:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774881267; cv=none; b=Ne8nA2/WEH0usYEB02Fv4sQ+Mrf6cUqCp9TGG4OhuEB393sFneO/VUVHwz2jfwKfmdINUH6S4LcpNhCExFgEeEH6lA/W8lExfwkRdVkGZMTdR7qq5m8TpYvnWFq5DLqSap0zkha7v4Ck/Tewdh/o+GLln+do+CcZ/AH88uEfAOA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774881267; c=relaxed/simple; bh=rz7p9jc3KEAU2CN3A3kTwST1nAH3niP9Qkjh2cBt8hs=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=JIv4XmWdvvc/S8reMQD/VXZkFSEb/0LnMWmDj22bUW0pw18jt8LmNEL2xZUx0cTYyeIk9JLuYfb5MmxhnwzIfWWlqzmLZYHjeAqLuk7btSO77sHGASyMsoMq2IZca6XtrNY32hbBA9qLxp+li4yzzg2XTEdghGopiTTYN5SvNa0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=bqODVTob; arc=none smtp.client-ip=185.70.43.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="bqODVTob" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1774881264; x=1775140464; bh=/GycTFJ6YqEM59YZ69bixAdyxP3vleuMSrnAsUVSYsk=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=bqODVTobwF3N4T/6S7/p96fZqjzSMu5rWm2pdBW2I4iSovnHKPTItXBAVK32LOEYQ Ib6movBqwFkcEIT7QGz0jYOVT22KwsByb6bLMu98YYD/G8TIaUe5XtPEv7M3I+9iaS MI4AIo+tcXmU9lolAEslzqynk5UPuiBuBTVBU3scHdUuV3KY/tpLTtl3uJhCxtcwGS 59gdNrLj34CrRg1GN4KqlBs8B1vVUhHVZxMGaTWwTCriKEi+rh2R/CPeSSfskk2f3F vtRULVkYr7zEX4+S/Zd14Ex/wzH1POtQKGmvpxMfAxpKoTIf4RnzIbA2BBGivs5l+D ZElRbcRFKw1ig== Date: Mon, 30 Mar 2026 14:34:19 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , Andrey Konovalov , linux-kernel@vger.kernel.org Subject: [PATCH v12 12/15] x86: Increase minimal SLAB alignment for KASAN Message-ID: In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 2b516d37f0e5df1f5405bae5c6e6e17b462357dd Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman 8 byte minimal SLAB alignment interferes with KASAN's granularity of 16 bytes. It causes a lot of out-of-bounds errors for unaligned 8 byte allocations. Compared to a kernel with KASAN disabled, the memory footprint increases because all kmalloc-8 allocations now are realized as kmalloc-16, which has twice the object size. But more meaningfully, when compared to a kernel with generic KASAN enabled, there is no difference. Because of redzones in generic KASAN, kmalloc-8' and kmalloc-16' object size is the same (48 bytes). So changing the minimal SLAB alignment of the tag-based mode doesn't have any negative impact when compared to the other software KASAN mode. Adjust x86 minimal SLAB alignment to match KASAN granularity size. Signed-off-by: Maciej Wieczor-Retman Reviewed-by: Andrey Konovalov --- Changelog v9: - Rename patch title so it fits the tip standards. Changelog v6: - Add Andrey's Reviewed-by tag. Changelog v4: - Extend the patch message with some more context and impact information. Changelog v3: - Fix typo in patch message 4 -> 16. - Change define location to arch/x86/include/asm/cache.c. arch/x86/include/asm/cache.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h index 69404eae9983..3232583b5487 100644 --- a/arch/x86/include/asm/cache.h +++ b/arch/x86/include/asm/cache.h @@ -21,4 +21,8 @@ #endif #endif =20 +#ifdef CONFIG_KASAN_SW_TAGS +#define ARCH_SLAB_MINALIGN (1ULL << KASAN_SHADOW_SCALE_SHIFT) +#endif + #endif /* _ASM_X86_CACHE_H */ --=20 2.53.0