From nobody Fri Dec 26 17:49:08 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6161863C for ; Wed, 3 Jan 2024 00:31:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="toCVBpww" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C52C2C433C8; Wed, 3 Jan 2024 00:31:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1704241902; bh=c0hwMhIsCKXtfxkXFf6Gq2t1ll9WqyctEcwEz2UIEzo=; h=Date:From:To:Cc:Subject:Reply-To:From; b=toCVBpwwe1KnDV9/ZLIg406/wJF600ZU0JSCrpOfr4XneRIJiu2+tXkSsaQHZ4Hyi Vgg0jBeumqWujmxRLxhqm4j9Sq+twZdIngDDEd03T9nWrPcmD1DITLPu2B9kJAdPS0 FGh1MU8SKjFKu8thStTnxhWmKEsJoTBZQanQ/bI4hWmjRhJ46A84JrvnQ6Kbq/BpCx ctHlKoHbHf9nqfHOlJCYj0aXueWfijSBld5LMyM3fJn/oGB6Kqtl5/CK/8N+WC1gt7 YjcorpTd/Uk0K6ZHXts1iGdyahPbmB4GwswSz2+uah18QV68dr6ZF1b3aIR6Dcp9tQ ro9DjrJf3kLpQ== Received: by paulmck-ThinkPad-P17-Gen-1.home (Postfix, from userid 1000) id 5A15FCE16DA; Tue, 2 Jan 2024 16:31:42 -0800 (PST) Date: Tue, 2 Jan 2024 16:31:42 -0800 From: "Paul E. McKenney" To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: zhxchen17@meta.com, dcostantino@meta.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, peterz@infradead.org, feng.tang@intel.com, longman@redhat.com, jstultz@google.com Subject: [PATCH RFC tsc] Check for sockets instead of CPUs to make code match comment Message-ID: Reply-To: paulmck@kernel.org Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The unsynchronized_tsc() eventually checks num_possible_cpus(), and if the system is non-Intel and the number of possible CPUs is greater than one, assumes that TSCs are unsynchronized. This despite the comment saying "assume multi socket systems are not synchronized", that is, socket rather than CPU. This behavior was preserved by commit 8fbbc4b45ce3 ("x86: merge tsc_init and clocksource code") and by the previous relevant commit 7e69f2b1ead2 ("clocksource: Remove the update callback"). The clocksource drivers were added by commit 5d0cf410e94b ("Time: i386 Clocksource Drivers") back in 2006, and the comment still said "socket" rather than "CPU". Therefore, bravely (and perhaps foolishly) make the code match the comment. Note that it is possible to bypass both code and comment by booting with tsc=3Dreliable, but this also disables the clocksource watchdog, which is undesirable when trust in the TSC is strictly limited. Reported-by: Zhengxu Chen Reported-by: Danielle Costantino Signed-off-by: Paul E. McKenney Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: "H. Peter Anvin" Cc: Peter Zijlstra Cc: Feng Tang Cc: Waiman Long Cc: John Stultz Cc: diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 15f97c0abc9d..d45084c6a15e 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1287,7 +1287,7 @@ int unsynchronized_tsc(void) */ if (boot_cpu_data.x86_vendor !=3D X86_VENDOR_INTEL) { /* assume multi socket systems are not synchronized: */ - if (num_possible_cpus() > 1) + if (nr_online_nodes > 1) return 1; }