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Fri, 25 Oct 2024 16:50:49 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , , Subject: [PATCH v5 02/13] iommufd/selftest: Add IOMMU_VDEVICE_ALLOC test coverage Date: Fri, 25 Oct 2024 16:50:31 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D0:EE_|SN7PR12MB7372:EE_ X-MS-Office365-Filtering-Correlation-Id: 2faf49b8-196b-49a8-6d10-08dcf54fe01b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|1800799024|36860700013|376014|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?X3AyOBWUvZhMSOHmPhaEqE0XMs4n2n/tPdVw4Hy8NA4EJ47JRbP71+W+Qvzm?= =?us-ascii?Q?YUOIloIUnauWEFIm9ksDu9Q9B1MQWXrzK/Khz2VbpliTV1sUsqTi2YFUYQo6?= =?us-ascii?Q?NZDnfxe8YGTQzCmQXr9cIlDw+dg+Je555tHwy/JY+Z64fiNEUk6h0BfC6f4c?= =?us-ascii?Q?ZSJ9FY+8SDbqftjqCBNuzsFWk1YaenHuppe0uU0ebUwreS6bBFphjXzLH8SA?= =?us-ascii?Q?aCzmtjqAQl5xhwampW0gJ2G/VRksfj6kTmQOU957MBJG/B7bnkqc3SfmgMAS?= =?us-ascii?Q?eIEafJhSJRnC8GT1CflSEHsZIgtUZYvW5DydlbV1BvJmAR/vAMBMAQQKZjXr?= =?us-ascii?Q?wP5PzyMXl9HCoVXeEGUD28msr9mSYFD2vFMHnsjRWtledfbLFBxZKyGivsUt?= =?us-ascii?Q?cO0BDo41vdR0PTm1wMUj4/UTApm1tgPpJOwhmm+6Km9qomQf9A+zXi/6IEh7?= =?us-ascii?Q?yU2S1SStSMUhgH418TloFXES94vt6SzRtwDrPK/FmBcHxSCxHSZFXtW6mNgM?= =?us-ascii?Q?59CN01s8gqNPYKJzCvxerDTCfGuxZfdMSiMq7w2lHUHx3oJaTvMg3fXEcVLH?= =?us-ascii?Q?G8D2p9s/EjUiirst5lP4nrfVTl1IJhGYCN3SpbcoYRtT9rUPRg9tH2KKFgd4?= =?us-ascii?Q?lACJODTU9qdOcgGeLNAozXlSU+s9gwc6l2UqMvIMKNekgsPdyFzYoNWvLKdt?= =?us-ascii?Q?RNmsJDjn5cXsmT8l1nvEZXA0Wx0+NAVCCylQIaSQvJ3N9TSlVGPm5JY7SQXM?= =?us-ascii?Q?5uxTIfTht9YPKpJrR6MYzsO2sn5f5GrMENBjVRJQvvaCyDS1XOhG40HSK3Yp?= =?us-ascii?Q?KuC3RMpNmns8H0tx2Fu27biIhar6eWOMuOxtHdfh6Ryq0wVFQyCpbF7Y1OzF?= =?us-ascii?Q?WNIZGfcPm2ovlwik1Fr3ED6nAPUhHBxQuSXcoQSto9dSEnPdORVHh60Apd5r?= =?us-ascii?Q?BHmJc3+PLnll9nj/44ZPH4FwSf0VNQoqWfhjER7+G1vNNoTMNIPXCZEh+Gvl?= =?us-ascii?Q?JEyXqt6Cwszk2S6S9EsjdXINDe+YxxjAhniZ7dKqvX654qFh9sK4wRG4BpE2?= =?us-ascii?Q?kPnZPpXi8ckuVjeVGJKgp+dp+fJvoRglc0XPtk++AeYN+yqPFW3asqptRlf7?= =?us-ascii?Q?T09S+2faU8jGhLWZUFCofjJU47sU7cpGfm01bipiRJVT4hRlVZQjI2aFSQ5I?= =?us-ascii?Q?VSBRFIbdPy1RASLVbFTYt4iZFHC90v3iGoDiXpbsCSH4z8wwzP4CRArfHXC9?= =?us-ascii?Q?wlvKP58Ixvky/e6oIg/3F3Nv5oVF+ja+Dxdyhd5vXMozpm9nmzCaVl7zUSgU?= =?us-ascii?Q?yRXDHAIV+KzHI9Plw7vNuGeeWSogeiO4u/Vzg9Qe30Lsf8IwbMJ6tCA1UiS5?= =?us-ascii?Q?F8QGPnvwDhbf4go4BeX4j/VA4lc/SKmskXAadEVnIR//I/yejw=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(1800799024)(36860700013)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 23:50:59.0570 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2faf49b8-196b-49a8-6d10-08dcf54fe01b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D0.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7372 Content-Type: text/plain; charset="utf-8" Add a vdevice_alloc op to the viommu mock_viommu_ops for the coverage of IOMMU_VIOMMU_TYPE_SELFTEST allocations. Then, add a vdevice_alloc TEST_F to cover the IOMMU_VDEVICE_ALLOC ioctl. Signed-off-by: Nicolin Chen Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian --- tools/testing/selftests/iommu/iommufd_utils.h | 27 +++++++++++++++++++ tools/testing/selftests/iommu/iommufd.c | 20 ++++++++++++++ .../selftests/iommu/iommufd_fail_nth.c | 4 +++ 3 files changed, 51 insertions(+) diff --git a/tools/testing/selftests/iommu/iommufd_utils.h b/tools/testing/= selftests/iommu/iommufd_utils.h index ca09308dad6a..5b17d7b2ac5c 100644 --- a/tools/testing/selftests/iommu/iommufd_utils.h +++ b/tools/testing/selftests/iommu/iommufd_utils.h @@ -790,3 +790,30 @@ static int _test_cmd_viommu_alloc(int fd, __u32 device= _id, __u32 hwpt_id, EXPECT_ERRNO(_errno, \ _test_cmd_viommu_alloc(self->fd, device_id, hwpt_id, \ type, 0, viommu_id)) + +static int _test_cmd_vdevice_alloc(int fd, __u32 viommu_id, __u32 idev_id, + __u64 virt_id, __u32 *vdev_id) +{ + struct iommu_vdevice_alloc cmd =3D { + .size =3D sizeof(cmd), + .dev_id =3D idev_id, + .viommu_id =3D viommu_id, + .virt_id =3D virt_id, + }; + int ret; + + ret =3D ioctl(fd, IOMMU_VDEVICE_ALLOC, &cmd); + if (ret) + return ret; + if (vdev_id) + *vdev_id =3D cmd.out_vdevice_id; + return 0; +} + +#define test_cmd_vdevice_alloc(viommu_id, idev_id, virt_id, vdev_id) = \ + ASSERT_EQ(0, _test_cmd_vdevice_alloc(self->fd, viommu_id, idev_id, \ + virt_id, vdev_id)) +#define test_err_vdevice_alloc(_errno, viommu_id, idev_id, virt_id, vdev_i= d) \ + EXPECT_ERRNO(_errno, \ + _test_cmd_vdevice_alloc(self->fd, viommu_id, idev_id, \ + virt_id, vdev_id)) diff --git a/tools/testing/selftests/iommu/iommufd.c b/tools/testing/selfte= sts/iommu/iommufd.c index b48b22d33ad4..93255403dee4 100644 --- a/tools/testing/selftests/iommu/iommufd.c +++ b/tools/testing/selftests/iommu/iommufd.c @@ -129,6 +129,7 @@ TEST_F(iommufd, cmd_length) TEST_LENGTH(iommu_option, IOMMU_OPTION, val64); TEST_LENGTH(iommu_vfio_ioas, IOMMU_VFIO_IOAS, __reserved); TEST_LENGTH(iommu_viommu_alloc, IOMMU_VIOMMU_ALLOC, out_viommu_id); + TEST_LENGTH(iommu_vdevice_alloc, IOMMU_VDEVICE_ALLOC, __reserved2); #undef TEST_LENGTH } =20 @@ -2473,4 +2474,23 @@ TEST_F(iommufd_viommu, viommu_auto_destroy) { } =20 +TEST_F(iommufd_viommu, vdevice_alloc) +{ + uint32_t viommu_id =3D self->viommu_id; + uint32_t dev_id =3D self->device_id; + uint32_t vdev_id =3D 0; + + if (dev_id) { + /* Set vdev_id to 0x99, unset it, and set to 0x88 */ + test_cmd_vdevice_alloc(viommu_id, dev_id, 0x99, &vdev_id); + test_err_vdevice_alloc(EEXIST, viommu_id, dev_id, 0x99, + &vdev_id); + test_ioctl_destroy(vdev_id); + test_cmd_vdevice_alloc(viommu_id, dev_id, 0x88, &vdev_id); + test_ioctl_destroy(vdev_id); + } else { + test_err_vdevice_alloc(ENOENT, viommu_id, dev_id, 0x99, NULL); + } +} + TEST_HARNESS_MAIN diff --git a/tools/testing/selftests/iommu/iommufd_fail_nth.c b/tools/testi= ng/selftests/iommu/iommufd_fail_nth.c index e9a980b7729b..28f11b26f836 100644 --- a/tools/testing/selftests/iommu/iommufd_fail_nth.c +++ b/tools/testing/selftests/iommu/iommufd_fail_nth.c @@ -583,6 +583,7 @@ TEST_FAIL_NTH(basic_fail_nth, device) uint32_t idev_id; uint32_t hwpt_id; uint32_t viommu_id; + uint32_t vdev_id; __u64 iova; =20 self->fd =3D open("/dev/iommu", O_RDWR); @@ -635,6 +636,9 @@ TEST_FAIL_NTH(basic_fail_nth, device) IOMMU_VIOMMU_TYPE_SELFTEST, 0, &viommu_id)) return -1; =20 + if (_test_cmd_vdevice_alloc(self->fd, viommu_id, idev_id, 0, &vdev_id)) + return -1; + return 0; } =20 --=20 2.43.0