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Mon, 8 Sep 2025 16:28:42 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , Subject: [PATCH rfcv2 5/8] iommu/arm-smmu-v3: Pre-allocate a per-master invalidation array Date: Mon, 8 Sep 2025 16:26:59 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC3:EE_|MN0PR12MB6001:EE_ X-MS-Office365-Filtering-Correlation-Id: b9ba50bc-eb57-4a8f-3ef0-08ddef2f7ba1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|7416014|376014|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?Qs5VnTOFL4iO9/z4fGeW+ZlT3oJjVN9Lvcp0q544vKhvMXPZPLsyf9N9/WCX?= =?us-ascii?Q?fZCkSjt6bQUEBaUcVUbOSXx1/w13FhXhnRYbjH+tY2XUMG13IYi5nlYOOzyf?= =?us-ascii?Q?aGZRaoXt0F83MsObgUB8e3EELgV3A1UICmSnPL0fbu3HvZ88KlQdG7AT/LGq?= =?us-ascii?Q?DwBNMRpj0t8tpapftMtKGPT+rvViZSeRuVhNG4ktnhnm78uMvM7E3JcY3XYD?= =?us-ascii?Q?lC/2ZNSk96zVlVKVR8otJCne40konny4J5tGFZwSnd8O5VOmwTClLrbdTUS9?= =?us-ascii?Q?xHW8FvbbIqAG9O6E3wGN5s/vLcTstBxsJ+5fGMpI5at93cdJ8VLtpcNjGKW0?= =?us-ascii?Q?SCfZ0RYMRsjAt0XhlvwSnHFc/AlUSTaLyCKZyzlZvyVTnkgEX7I7F4OFEMkB?= =?us-ascii?Q?uMVIcyysgPoWs48KAAmnYe2Q/WpsJ8N+2RQYYjwwXNZUfbVqrZwkkuokDK6O?= =?us-ascii?Q?DxutDG9ZzdOi7oaJ/9lO9wFcxTbMA3vJP7DNVLm8G+CIP735zwkiJYaaBRux?= =?us-ascii?Q?hNWOqAFO9PoImIy/M3zbICqKTV23bGbx7BwbKc7+ZbxqviwZKEUbQEmUyFf5?= =?us-ascii?Q?EfHq11emY+2Qofi2eusUXFotqyrBl5X6fMEtJEZYebVVGUEyGn/+fjP1nj+c?= =?us-ascii?Q?0711ERsLz3Uo2h0D52lIuCB/Vr/cw/LwrYsbloJJKTzXaud62UTvNHnPDpho?= =?us-ascii?Q?LpXCohSLBcDoQWpXt7LT/y9eVnIg5SfLtFcukm3jf8PA7Z+517NCch6P20s9?= =?us-ascii?Q?UuYwn46+cWpfjtYZyMVytmZsdh6KXtJzDV2LE80oJEWRrlcuENk0ROnXXQei?= =?us-ascii?Q?Q1RgahDSkeGYHZU4nnKeb6JRh+8Tp+HJb6SyxBe1xfrw9qSDkyVFi/Sreuyg?= =?us-ascii?Q?2EXLE0SgvfT53jCWwwWDk+/DuxMZJYEZ+rwa0Ovv1dwfYVneCyVe9Zi/0ejn?= =?us-ascii?Q?taDEa2v+8S1679U5H3SVCeWNKe+L5sC3o1c6eUY7E1NcFM/6btQjZIqyS1KL?= =?us-ascii?Q?r5U6VSwRwcsRwqukpPj/zmuEKcOZ2AZZ3r0wLebt2V1pr38BbiZFp/0fgm6y?= =?us-ascii?Q?YO9gQpER0aYQihZmen7F6+JRMkR08yWg0kofHHlTR1bfiuNk/FsHB2BkH4tw?= =?us-ascii?Q?yyo7cF17jDgLUuTZwAG5AgUot9fzjRi03cOLtnYVIxZ0/vsoduckpnUxYOfD?= =?us-ascii?Q?VNU+EGcqZa0vLdXEHSo+ZM0XiCmPhJnL+25fGtyitishnh+OFuQXLPA362mX?= =?us-ascii?Q?ey7Cj40nm1IJYHQiDZ39lWF9CDETjlGSgohsMZAaLpkyG/ZlS/9ZKgyrEmGx?= =?us-ascii?Q?fK29rEzpo6jmj9uFI2j9fzLM0r+SqP3kBYkd4Nt3qGqmBmfWMu0lnIkxqMXp?= =?us-ascii?Q?F3LYgulucW21FTUJ58uJM7oH9qnssOZSHJ49GzrODPibjhIOwH3GWdWPOEXR?= =?us-ascii?Q?Y452A3cMEP1/vexwCejT2i66Dx8KiVf7vSdZPfMjzYzYH1BWY2MYPh3oGQ8+?= =?us-ascii?Q?vm3PuC4IgMRe2n7zGX5PUYtYN1wRPk1lZVuc?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(7416014)(376014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2025 23:28:57.2008 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b9ba50bc-eb57-4a8f-3ef0-08ddef2f7ba1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC3.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6001 Content-Type: text/plain; charset="utf-8" When a master is attached from an old domain to a new domain, it needs to build an invalidation array to delete and add the array entries from/onto the invalidation arrays of those two domains, passed via the to_merge and to_unref arguments into arm_smmu_invs_merge/unref() respectively. Since the master->num_streams might differ across masters, a memory would have to be allocated when building an to_merge/to_unref array which might fail with -ENOMEM. On the other hand, an attachment to arm_smmu_blocked_domain must not fail so it's the best to avoid any memory allocation in that path. Pre-allocate a fixed size invalidation array for every master. This array will be used as a scratch to fill dynamically when building a to_merge or to_unref invs array. Co-developed-by: Jason Gunthorpe Signed-off-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 8 +++++++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 26 +++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index 34fcc1a930e6a..246c6d84de3ab 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -919,6 +919,14 @@ struct arm_smmu_master { struct arm_smmu_device *smmu; struct device *dev; struct arm_smmu_stream *streams; + /* + * Scratch memory for a to_merge or to_unref array to build a per-domain + * invalidation array. It'll be pre-allocated with enough enries for all + * possible build scenarios. It can be used by only one caller at a time + * until the arm_smmu_invs_merge/unref() finishes. Must be locked by the + * iommu_group mutex. + */ + struct arm_smmu_invs *build_invs; struct arm_smmu_vmaster *vmaster; /* use smmu->streams_mutex */ /* Locked by the iommu core using the group mutex */ struct arm_smmu_ctx_desc_cfg cd_table; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 83d842bd88817..4e69c81f5a28b 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3663,12 +3663,22 @@ static int arm_smmu_init_sid_strtab(struct arm_smmu= _device *smmu, u32 sid) return 0; } =20 +static int arm_smmu_ids_cmp(const void *_l, const void *_r) +{ + const typeof_member(struct iommu_fwspec, ids[0]) *l =3D _l; + const typeof_member(struct iommu_fwspec, ids[0]) *r =3D _r; + + return cmp_int(*l, *r); +} + static int arm_smmu_insert_master(struct arm_smmu_device *smmu, struct arm_smmu_master *master) { int i; int ret =3D 0; struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(master->dev); + bool ats_supported =3D dev_is_pci(master->dev) && + pci_ats_supported(to_pci_dev(master->dev)); =20 master->streams =3D kcalloc(fwspec->num_ids, sizeof(*master->streams), GFP_KERNEL); @@ -3676,6 +3686,20 @@ static int arm_smmu_insert_master(struct arm_smmu_de= vice *smmu, return -ENOMEM; master->num_streams =3D fwspec->num_ids; =20 + /* Base case has 1 ASID or 1~2 VMIDs. ATS case adds num_ids */ + if (!ats_supported) + master->build_invs =3D arm_smmu_invs_alloc(2); + else + master->build_invs =3D arm_smmu_invs_alloc(2 + fwspec->num_ids); + if (IS_ERR(master->build_invs)) { + kfree(master->streams); + return PTR_ERR(master->build_invs); + } + + /* Put the ids into order for a sorted to_merge or to_unref array */ + sort_nonatomic(fwspec->ids, fwspec->num_ids, sizeof(fwspec->ids[0]), + arm_smmu_ids_cmp, NULL); + mutex_lock(&smmu->streams_mutex); for (i =3D 0; i < fwspec->num_ids; i++) { struct arm_smmu_stream *new_stream =3D &master->streams[i]; @@ -3713,6 +3737,7 @@ static int arm_smmu_insert_master(struct arm_smmu_dev= ice *smmu, for (i--; i >=3D 0; i--) rb_erase(&master->streams[i].node, &smmu->streams); kfree(master->streams); + kfree(master->build_invs); } mutex_unlock(&smmu->streams_mutex); =20 @@ -3734,6 +3759,7 @@ static void arm_smmu_remove_master(struct arm_smmu_ma= ster *master) mutex_unlock(&smmu->streams_mutex); =20 kfree(master->streams); + kfree(master->build_invs); } =20 static struct iommu_device *arm_smmu_probe_device(struct device *dev) --=20 2.43.0