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Tue, 26 Aug 2025 09:38:06 -0700 (PDT) Date: Tue, 26 Aug 2025 19:38:03 +0300 From: Dan Carpenter To: Srinivas Kandagatla Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ciprian Costea , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, NXP S32 Linux Team , linaro-s32@linaro.org Subject: [PATCH V2 1/3] dt-bindings: nvmem: Add the nxp,s32g-ocotp yaml file Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ciprian Costea Add bindings to expose the On Chip One-Time Programmable Controller (OCOTP) for the NXP s32g chipset. There are three versions of this chip but they're compatible so we can fall back to the nxp,s32g2-ocotp compatible. Signed-off-by: Ciprian Costea Signed-off-by: Dan Carpenter Reviewed-by: Conor Dooley --- v2: dt_binding_check DT_SCHEMA_FILES=3Dnxp,s32g-ocotp-nvmem.yaml is clean make CHECK_DTBS=3Dy freescale/*.dtb is clean. Particularly the freescale/s32g274a-evb.dtb file which Rob mentioned. remove bogus include file remove redundant "reg" description remove #address-cells and #size-cells since they are already in nvmem.yaml Fix email From header .../bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-= nvmem.yaml diff --git a/Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-nvmem.y= aml b/Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml new file mode 100644 index 000000000000..01adc6093c68 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/nxp,s32g-ocotp-nvmem.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/nxp,s32g-ocotp-nvmem.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP S32G OCOTP NVMEM driver + +maintainers: + - Ciprian Costea + +description: | + The drivers provides an interface to access One Time + Programmable memory pages, such as TMU fuse values. + +allOf: + - $ref: nvmem.yaml# + +properties: + compatible: + oneOf: + - enum: + - nxp,s32g2-ocotp + - items: + - enum: + - nxp,s32r45-ocotp + - nxp,s32g3-ocotp + - const: nxp,s32g2-ocotp + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + ocotp: nvmem@400a4000 { + compatible =3D "nxp,s32g2-ocotp"; + reg =3D <0x400a4000 0x400>; + #address-cells =3D <1>; + #size-cells =3D <1>; + }; --=20 2.47.2