From nobody Sun Sep 7 12:31:22 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7890ECDB474 for ; Mon, 16 Oct 2023 16:59:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234666AbjJPQ77 (ORCPT ); Mon, 16 Oct 2023 12:59:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234092AbjJPQ7k (ORCPT ); Mon, 16 Oct 2023 12:59:40 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5EDD72A2; Mon, 16 Oct 2023 09:22:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697473368; x=1729009368; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=w2jZkAdIHP1nj2m5XeNSsUCz/xC1Te/t4FJHSSEhalg=; b=lmkkqWcXxrMI4bAuuZAMein6BDDi8AFjEdBUo4WraIz1y3TvTYFn561P kUJQEVkHKi3hIsqRqTuXtDVJ6pIosYZlwCNH5ajVhfVLw+dkQ7ZY6zUnG 0wrb9k2Dh0rp7PvKn530rVn6FTMe8JFyxnZY5cL0sPolMzu0tXACjvvm5 zSovg3NcnEtBueTuToq2JJgeftXXF/Gmn7Av6G2ZHhaRF+kgcMwTVSfZH htIGmx/wTTtgVnsrwq8VZj2bkWdz9RceOedOwD8tx1Z27RE6xHLmpSXmR /2/ASRu9CXN5N+c+IZWBgbcYnNhAwzAIwzIigmlkSpcCYDKvbWCAES4hO w==; X-IronPort-AV: E=McAfee;i="6600,9927,10865"; a="364922152" X-IronPort-AV: E=Sophos;i="6.03,229,1694761200"; d="scan'208";a="364922152" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Oct 2023 09:16:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10865"; a="1003006484" X-IronPort-AV: E=Sophos;i="6.03,229,1694761200"; d="scan'208";a="1003006484" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Oct 2023 09:16:12 -0700 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , David Matlack , Kai Huang , Zhi Wang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com Subject: [PATCH v16 110/116] KVM: TDX: Inhibit APICv for TDX guest Date: Mon, 16 Oct 2023 09:15:02 -0700 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Isaku Yamahata TDX doesn't support APICV, inhibit APICv for TDX guest. Follow how SEV does it. Define a new inhibit reason for TDX, set it on TD initialization, and add the flag to kvm_x86_ops.required_apicv_inhibits. Signed-off-by: Isaku Yamahata --- arch/x86/include/asm/kvm_host.h | 9 +++++++++ arch/x86/kvm/vmx/main.c | 3 ++- arch/x86/kvm/vmx/tdx.c | 6 ++++++ 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 529c7e610d47..f0674ef1c17e 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1284,6 +1284,15 @@ enum kvm_apicv_inhibit { * mapping between logical ID and vCPU. */ APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED, + + /*********************************************************/ + /* INHIBITs that are relevant only to the Intel's APICv. */ + /*********************************************************/ + + /* + * APICv is disabled because TDX doesn't support it. + */ + APICV_INHIBIT_REASON_TDX, }; =20 struct kvm_arch { diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c index eb44f5784f18..5d61f5306ae3 100644 --- a/arch/x86/kvm/vmx/main.c +++ b/arch/x86/kvm/vmx/main.c @@ -1001,7 +1001,8 @@ static int vt_vcpu_mem_enc_ioctl(struct kvm_vcpu *vcp= u, void __user *argp) BIT(APICV_INHIBIT_REASON_BLOCKIRQ) | \ BIT(APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED) | \ BIT(APICV_INHIBIT_REASON_APIC_ID_MODIFIED) | \ - BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED)) + BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED) | \ + BIT(APICV_INHIBIT_REASON_TDX)) =20 struct kvm_x86_ops vt_x86_ops __initdata =3D { .name =3D KBUILD_MODNAME, diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c index 527fbcd7e2c5..924cbf97404a 100644 --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -2486,6 +2486,8 @@ static int __tdx_td_init(struct kvm *kvm, struct td_p= arams *td_params, goto teardown; } =20 + kvm_set_apicv_inhibit(kvm, APICV_INHIBIT_REASON_TDX); + return 0; =20 /* @@ -2849,6 +2851,10 @@ static int tdx_td_vcpu_init(struct kvm_vcpu *vcpu, u= 64 vcpu_rcx) } =20 vcpu->arch.mp_state =3D KVM_MP_STATE_RUNNABLE; + + WARN_ON_ONCE(kvm_apicv_activated(vcpu->kvm)); + vcpu->arch.apic->apicv_active =3D false; + return 0; =20 free_tdvpx: --=20 2.25.1