From nobody Tue Oct 7 11:39:04 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 718D7302078; Thu, 10 Jul 2025 20:07:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752178079; cv=none; b=RcYQ34w658Nru8B/CDu6pTXaQWeu7u1EXZvTaNFc1lYNgkikF54xirvG1yUunwXNPAXaDvGoNHFg7Y5O+WNhtW8UBm3dwP0ekx6CyGHAwbvA9VKvg83A5cW7LtB4kovsKaHC5UjeRXyZphHSVfUMuyXE5keUM9df0V4e8VwmZfM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752178079; c=relaxed/simple; bh=tqLyTJ/R1N6GSxPsKi/6prq6NuZYzrpB23w6AH6DbSw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=tHT03FbaVSmWcLI5tyjHQm/E+SLnHI+hBFT/xARu3JjH0/WtFvcsdpw/7f7OdVOr7DOrg4JFYz7Pqw4I+V2iE71NrjiCyDkcxzPyWZGrNimmXWnYKRxQIcUSRez2vtfsdY7yJ1zCd/ZCQ90IISWPBCUmnsdaQh2Uj5I0hisHK9w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=pyFOrbNF; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="pyFOrbNF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1752178078; x=1783714078; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tqLyTJ/R1N6GSxPsKi/6prq6NuZYzrpB23w6AH6DbSw=; b=pyFOrbNFEH3aIISymlce4xxB+0zh7RDTdrb7OoU3W0bq7EdXe03OFya2 BJzcC5UxxmG2WHeX9Kss7N20Gm8yo/UwFQWs90JsELgf3txkqoL28fA21 SL8WAgjHtpGwvOZmeubuGFWwvZ5J937+ZjzcNSM7EgVIRAynkf/ehDXpt /twuEdo1n4gHRLKN+NJFCZ7OirqPMsxTvCS9AF48IffKKCGmoM4PcNe92 CqJEmShm92uOZ58U+TXbF2Plj1M0JvGb3XCMBSHN8qBDY1f7CWvdRxNth 8hXlVcHap+eQ32g+QfJt1mUwAdR0XeSIdfuf+7P/EvWQFRXVVv3PBVmqx g==; X-CSE-ConnectionGUID: qOQSLemoQZOGUxBCHa7nXg== X-CSE-MsgGUID: k/ggPkAwQgao9E5iDykMoA== X-IronPort-AV: E=Sophos;i="6.16,301,1744095600"; d="scan'208";a="275215689" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 10 Jul 2025 13:07:41 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Thu, 10 Jul 2025 13:07:34 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Thu, 10 Jul 2025 13:07:34 -0700 From: To: , , , , CC: , , , , Subject: [PATCH v3 31/32] clk: at91: at91sam9rl: switch to clk_parent_data Date: Thu, 10 Jul 2025 13:07:24 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Switch AT91SAM9RL clocks to use parent_hw and parent_data. Having parent_hw instead of parent names improves to clock registration speed and re-parenting. Signed-off-by: Claudiu Beznea Signed-off-by: Ryan Wanner --- drivers/clk/at91/at91sam9rl.c | 63 ++++++++++++++++------------------- 1 file changed, 28 insertions(+), 35 deletions(-) diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c index 0e8657aac491..5b342b707213 100644 --- a/drivers/clk/at91/at91sam9rl.c +++ b/drivers/clk/at91/at91sam9rl.c @@ -28,13 +28,12 @@ static const struct clk_pll_characteristics sam9rl_plla= _characteristics =3D { .out =3D sam9rl_plla_out, }; =20 -static const struct { +static struct { char *n; - char *p; u8 id; } at91sam9rl_systemck[] =3D { - { .n =3D "pck0", .p =3D "prog0", .id =3D 8 }, - { .n =3D "pck1", .p =3D "prog1", .id =3D 9 }, + { .n =3D "pck0", .id =3D 8 }, + { .n =3D "pck1", .id =3D 9 }, }; =20 static const struct { @@ -67,24 +66,14 @@ static const struct { =20 static void __init at91sam9rl_pmc_setup(struct device_node *np) { - const char *slck_name, *mainxtal_name; + const char *slow_clk_name =3D "slowck", *main_xtal_name =3D "main_xtal"; + u8 slow_clk_index =3D 0, main_xtal_index =3D 1; + struct clk_parent_data parent_data[6]; struct pmc_data *at91sam9rl_pmc; - const char *parent_names[6]; struct regmap *regmap; struct clk_hw *hw; int i; =20 - i =3D of_property_match_string(np, "clock-names", "slow_clk"); - if (i < 0) - return; - - slck_name =3D of_clk_get_parent_name(np, i); - - i =3D of_property_match_string(np, "clock-names", "main_xtal"); - if (i < 0) - return; - mainxtal_name =3D of_clk_get_parent_name(np, i); - regmap =3D device_node_to_regmap(np); if (IS_ERR(regmap)) return; @@ -95,13 +84,15 @@ static void __init at91sam9rl_pmc_setup(struct device_n= ode *np) if (!at91sam9rl_pmc) return; =20 - hw =3D at91_clk_register_rm9200_main(regmap, "mainck", mainxtal_name, NUL= L); + hw =3D at91_clk_register_rm9200_main(regmap, "mainck", NULL, + &AT91_CLK_PD_NAME(main_xtal_name, main_xtal_index)); if (IS_ERR(hw)) goto err_free; =20 at91sam9rl_pmc->chws[PMC_MAIN] =3D hw; =20 - hw =3D at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0, + hw =3D at91_clk_register_pll(regmap, "pllack", NULL, + &AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN]), 0, &at91rm9200_pll_layout, &sam9rl_plla_characteristics); if (IS_ERR(hw)) @@ -109,18 +100,19 @@ static void __init at91sam9rl_pmc_setup(struct device= _node *np) =20 at91sam9rl_pmc->chws[PMC_PLLACK] =3D hw; =20 - hw =3D at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL); + hw =3D at91_clk_register_utmi(regmap, NULL, "utmick", NULL, + &AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN])); if (IS_ERR(hw)) goto err_free; =20 at91sam9rl_pmc->chws[PMC_UTMI] =3D hw; =20 - parent_names[0] =3D slck_name; - parent_names[1] =3D "mainck"; - parent_names[2] =3D "pllack"; - parent_names[3] =3D "utmick"; + parent_data[0] =3D AT91_CLK_PD_NAME(slow_clk_name, slow_clk_index); + parent_data[1] =3D AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN]); + parent_data[2] =3D AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_PLLACK]); + parent_data[3] =3D AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_UTMI]); hw =3D at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, NULL, + NULL, parent_data, &at91rm9200_master_layout, &sam9rl_mck_characteristics, &sam9rl_mck_lock); @@ -128,7 +120,7 @@ static void __init at91sam9rl_pmc_setup(struct device_n= ode *np) goto err_free; =20 hw =3D at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", NULL, + NULL, &AT91_CLK_PD_HW(hw), &at91rm9200_master_layout, &sam9rl_mck_characteristics, &sam9rl_mck_lock, CLK_SET_RATE_GATE, 0); @@ -137,18 +129,18 @@ static void __init at91sam9rl_pmc_setup(struct device= _node *np) =20 at91sam9rl_pmc->chws[PMC_MCK] =3D hw; =20 - parent_names[0] =3D slck_name; - parent_names[1] =3D "mainck"; - parent_names[2] =3D "pllack"; - parent_names[3] =3D "utmick"; - parent_names[4] =3D "masterck_div"; + parent_data[0] =3D AT91_CLK_PD_NAME(slow_clk_name, slow_clk_index); + parent_data[1] =3D AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN]); + parent_data[2] =3D AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_PLLACK]); + parent_data[3] =3D AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_UTMI]); + parent_data[4] =3D AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MCK]); for (i =3D 0; i < 2; i++) { char name[6]; =20 snprintf(name, sizeof(name), "prog%d", i); =20 hw =3D at91_clk_register_programmable(regmap, name, - parent_names, NULL, 5, i, + NULL, parent_data, 5, i, &at91rm9200_programmable_layout, NULL); if (IS_ERR(hw)) @@ -158,8 +150,8 @@ static void __init at91sam9rl_pmc_setup(struct device_n= ode *np) } =20 for (i =3D 0; i < ARRAY_SIZE(at91sam9rl_systemck); i++) { - hw =3D at91_clk_register_system(regmap, at91sam9rl_systemck[i].n, - at91sam9rl_systemck[i].p, NULL, + hw =3D at91_clk_register_system(regmap, at91sam9rl_systemck[i].n, NULL, + &AT91_CLK_PD_HW(at91sam9rl_pmc->pchws[0]), at91sam9rl_systemck[i].id, 0); if (IS_ERR(hw)) goto err_free; @@ -170,7 +162,8 @@ static void __init at91sam9rl_pmc_setup(struct device_n= ode *np) for (i =3D 0; i < ARRAY_SIZE(at91sam9rl_periphck); i++) { hw =3D at91_clk_register_peripheral(regmap, at91sam9rl_periphck[i].n, - "masterck_div", NULL, + NULL, + &AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MCK]), at91sam9rl_periphck[i].id); if (IS_ERR(hw)) goto err_free; --=20 2.43.0