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From: <Ryan.Wanner@microchip.com>
To: <andrew+netdev@lunn.ch>, <davem@davemloft.net>, <edumazet@google.com>,
<kuba@kernel.org>, <pabeni@redhat.com>, <robh@kernel.org>,
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<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, Ryan Wanner
<Ryan.Wanner@microchip.com>
Subject: [PATCH 3/6] ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65
SoC
Date: Tue, 1 Apr 2025 09:13:19 -0700
Message-ID:
<d474fcd850978261ac889950ac1c3a36bc6d3926.1743523114.git.Ryan.Wanner@microchip.com>
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From: Ryan Wanner <Ryan.Wanner@microchip.com>
Add FLEXCOMs to the SAMA7D65 SoC device tree.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
arch/arm/boot/dts/microchip/sama7d65.dtsi | 267 ++++++++++++++++++++++
1 file changed, 267 insertions(+)
diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/=
microchip/sama7d65.dtsi
index cd17b838e179..9f453c686dc6 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -217,6 +217,199 @@ pit64b1: timer@e1804000 {
clock-names =3D "pclk", "gclk";
};
=20
+ flx0: flexcom@e1820000 {
+ compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+ reg =3D <0xe1820000 0x200>;
+ ranges =3D <0x0 0xe1820000 0x800>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 34>;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ status =3D "disabled";
+
+ uart0: serial@200 {
+ compatible =3D "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+ reg =3D <0x200 0x200>;
+ interrupts =3D <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 34>;
+ clock-names =3D "usart";
+ dmas =3D <&dma1 AT91_XDMAC_DT_PERID(6)>,
+ <&dma1 AT91_XDMAC_DT_PERID(5)>;
+ dma-names =3D "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,usart-mode =3D <AT91_USART_MODE_SERIAL>;
+ status =3D "disabled";
+ };
+
+ i2c0: i2c@600 {
+ compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+ reg =3D <0x600 0x200>;
+ interrupts =3D <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 34>;
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ atmel,fifo-size =3D <32>;
+ dmas =3D <&dma0 AT91_XDMAC_DT_PERID(6)>,
+ <&dma0 AT91_XDMAC_DT_PERID(5)>;
+ dma-names =3D "tx", "rx";
+ status =3D "disabled";
+ };
+ };
+
+ flx1: flexcom@e1824000 {
+ compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+ reg =3D <0xe1824000 0x200>;
+ ranges =3D <0x0 0xe1824000 0x800>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 35>;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ status =3D "disabled";
+
+ spi1: spi@400 {
+ compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
+ reg =3D <0x400 0x200>;
+ interrupts =3D <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 35>;
+ clock-names =3D "spi_clk";
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ atmel,fifo-size =3D <32>;
+ dmas =3D <&dma0 AT91_XDMAC_DT_PERID(8)>,
+ <&dma0 AT91_XDMAC_DT_PERID(7)>;
+ dma-names =3D "tx", "rx";
+ status =3D "disabled";
+ };
+
+ i2c1: i2c@600 {
+ compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+ reg =3D <0x600 0x200>;
+ interrupts =3D <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 35>;
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ atmel,fifo-size =3D <32>;
+ dmas =3D <&dma0 AT91_XDMAC_DT_PERID(8)>,
+ <&dma0 AT91_XDMAC_DT_PERID(7)>;
+ dma-names =3D "tx", "rx";
+ status =3D "disabled";
+ };
+ };
+
+ flx2: flexcom@e1828000 {
+ compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+ reg =3D <0xe1828000 0x200>;
+ ranges =3D <0x0 0xe1828000 0x800>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 36>;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ status =3D "disabled";
+
+ uart2: serial@200 {
+ compatible =3D "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+ reg =3D <0x200 0x200>;
+ interrupts =3D <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 36>;
+ clock-names =3D "usart";
+ dmas =3D <&dma1 AT91_XDMAC_DT_PERID(10)>,
+ <&dma1 AT91_XDMAC_DT_PERID(9)>;
+ dma-names =3D "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,usart-mode =3D <AT91_USART_MODE_SERIAL>;
+ status =3D "disabled";
+ };
+ };
+
+ flx3: flexcom@e182c000 {
+ compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+ reg =3D <0xe182c000 0x200>;
+ ranges =3D <0x0 0xe182c000 0x800>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 37>;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ status =3D "disabled";
+
+ i2c3: i2c@600 {
+ compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+ reg =3D <0x600 0x200>;
+ interrupts =3D <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 37>;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ atmel,fifo-size =3D <32>;
+ dmas =3D <&dma0 AT91_XDMAC_DT_PERID(12)>,
+ <&dma0 AT91_XDMAC_DT_PERID(11)>;
+ dma-names =3D "tx", "rx";
+ status =3D "disabled";
+ };
+
+ };
+
+ flx4: flexcom@e2018000 {
+ compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+ reg =3D <0xe2018000 0x200>;
+ ranges =3D <0x0 0xe2018000 0x800>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 38>;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ status =3D "disabled";
+
+ uart4: serial@200 {
+ compatible =3D "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+ reg =3D <0x200 0x200>;
+ interrupts =3D <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 38>;
+ clock-names =3D "usart";
+ dmas =3D <&dma1 AT91_XDMAC_DT_PERID(14)>,
+ <&dma1 AT91_XDMAC_DT_PERID(13)>;
+ dma-names =3D "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size =3D <16>;
+ atmel,usart-mode =3D <AT91_USART_MODE_SERIAL>;
+ status =3D "disabled";
+ };
+
+ spi4: spi@400 {
+ compatible =3D "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
+ reg =3D <0x400 0x200>;
+ interrupts =3D <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 38>;
+ clock-names =3D "spi_clk";
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ atmel,fifo-size =3D <32>;
+ dmas =3D <&dma0 AT91_XDMAC_DT_PERID(14)>,
+ <&dma0 AT91_XDMAC_DT_PERID(13)>;
+ dma-names =3D "tx", "rx";
+ status =3D "disabled";
+ };
+ };
+
+ flx5: flexcom@e201c000 {
+ compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+ reg =3D <0xe201c000 0x200>;
+ ranges =3D <0x0 0xe201c000 0x800>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 39>;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ status =3D "disabled";
+
+ i2c5: i2c@600 {
+ compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+ reg =3D <0x600 0x200>;
+ interrupts =3D <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 39>;
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ atmel,fifo-size =3D <32>;
+ dmas =3D <&dma0 AT91_XDMAC_DT_PERID(16)>,
+ <&dma0 AT91_XDMAC_DT_PERID(15)>;
+ dma-names =3D "tx", "rx";
+ status =3D "disabled";
+ };
+ };
+
flx6: flexcom@e2020000 {
compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
reg =3D <0xe2020000 0x200>;
@@ -238,6 +431,80 @@ uart6: serial@200 {
};
};
=20
+ flx7: flexcom@e2024000 {
+ compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+ reg =3D <0xe2024000 0x200>;
+ ranges =3D <0x0 0xe2024000 0x800>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 41>;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ status =3D "disabled";
+
+ uart7: serial@200 {
+ compatible =3D "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
+ reg =3D <0x200 0x200>;
+ interrupts =3D <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 41>;
+ clock-names =3D "usart";
+ dmas =3D <&dma1 AT91_XDMAC_DT_PERID(20)>,
+ <&dma1 AT91_XDMAC_DT_PERID(19)>;
+ dma-names =3D "tx", "rx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ atmel,fifo-size =3D <16>;
+ atmel,usart-mode =3D <AT91_USART_MODE_SERIAL>;
+ status =3D "disabled";
+ };
+ };
+
+ flx8: flexcom@e281c000{
+ compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+ reg =3D <0xe281c000 0x200>;
+ ranges =3D <0x0 0xe281c000 0x800>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 42>;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ status =3D "disabled";
+
+ i2c8: i2c@600 {
+ compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+ reg =3D <0x600 0x200>;
+ interrupts =3D <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 42>;
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ atmel,fifo-size =3D <32>;
+ dmas =3D <&dma0 AT91_XDMAC_DT_PERID(22)>,
+ <&dma0 AT91_XDMAC_DT_PERID(21)>;
+ dma-names =3D "tx", "rx";
+ status =3D "disabled";
+ };
+ };
+
+ flx9: flexcom@e2820000 {
+ compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
+ reg =3D <0xe2820000 0x200>;
+ ranges =3D <0x0 0xe281c000 0x800>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 43>;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ status =3D "disabled";
+
+ i2c9: i2c@600 {
+ compatible =3D "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
+ reg =3D <0x600 0x200>;
+ interrupts =3D <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =3D <&pmc PMC_TYPE_PERIPHERAL 43>;
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ atmel,fifo-size =3D <32>;
+ dmas =3D <&dma0 AT91_XDMAC_DT_PERID(24)>,
+ <&dma0 AT91_XDMAC_DT_PERID(23)>;
+ dma-names =3D "tx", "rx";
+ status =3D "disabled";
+ };
+ };
+
flx10: flexcom@e2824000 {
compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
reg =3D <0xe2824000 0x200>;
--=20
2.43.0