From nobody Fri Oct 2 14:03:25 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4EAEA329E55 for ; Thu, 30 Jul 2026 23:59:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785455999; cv=none; b=fvy3B5Dn03tdZQFotacIDbRigDVpjDAYz1wzb2No36StmsQY0x54q6G9pDQPO3MS8MyxrfSQtTu9FBTgkFyaUXL5lHWc252kAwNnudWIcduUBxF9KzZagNCblYHPNSbPzPOduqoqyb1llF7nPlKgrLNQ4Dwc4ygqSHR8TCvwJvA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785455999; c=relaxed/simple; bh=faq2wGSxsMVSchE61oiLGKgKUWNqvcjWWZI3S1ohCtU=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition; b=jGDEWG1Efo05sz5O2fjEUxw8QTElKpVkfepwPhkbWBLFKuJNAL4o2BPNRX1FJ9fbQUOlWuzg8NNL3mRjQIv89zOiQEMi9RRWWp8yO/cTeu3EunbLkbIENpb+e2ZmHArQb55jD5sQH9RRC4TAqxRpRywM7S7kMt37kTsnsLR3k9k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GR8G/zlh; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GR8G/zlh" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D00541F000E9; Thu, 30 Jul 2026 23:59:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1785455997; bh=VaTnS7hpKSnUBmqbq1FB7m+uUqcITQ9K46RYljTmrSY=; h=Date:From:To:Cc:Subject:Reply-To; b=GR8G/zlhI7SxGQsYTJDPxdA5ln6BwFc8VhdE7eb1c0uIIKON9nmkoCeMYz46AI5cI 5hIfLO0CV+nILSEDG5mBOlWDDmn9XYFVPKLaNlHYq0gU1j7+X8ffOW6mFAv1JLpH07 ae5q38MYuHGuB1qgHF7DryVOZ+qVDHHgTzMlTP1vqlRr189XkOyNq2bT3UyjMf3FRb D1/e0ZYFO90mzNZFof44bzebbTr6LD6STCAYOZHuS0+2YIiefTf+bVH0CMRMoIpy1Z lmgs6PnuhSx9vIXlQneilfgWlkxFH5Qx5+O0B4tRVPa7JnoNl1aeFQAziYSfLov+Ax 9psxR6CWVMR2A== Received: by paulmck-ThinkPad-P17-Gen-1.home (Postfix, from userid 1000) id 97864CE0F69; Thu, 30 Jul 2026 16:59:57 -0700 (PDT) Date: Thu, 30 Jul 2026 16:59:57 -0700 From: "Paul E. McKenney" To: Catalin Marinas , Will Deacon , Jinjie Ruan , Ada Couprie Diaz Cc: linux-arm-kernel@lists.infradead.org, "Peter Zijlstra (Intel)" , linux-kernel@vger.kernel.org Subject: [PATCH RFC] arm64: Mark set_preempt_need_resched() access to .need_resched Message-ID: Reply-To: paulmck@kernel.org Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The .need_resched field can be accessed from both task level and from interrrupt handlers, so apply WRITE_ONCE() to the update in set_preempt_need_resched(). This also brings arm64 in line with s390 (which uses atomic operations) and x86 (which uses inline assembly). Other architectures avoid this issue via the empty definition in include/asm-generic/preempt.h. KCSAN located this issue. Signed-off-by: Paul E. McKenney Cc: Catalin Marinas Cc: Will Deacon Cc: Jinjie Ruan Cc: Ada Couprie Diaz Cc: Reported-by: "Paul E. McKenney" --- preempt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/preempt.h b/arch/arm64/include/asm/pree= mpt.h index 932ea4b6204289..610853da140a78 100644 --- a/arch/arm64/include/asm/preempt.h +++ b/arch/arm64/include/asm/preempt.h @@ -28,7 +28,7 @@ static inline void preempt_count_set(u64 pc) =20 static inline void set_preempt_need_resched(void) { - current_thread_info()->preempt.need_resched =3D 0; + WRITE_ONCE(current_thread_info()->preempt.need_resched, 0); } =20 static inline void clear_preempt_need_resched(void)