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[188.123.113.247]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9eb16d9774sm324040166b.65.2024.11.06.11.06.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2024 11:06:01 -0800 (PST) Date: Wed, 6 Nov 2024 20:05:59 +0100 From: Stanislav Jakubek To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Orson Zhai , Baolin Wang , Chunyan Zhang Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/5] arm64: dts: sprd: sc9863a: reorder clocks, clock-names per bindings Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" DT bindings expect the SC9863A clock-controller clocks/clock-names to be in a specific order, reorder them. Signed-off-by: Stanislav Jakubek Reviewed-by: Baolin Wang --- Changes in V2: - new patch arch/arm64/boot/dts/sprd/sc9863a.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/sprd/sc9863a.dtsi b/arch/arm64/boot/dts/sp= rd/sc9863a.dtsi index 31172ac44adc..e97000e560e7 100644 --- a/arch/arm64/boot/dts/sprd/sc9863a.dtsi +++ b/arch/arm64/boot/dts/sprd/sc9863a.dtsi @@ -163,18 +163,18 @@ gic: interrupt-controller@14000000 { ap_clk: clock-controller@21500000 { compatible =3D "sprd,sc9863a-ap-clk"; reg =3D <0 0x21500000 0 0x1000>; - clocks =3D <&ext_32k>, <&ext_26m>; - clock-names =3D "ext-32k", "ext-26m"; + clocks =3D <&ext_26m>, <&ext_32k>; + clock-names =3D "ext-26m", "ext-32k"; #clock-cells =3D <1>; }; =20 aon_clk: clock-controller@402d0000 { compatible =3D "sprd,sc9863a-aon-clk"; reg =3D <0 0x402d0000 0 0x1000>; - clocks =3D <&ext_26m>, <&rco_100m>, - <&ext_32k>, <&ext_4m>; - clock-names =3D "ext-26m", "rco-100m", - "ext-32k", "ext-4m"; + clocks =3D <&ext_26m>, <&ext_32k>, + <&ext_4m>, <&rco_100m>; + clock-names =3D "ext-26m", "ext-32k", + "ext-4m", "rco-100m"; #clock-cells =3D <1>; }; =20 --=20 2.43.0