From nobody Tue Jul 28 10:51:54 2026 Received: from mail-wr1-f46.google.com (mail-wr1-f46.google.com [209.85.221.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90805409270 for ; Wed, 8 Jul 2026 15:38:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525113; cv=none; b=MPUNsi5U6u2NAoUatWR4ib2+hSrXLMQv7m2ZpTkoXhcpc85jN1tiCYuLp3r4n2PX1iUJT/9yrFnlybHiLMQABV/pGn+gjITXQLin3ZzHLqUw1q0i7uj8vBbH7BV7DM/QGhbFnocm1/t3tnaCw3J4wC5FDYpDgd9o657cWMarI1s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525113; c=relaxed/simple; bh=jp/3N5Agf7eCCJsJNwDYCLTyVl2tbpreHebJX8abW1U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=aAclUqw23DtlTMS29Po1DpkIp3Cb33u8Rp5kesc/6Fuda3eZvQ9/N974XvVXPIvLVznpx0nCFbQkSFuuE4mI61PNysyhT23V1Oyn2CMeuzwkK6Z0ft4pUCclTZpVnf89VVLbT1JWSnvBByMrx5AHEJ8m9Buok56tfsRP5M980WQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com; spf=pass smtp.mailfrom=9elements.com; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b=UeFvW53Q; arc=none smtp.client-ip=209.85.221.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=9elements.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b="UeFvW53Q" Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-4758b2a9e2aso591228f8f.2 for ; Wed, 08 Jul 2026 08:38:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; t=1783525110; x=1784129910; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=aX3VKusEpXR9oPYMG8wA1f/3Abd5fn9FdmFI4yazez0=; b=UeFvW53QO/fKzqaHfcpUhAgiXcoP4oiuensEDtKUJu2dQecoWTE+nzYI3rL6nWAs3/ O+uaHNtVc98gsXoJFZ4Ntbm3jMedsBQBHNbDyFxPcPS0ypKQDSSuvI5bj69XoNvaceiq rBs9WpI8EZpa/UULVz/9iCrX/BYYCTtsW9wiKl36ULWhVIFqUzDc8HPw0/IzMDDiWwpB EaK7GOV0/nGHNIRqemYaUuQSuuZSW6wtuEShGtOiZYRxDjtIJHg8S/xanb4YJm8mQOjN 9b42yy8S7fMrcZjRdcn+f0mCsVn5gGGwJE7RbNKC459mpxJ51l3gMITXyYR3q+AS0lJR rDBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783525110; x=1784129910; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=aX3VKusEpXR9oPYMG8wA1f/3Abd5fn9FdmFI4yazez0=; b=XInnzfRWHsw9v3XBqBQa79QeI5mQegbljC3mWVvPkamw2dYdDPy+PwV/NnHfVLH4uU hqjcArbxZeVrP09b8WsxvDbtm7wa5270vs1S1IjH7xlzJ1MBSFTQW/9jgQoAncFy7284 c07lB9uLwcZIN+wknlWdRu62iCTMtmAHElYKGG3IAGXANMw18kGh5OASKSS7AWlalmWK e5Q2Ab1xhjKposhhEmg8T7pG4JRRrvJeMfV5jyEDCXvb12eN+HS/gbIi8ts8TV2IbpVD jVsnGMKvZ/Tf0/u0uG0W8Ltnix5EVERdfk3lOVbxZkZoKlWl807g7UnXbpIfUN2i1eks 50ng== X-Forwarded-Encrypted: i=1; AHgh+RpKVO3mN9jfU4YFzKJKGEH8jk+dSmBWVc9ng8xmR+EZmfAmvpMdQM5b/FKIJOuTxc1e1Z4oxd78ZTTFY78=@vger.kernel.org X-Gm-Message-State: AOJu0YzIidwi4iFG/RdynQy4AhLS/6c2WbOInqDy+hXkobQWUNtOnjqW gj7CW/IXcKJm2yWej80pKwxSxdN8Bk3x2aTaQU1ZH0uoukOBqGypnxuSVqexgdbzUjg= X-Gm-Gg: AfdE7cnsc1+oewgpPcvEeex9yLs0m+7wolgyFwd+PTKcM2WcLzsLWRGd9dYGYIGDnXO 0vZDkx2kgq7HkQdftUmYUSejEmMWYoMg9DFcfDO/IotKBWucpSNMHjuMY4TiC5CoYZtfgnxg9uD J7/yCqA4exf9RmGQjDoU3f47ChVJPKkO2sGwWRDUxGEzsuFmehEZ5DbVKSRvJ62O2w9AC0Bo4cC eOt0F5Z8CYabP6xFBelepZbPZIS8eG7OwupKvOFVYEuX6Ygxz6DK1bQkuHcroMquvxPD/gWIiNp PIixi1v+jnH0ztwpBsMcGkdGAbWrJM1tiSBeEhtbIhlB0FiB6nCNJ8uVSxwXyobJVBKy/vtSZqB WPxiyr11tgJtJXgEY2/3yRfv0wkVOliW6uYrc1Isf+3+Wn7GQqTyGT+hl1dn7pHrX5535/SNzOQ vdYtmUf5qqclM3SG+6Jyo5xzvdgy3mZhyu7Vo8+Arc8x3q9GUYRQ1gy0x66oA3mFGnfRrBpZKbD viH0pjBsGOk/4AEzKYyKj9igBzB6rkpQQ4jMPQ= X-Received: by 2002:a05:6000:25c8:b0:474:9dd3:981 with SMTP id ffacd0b85a97d-47df07314bbmr3555871f8f.26.1783525110073; Wed, 08 Jul 2026 08:38:30 -0700 (PDT) Received: from gregwork.sec.9e.network ([188.111.3.154]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47a9e4d8410sm44254136f8f.15.2026.07.08.08.38.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2026 08:38:29 -0700 (PDT) From: =?UTF-8?q?Gr=C3=A9goire=20Layet?= To: joel@jms.id.au, andrew@codeconstruct.com.au, lkundrak@v3.sk, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andrew@lunn.ch, jacky_chou@aspeedtech.com, yh_chung@aspeedtech.com, ninad@linux.ibm.com, anirudhsriniv@gmail.com, linux-serial@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Gr=C3=A9goire=20Layet?= Subject: [PATCH v4 1/7] dt-bindings: serial: 8250: aspeed: add compatible string for ast2600 Date: Wed, 8 Jul 2026 15:35:53 +0000 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The ast2600 was using the ast2500 vuart compatible string. Make it possible to have ast2600-specific properties. Signed-off-by: Gr=C3=A9goire Layet --- .../devicetree/bindings/serial/8250.yaml | 24 ++++++++++++------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documenta= tion/devicetree/bindings/serial/8250.yaml index bb7b9c87a807..8f22121381fc 100644 --- a/Documentation/devicetree/bindings/serial/8250.yaml +++ b/Documentation/devicetree/bindings/serial/8250.yaml @@ -23,7 +23,10 @@ allOf: then: properties: compatible: - const: aspeed,ast2500-vuart + contains: + enum: + - aspeed,ast2500-vuart + - aspeed,ast2600-vuart - if: properties: compatible: @@ -106,6 +109,9 @@ properties: - const: ns16850 - const: aspeed,ast2400-vuart - const: aspeed,ast2500-vuart + - items: + - const: aspeed,ast2600-vuart + - const: aspeed,ast2500-vuart - const: intel,xscale-uart - const: mrvl,pxa-uart - const: nuvoton,wpcm450-uart @@ -287,17 +293,19 @@ properties: aspeed,sirq-polarity-sense: $ref: /schemas/types.yaml#/definitions/phandle-array description: | - Phandle to aspeed,ast2500-scu compatible syscon alongside register - offset and bit number to identify how the SIRQ polarity should be - configured. One possible data source is the LPC/eSPI mode bit. Only - applicable to aspeed,ast2500-vuart. + Phandle to aspeed,ast2500-scu or aspeed,ast2600-scu compatible syscon + alongside register offset and bit number to identify how the SIRQ + polarity should be configured. One possible data source is the LPC/e= SPI + mode bit. Only applicable to aspeed,ast2500-vuart and + aspeed,ast2600-vuart. deprecated: true =20 aspeed,lpc-io-reg: $ref: /schemas/types.yaml#/definitions/uint32-array maxItems: 1 description: | - The VUART LPC address. Only applicable to aspeed,ast2500-vuart. + The VUART LPC address. Only applicable to aspeed,ast2500-vuart and + aspeed,ast2600-vuart. =20 aspeed,lpc-interrupts: $ref: /schemas/types.yaml#/definitions/uint32-array @@ -305,8 +313,8 @@ properties: maxItems: 2 description: | A 2-cell property describing the VUART SIRQ number and SIRQ - polarity (IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_LEVEL_HIGH). Only - applicable to aspeed,ast2500-vuart. + polarity (IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_LEVEL_HIGH). Only + applicable to aspeed,ast2500-vuart and aspeed,ast2600-vuart. =20 required: - reg --=20 2.54.0 From nobody Tue Jul 28 10:51:54 2026 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BBDA409280 for ; Wed, 8 Jul 2026 15:38:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525116; cv=none; b=cughVtkFz6tVOJ5z5tr6+oDPrQNrDC12g5Sx6HyK4O3X15yRPXfmhrZ6WtzXsEX1n3zKaNlXXrf8eRU2PE6prLSH52WqUbx4NX9v5cDP4/SfBtdzSQ9zZW/trB3Vt5oW81KulUAM1GvUOAMC/qaN1L/kmlgoyxYtAr57QsDJEvA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525116; c=relaxed/simple; bh=ZnhkDKdmhPBrpcYhAlSCSGgrlpqxEa3PkV+ULDwJizo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=vE7hg66MQ8Cur/NzDeWAALpdUpkalm2rlCye/9mO4OnWisXzYR62XqlsjogYCwoMWh1c3J836RO93BQkCesH9PbdZ1dIxHv2+W6LpUelSzvYrapJbCziytB0hm44+6RgpDTELxv+bLjE5mOMf6Ymj/eFhzFZjwaix2MczzaJUAg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com; spf=pass smtp.mailfrom=9elements.com; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b=D4HOHQFY; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=9elements.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b="D4HOHQFY" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-493c00f74baso5867185e9.0 for ; Wed, 08 Jul 2026 08:38:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; t=1783525114; x=1784129914; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=IsD4MhplgL6wFfLDJdfUVLAz4oGDfnauFOzTWjsK6XA=; b=D4HOHQFYQs2mCjYqr5QbHdBbuklmKbUgOoIGU2oq0IJ2ZUpmZNJZUJKgz83oNyPGf8 BR7Q3UM9Vie9rDs29vVWDhsgx/M35c54g9lk3bVpYP6Zswf/9uZEc7Ar5voIACNJtYkD RZV1W/OzFA1RC/xajubhTJ8bPt/iRD9l1kTpk9CPCMynOUd6nokxspSgD0MezARVwopY 8fAlryyxfCA1/n/pzUNdmwUPCmFKD/772ncO4KAK3fO6FlKryrDS9vJaOtFEYXYJbEwF AXkLbgBQrHz07kx/fwqqnoMncix5eSmK0GeX6DcWGk5fxaO7eEdg+zGIk1j99GYaY0um Mgjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783525114; x=1784129914; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=IsD4MhplgL6wFfLDJdfUVLAz4oGDfnauFOzTWjsK6XA=; b=Q38tYqqH/2lK3nzgaUevXh5K/a0TmlaToS9JeUSdT0NPu9hRNCS6KIhzVYWsQSmU5g z3p9CHIFg5TjEaW/7kzUXSOazp6OYNJNOTG/I/CELwuDSuHxiAyjC72hQu/DyZ5DZOXm boZEu3wyjMomiI1YrRObVUk+9VpMURBTuw0D5KKrXbzWVaKxbC06eHOXk305kHkqVqWK Y6m1tctycaRaV1NVDARt4M//o2dgnaqa/65rqb3rhcKobj5OAUqLuMu2za01pe/b5OKh InzayohnsXAyWwF59nef2opQiauVc9xLOMNB2uW4wTbk3j3/yd7XRoeeUr521JhOThaV nx5g== X-Forwarded-Encrypted: i=1; AHgh+RrnLQWJt6C1lRHZoyqGjw8eA36ljHxRZA24QZWe1rfqCk0d5DRF0wY0FgYFwqdOFCTfq/MJUAX0q/M+ObA=@vger.kernel.org X-Gm-Message-State: AOJu0YzELbstmFe0B3ZHvQeBm9dP8RhHWA8+3eVk2nI7BDMud7QlffNd fFTsQ6K4wcIUTCPJFow9gV7D/nBzp82YTIG/n4xPf6Plu7ITpPW+3QVyAGL85EbtzCI= X-Gm-Gg: AfdE7cnZw56woOGrUqAN5szIP/O/See2hqOg8wBRMK+aqAd181kA/iZEc9RsERP/GPj HUBdhGXdDcvK/7oASuxzqtKdt08yRHChU/tfIgbcbvVGqGDsJENiDF0gO7P8tGkQj0UN23fRngN oDNkrQb1IJ6h2mMVR+CQYAPtHmCubEXf1WFA07exS/xOG0VFuN2S9A5f2C/aLy7ZVSSITMBgR46 VHt9jXGwKH2J7QPyJlWvON7xw8OmfdXQS0ZiInEmL1bIZnW0zgJBPfLlNxRJNS5KNT1fakUexeV T8Ck+tJLxpN+SfLcQynndOedmnYCK2+ukq1TaWvZnXo0hdT475E5Pe5xdECkyI1X3P3RobKhI4V +5HeoURbX90O+Oa1ktM7wHbK+WsF4VVcUNdD5MztHWw+Cb4B1FPqr6+trsgWWW6eQvXz6ZR0+qa zsjH1tRTcbBsUCc9W5oyTRefQyaIx4oWaVMyQ0vFhCmRWv0uo8fk0wQy1wROEHtSqqLSQd07jXb UR2q8Ip4s8L0GKy9wCBBky27J52 X-Received: by 2002:a05:600c:1395:b0:493:a435:d870 with SMTP id 5b1f17b1804b1-493e68ce31cmr32926785e9.27.1783525113666; Wed, 08 Jul 2026 08:38:33 -0700 (PDT) Received: from gregwork.sec.9e.network ([188.111.3.154]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47a9e4d8410sm44254136f8f.15.2026.07.08.08.38.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2026 08:38:33 -0700 (PDT) From: =?UTF-8?q?Gr=C3=A9goire=20Layet?= To: joel@jms.id.au, andrew@codeconstruct.com.au, lkundrak@v3.sk, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andrew@lunn.ch, jacky_chou@aspeedtech.com, yh_chung@aspeedtech.com, ninad@linux.ibm.com, anirudhsriniv@gmail.com, linux-serial@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Gr=C3=A9goire=20Layet?= Subject: [PATCH v4 2/7] dt-bindings: serial: 8250: aspeed: add aspeed,vuart-over-pci bool prop Date: Wed, 8 Jul 2026 15:35:54 +0000 Message-ID: <501428d6a6cb1548bf357c25313dbc319724ead2.1783524645.git.gregoire.layet@9elements.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The ASPEED AST2600 has 2 Virtual UARTs accessible over PCI. The ASPEED AST2600 can be used as a PCI device. 2 Virtual UART can be exposed to the host via this PCI device. These are 8250-compatible register sets and can be used to have UART communication between the PCI BMC and the host. This boolean can be set to specify if a VUART is used over PCI. A VUART over PCI needs a syscon phandle. The syscon gives a regmap to the SCU, which is used to set the enable bits of the PCI device. On the aspeed's chips, the clocks phandle already points at the SCU node. But deriving the regmap from the clock provider would misuse the clocks binding. An explicit syscon phandle states the dependency directly. Signed-off-by: Gr=C3=A9goire Layet --- .../devicetree/bindings/serial/8250.yaml | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documenta= tion/devicetree/bindings/serial/8250.yaml index 8f22121381fc..2ea8981bba80 100644 --- a/Documentation/devicetree/bindings/serial/8250.yaml +++ b/Documentation/devicetree/bindings/serial/8250.yaml @@ -27,6 +27,16 @@ allOf: enum: - aspeed,ast2500-vuart - aspeed,ast2600-vuart + - if: + required: + - aspeed,vuart-over-pci + then: + required: + - syscon + properties: + compatible: + contains: + const: aspeed,ast2600-vuart - if: properties: compatible: @@ -223,6 +233,12 @@ properties: - const: uartclk - const: reg =20 + syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the SCU syscon, used to enable the VUART over the BMC PCI + device. Only applicable to aspeed,ast2600-vuart. + dmas: minItems: 1 maxItems: 4 @@ -316,6 +332,12 @@ properties: polarity (IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_LEVEL_HIGH). Only applicable to aspeed,ast2500-vuart and aspeed,ast2600-vuart. =20 + aspeed,vuart-over-pci: + type: boolean + description: + Enable the VUART over the BMC PCI device. Only applicable to + aspeed,ast2600-vuart. + required: - reg - interrupts --=20 2.54.0 From nobody Tue Jul 28 10:51:54 2026 Received: from mail-wr1-f49.google.com (mail-wr1-f49.google.com [209.85.221.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 814A1409291 for ; Wed, 8 Jul 2026 15:38:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525118; cv=none; b=IvGVVr0fZ7pv4FhnmG7bmwkpqHzLpaW7rg23pUtxKHMk9ixSy0qIVLz+mpuarMeK9l1YOf1UfNFHFwnYP6VIy86dEjK+7ufg01UnnXHpz6ZcRw+giDgAce2/tqHzYVn3j3WUQZP8G+tWdnIxuAomlYeGFSZUCQv/VA6kd1Z+v3M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525118; c=relaxed/simple; bh=a230ZCfC90axJlgwhM1ZKMw6zyzB++PhLGa2dLzKeqQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=u+QEHPT2cEeKymHp0tetwfQ+ToG7Y9WED/LPIG2sq6EIyLXLuVGs6xqmSzJ+wFDnn0C/xp4IDx6FdzMRkz+KNhMiEUJAQYy0I+vHggJ5x0StNgjDVuzbTFL2mGl3yXVPwnHqcRmMjWwSnMrEpnoMKEtIpa+Q/BhP2ptXsqf4dE0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com; spf=pass smtp.mailfrom=9elements.com; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b=OdsNy9N5; arc=none smtp.client-ip=209.85.221.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=9elements.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b="OdsNy9N5" Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-4758b2a9e2aso591314f8f.2 for ; Wed, 08 Jul 2026 08:38:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; t=1783525116; x=1784129916; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=43Zhfg5+4+Z1uzvRXKb3yHpIvITffod/8Jre6ZQvzL4=; b=OdsNy9N5KI97zM6qtxm4ujw8KE+hgMkzPMfq4GF07GRABfgAzLMM6GY+aSxssz/sdj V6MPY3RBo9PrvzA11mnZUWTkMQngL8Vs0kZcLHo3sxAj2X20Rwkz2fa6iowGdo7lxeVT a2b7J+pgVYFJCEK8U9/dkPxfH3MKh60/5vhEehtuiUxHzSqNNZT/xNz/4ofglX5FUops M7gEEQbrwivlD+X/y3h4hwsbPyxtJDTiNNu1IT/4vfyFSz4o2IOR7Sfaw+agarBpNebk 089JHP4sI5XERdF8OXdgjlB1PWZWPKltoMfDC0ksTW2U0GIvguyRF7Ek14ul02XiDbPz yWMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783525116; x=1784129916; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=43Zhfg5+4+Z1uzvRXKb3yHpIvITffod/8Jre6ZQvzL4=; b=MgrlF9hckkvvZ+AoD0EANufsjvbb3+kSoaYWpPHzNp+kVfQoIf3ZG+plfkxZN2XDHM pHKIbIFk6qoAFAavkAn24ZnQ5/udxKCPJguBi4VKjNpaSgPy787OAZQejaLolt7e+v3B iKM2k7ctfN+lFYF7x6vaINcw55MpML1zDHXceGK5sJcQ9JcAXdfZAPBwPw9AFb+Y5cn2 PdSyRBKAlIYmPG52azPuX90VtPWcsamXJ7KUwhWSZWMfRhDsICGnvleWzKshKdzucCDP bGe3mBIkXeTqo7rmcq0Tz1fILsSwISqHHd4T9oYcQsuqHTtvVyMdQ3rTQPAhaHX0OXlI I4vg== X-Forwarded-Encrypted: i=1; AHgh+RrPi93ZcqyIspNHZR03Mwp9f2lxK97ymWxz6Q76rvPEBoZdLTIOmQDQff5xSiwK8+ISJECYNuqjKJvi0N4=@vger.kernel.org X-Gm-Message-State: AOJu0YxlhLwseaNgOoqgPtImxt3R+cJnd5TBLsYnSt5pvbw4/7T0lCML HRikY4El4CRjEFYJKT8lwFxLzV8Wjg0i4fiHqX3mHpGRk97TPHzE7igI6wl0Tes+934= X-Gm-Gg: AfdE7cmlnmqYdwmnpLAddvyVNCp59Y7yL6duGtX8u1OaOZRI6wI/aZ6uEXjFK0d/6IW 0+UfD9Yp44GVoKXQ5jPTmKoKjFGulAEVqyFG6UDKIc0TDQD2B4xVk6JwZWufVAUkM/3fVaTBcvv 55x+j/CfvcJ0nLq8FbLqwsop4OcmVgUPsDnlzwaprmxmmRi+6Vq/haFSrGGSMmoXQwvVc73+rLL LNcEYNH5Ifbx48XkvvG+CKsaAV+TU1BG/dS2tVKkfowhG6emp/MfvJo7WKaeK2N6HxeJob6tt14 /7ek2Zdl4qotcbtiLOiIJ2/ZcR68J5qPGOmcg4bGduWwfGiAHyMx9bbyguOSnIuJr2db4+6r/ub 7YOMCEOo9xq0cOYYKOiU+SR++/MT8gM0ZUkMdfIifGObU+y4gWeJbwZ5e0nSSfdFjDK+kZT5FYi eAznk5ezZ6RfRtCOuy+3h/ZBTyA9TSFqKvsooRCJk+004P+U5BPeTuHk8esrIN+nZkfinIU3AbM TrJzICr+e/ptuYNrKRIyavy44cW X-Received: by 2002:a05:6000:2510:b0:477:80fa:f462 with SMTP id ffacd0b85a97d-47df075e2c5mr3515239f8f.35.1783525115919; Wed, 08 Jul 2026 08:38:35 -0700 (PDT) Received: from gregwork.sec.9e.network ([188.111.3.154]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47a9e4d8410sm44254136f8f.15.2026.07.08.08.38.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2026 08:38:35 -0700 (PDT) From: =?UTF-8?q?Gr=C3=A9goire=20Layet?= To: joel@jms.id.au, andrew@codeconstruct.com.au, lkundrak@v3.sk, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andrew@lunn.ch, jacky_chou@aspeedtech.com, yh_chung@aspeedtech.com, ninad@linux.ibm.com, anirudhsriniv@gmail.com, linux-serial@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Gr=C3=A9goire=20Layet?= Subject: [PATCH v4 3/7] serial: 8250_aspeed_vuart: add aspeed,ast2600-vuart compatible string Date: Wed, 8 Jul 2026 15:35:55 +0000 Message-ID: <3598f3d668717082adbffa5179b4afbe39b2a946.1783524645.git.gregoire.layet@9elements.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Make the driver compatible with the ast2600-vuart. Enable specific configuration for the AST2600. Signed-off-by: Gr=C3=A9goire Layet --- drivers/tty/serial/8250/8250_aspeed_vuart.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/tty/serial/8250/8250_aspeed_vuart.c b/drivers/tty/seri= al/8250/8250_aspeed_vuart.c index 26fc0464f1cc..6afa2f4057e1 100644 --- a/drivers/tty/serial/8250/8250_aspeed_vuart.c +++ b/drivers/tty/serial/8250/8250_aspeed_vuart.c @@ -560,6 +560,7 @@ static void aspeed_vuart_remove(struct platform_device = *pdev) static const struct of_device_id aspeed_vuart_table[] =3D { { .compatible =3D "aspeed,ast2400-vuart" }, { .compatible =3D "aspeed,ast2500-vuart" }, + { .compatible =3D "aspeed,ast2600-vuart" }, { }, }; MODULE_DEVICE_TABLE(of, aspeed_vuart_table); --=20 2.54.0 From nobody Tue Jul 28 10:51:54 2026 Received: from mail-wr1-f44.google.com (mail-wr1-f44.google.com [209.85.221.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5CCA41CB29 for ; Wed, 8 Jul 2026 15:38:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525121; cv=none; b=KbzrNmAL+NBs94PTtAvHRFw8cU05YRr/QjbQN1NFs4w79pV993aobGaYwFnwdRedGKYgIYvHSgzRIYN4YZeRtA75CH5pwsO6QaZfuCUqkxmBTYQ8bgiJdwbIJTFjbZKm94Ihy8biV3+qOJN3TFEu89MhOiY/ZadbgFgSlBZO6DA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525121; c=relaxed/simple; bh=emLy3nV6PTOWJ5S8ZLEZtJdphacSFAURIEjAbHUF4OE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qJ8EphgxMRG5KXfBGXRIenNBr9AXHveIKFCZSBBHPX1M9ADIBPhNOdNQlBAEyXm4UPZpko5M00R4QXOQl3iFEDjBIcmxm53Y31K/ooAIoX+7aFLVFGbyaRvTJB23EaM7lMTekVENYJOnOWAFvSwcT06dnLOU5N3A6F34Lwvwq3k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com; spf=pass smtp.mailfrom=9elements.com; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b=CSIx4Rev; arc=none smtp.client-ip=209.85.221.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=9elements.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b="CSIx4Rev" Received: by mail-wr1-f44.google.com with SMTP id ffacd0b85a97d-471eeac43bfso858794f8f.3 for ; Wed, 08 Jul 2026 08:38:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; t=1783525118; x=1784129918; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=uZx0CqGWbyzDUzo0/NyEFqDoVb8LDJ7NHysAd8cbbL8=; b=CSIx4Rev4a+a+2Q0Q5c4FsqT05z/aesIljlgXbIazd4L7VT6u62Fzp88V3uilbsVrn ceDu5ZReFxBhy7Dl8ia6eQqbDIETAJxX6/JDqICFkEVAWTWOY5X5NM2DykpoqjwxRii0 tdtKVDK6AJrxuLRGPB1n/XAgkzaGl5OQi87a4krs7tbcWOQoWDAPMAkZhd7X/qdTijZi K1x3ww0mahqlikO2CHDwZXQU9sr/vb1cb0It1wxl+hl9ToQXIsWj4rC7YrojjHzW3QNQ 6ZZ+Lw42f9W4qVsN9/4VTkzSIBh9ofZApP57uEVuuZCWfTAyK0petT49dpd95hh2XE8V xFLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783525118; x=1784129918; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=uZx0CqGWbyzDUzo0/NyEFqDoVb8LDJ7NHysAd8cbbL8=; b=JRmquuNTKxEQxJaaSItoDnJyb/omiYUF7vDu6har6KRxfNQxaLlBzGfFOJ2c7sfe47 5vnvCRc1SxCLkEOFkrclT/sQHOJH3TSngkQik+p1wbyYOc4D6ZKTEsCq4aZhD12QSXmM kcVXvNbsadQaJWn1cKtCvDBNs5RhTwpblJ7LvB7KnQS3gJlfLWaAAoBJjnDcpSHk2FMh KYCuZCUSYMUbxb4RmXW1sgm0D3CIjhxtLzaSfAgwKW4TRqO+7MSjiZRLy71+Wd6qzvY+ xRjSV8Jdft/GLYGZEk7kdtxQt/f28BeWqcyqqbc1CDJJN5OdZsMrEA0MximzQpVUGUFI 2ueg== X-Forwarded-Encrypted: i=1; AHgh+Rr6LRhBZGwmZaLFpB3nivfi0curiJNa9H9wuabiVIioN+Rey8yEfwVlObdRdptoaTrFZGzzq3zWOPdzjoU=@vger.kernel.org X-Gm-Message-State: AOJu0Yzup6ZTZhpys5tNEHlqCREYf+KDHTiPkL3z4Hd3xibGg83SEZI3 eCh+nP+1HS/GKLglu0b8QP4iDNm7TP9qtvMEpPL4M3lZhlCzMR1iG2+gklgPIRG9KAs= X-Gm-Gg: AfdE7ck1KqjrUskFdhRBWdQSrtoUFaspRNzTroF456vOLMbjuRlI7SZV6NDsgFiQ+DA UIUofI1UQFjwgAjDpt1O3EmU/7+0n097ym59ZDOEv9pmno+3v7XkDJQPnmsa7Q1iilq2MgdKbRq UlP77HV9poBEDrHk9LLblb5y6yWoR49Sue6QFmS8Ou4UtX+T3HKJ0pK+pJG7ualW2ervylb1/M8 jPu+HOmwptbdh4tKA57R/pcPtDxVQFJRZ20w4VRlK5okKovpByM/MZKZLH3JT0Oa8WHf3t1nL6w OFzG/E5f3LTiIyTlOoEBfmYrtT6DGdH2qezp1TetmkelGL1l4963UJbRFkJLwmGdsee+SIVkJ/j KKWVenfSE9yf7Vzg9XSWyrZJF9N3KobdEVcxe0bbtg6hjkqseNrjdhRn3ck5fseflZJ8A3Sc9tT WaoRhcErMTF+qfjHCsgrVBzQF2uKgIABSGtEliD0ltgOdFRDRISVopqpei3VeCydw2DUXGr3YaT /s+Ius6RujRYXjgfVWHWvB0Q1VRJdy2pF8Ew3c= X-Received: by 2002:a5d:5846:0:b0:472:edc7:b4c9 with SMTP id ffacd0b85a97d-47df07896demr3174799f8f.38.1783525118187; Wed, 08 Jul 2026 08:38:38 -0700 (PDT) Received: from gregwork.sec.9e.network ([188.111.3.154]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47a9e4d8410sm44254136f8f.15.2026.07.08.08.38.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2026 08:38:37 -0700 (PDT) From: =?UTF-8?q?Gr=C3=A9goire=20Layet?= To: joel@jms.id.au, andrew@codeconstruct.com.au, lkundrak@v3.sk, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andrew@lunn.ch, jacky_chou@aspeedtech.com, yh_chung@aspeedtech.com, ninad@linux.ibm.com, anirudhsriniv@gmail.com, linux-serial@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Gr=C3=A9goire=20Layet?= Subject: [PATCH v4 4/7] serial: 8250_aspeed_vuart: add VUART over PCI Date: Wed, 8 Jul 2026 15:35:56 +0000 Message-ID: <28c6e7c493559feffc7e6231b0a2f0b73b7fda41.1783524645.git.gregoire.layet@9elements.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Enable the VUART over PCI for the AST2600. Activate it only if the 'aspeed,vuart-over-pci' property flag is set on an 'ast2600-vuart' compatible node. The AST2600 has 2 VUART that are usable over PCI. These are already defined= as the VUART3 and VUART4 in the 'aspeed-g6.dtsi'. Sets the BMC PCI device enable bits, sets the PCI class code to unassgined/device specific, and configures MSI interrupts. There is no disable function. Removing this driver should not disable the BMC PCI device, as other drivers could use it. However, if all the drivers using it are removed, the BMC PCI device will still be activated, which is not ideal. But in reality, this is not a use case for a BMC, the drivers will never be removed. This is useful on PCIe BMC expansion cards that use the AST2600, such as the ASUS Kommando IPMI Expansion Card. Register initialisation taken from ASPEED 6.18 Kernel SDK. Add return code checks to each register write. Simplify the code and add macros. The ASPEED_SCUC24 regmap update is missing a macro for 'BIT(14)'. I was unable to determine the purpose of this bit. In the AST2600 A3 datasheet it is marked as 'reserved'. It is only used on the other revision. As I only have the AST2600A3, I was unable to try this code path. This BIT14 was set in the ASPEED SDK so I kept it. I can remove it and the untested path if necessary. Signed-off-by: Jacky Chou Signed-off-by: aspeedyh Signed-off-by: Gr=C3=A9goire Layet --- drivers/tty/serial/8250/8250_aspeed_vuart.c | 86 +++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/drivers/tty/serial/8250/8250_aspeed_vuart.c b/drivers/tty/seri= al/8250/8250_aspeed_vuart.c index 6afa2f4057e1..4d09c04cb972 100644 --- a/drivers/tty/serial/8250/8250_aspeed_vuart.c +++ b/drivers/tty/serial/8250/8250_aspeed_vuart.c @@ -32,6 +32,26 @@ #define ASPEED_VUART_DEFAULT_SIRQ 4 #define ASPEED_VUART_DEFAULT_SIRQ_POLARITY IRQ_TYPE_LEVEL_LOW =20 +#define ASPEED_SCU_SILICON_REVISION_ID 0x04 +#define AST2600A3_REVISION_ID 0x05030303 + +#define ASPEED_SCUC24 0xC24 +#define ASPEED_SCUC24_MSI_ROUTING_MASK GENMASK(11, 10) +#define ASPEED_SCUC24_MSI_ROUTING_PCIE2LPC_PCIDEV1 (0x2 << 10) +#define ASPEED_SCUC24_PCIDEV1_INTX_MSI_HOST2BMC_EN BIT(18) +#define ASPEED_SCUC24_PCIDEV1_INTX_MSI_SCU560_EN BIT(17) + +#define ASPEED_SCU_PCIE_CONF_CTRL 0xC20 +#define SCU_PCIE_CONF_BMC_DEV_EN BIT(8) +#define SCU_PCIE_CONF_BMC_DEV_EN_MMIO BIT(9) +#define SCU_PCIE_CONF_BMC_DEV_EN_MSI BIT(11) +#define SCU_PCIE_CONF_BMC_DEV_EN_IRQ BIT(13) +#define SCU_PCIE_CONF_BMC_DEV_EN_PCIE_BUS_MASTER BIT(14) +#define SCU_PCIE_CONF_BMC_DEV_EN_E2L BIT(15) +#define SCU_PCIE_CONF_BMC_DEV_EN_LPC_DECODE BIT(21) + +#define ASPEED_SCU_BMC_DEV_CLASS 0xC68 + struct aspeed_vuart { struct device *dev; int line; @@ -412,6 +432,63 @@ static int aspeed_vuart_map_irq_polarity(u32 dt) } } =20 +static int aspeed_ast2600_vuart_over_pci_set_enabled(struct platform_devic= e *pdev) +{ + struct device *dev =3D &pdev->dev; + u32 silicon_revision_id; + struct regmap *scu; + int rc; + + u32 pcie_config_ctl =3D SCU_PCIE_CONF_BMC_DEV_EN_IRQ | + SCU_PCIE_CONF_BMC_DEV_EN_MMIO | + SCU_PCIE_CONF_BMC_DEV_EN_MSI | + SCU_PCIE_CONF_BMC_DEV_EN_PCIE_BUS_MASTER | + SCU_PCIE_CONF_BMC_DEV_EN_E2L | + SCU_PCIE_CONF_BMC_DEV_EN_LPC_DECODE | + SCU_PCIE_CONF_BMC_DEV_EN; + + scu =3D syscon_regmap_lookup_by_phandle(dev->of_node, "syscon"); + if (IS_ERR(scu)) { + dev_err(&pdev->dev, "failed to find SCU regmap\n"); + return PTR_ERR(scu); + } + + /* update class code to be an Unassigned/device specific class device */ + if (regmap_write(scu, ASPEED_SCU_BMC_DEV_CLASS, 0xff000000)) { + dev_err(dev, "could not set PCI class code\n"); + return -EIO; + } + + if (regmap_update_bits(scu, ASPEED_SCU_PCIE_CONF_CTRL, + pcie_config_ctl, pcie_config_ctl)) { + dev_err(dev, "could not set PCIe configuration\n"); + return -EIO; + } + + if (regmap_read(scu, ASPEED_SCU_SILICON_REVISION_ID, &silicon_revision_id= )) { + dev_err(dev, "could not read silicon revision\n"); + return -EIO; + } + + if (silicon_revision_id =3D=3D AST2600A3_REVISION_ID) + rc =3D regmap_update_bits(scu, ASPEED_SCUC24, + ASPEED_SCUC24_PCIDEV1_INTX_MSI_HOST2BMC_EN | ASPEED_SCUC24_MSI_ROUTIN= G_MASK, + ASPEED_SCUC24_PCIDEV1_INTX_MSI_HOST2BMC_EN | ASPEED_SCUC24_MSI_ROUTIN= G_PCIE2LPC_PCIDEV1); + else + rc =3D regmap_update_bits(scu, ASPEED_SCUC24, + /** + * The bit 14 is reserved in the Datasheet. + */ + ASPEED_SCUC24_PCIDEV1_INTX_MSI_SCU560_EN | BIT(14) | ASPEED_SCUC24_MS= I_ROUTING_MASK, + ASPEED_SCUC24_PCIDEV1_INTX_MSI_SCU560_EN | BIT(14) | ASPEED_SCUC24_MS= I_ROUTING_PCIE2LPC_PCIDEV1); + if (rc) { + dev_err(dev, "could not set PCI device 1 MSI interrupt routing\n"); + return -EIO; + } + + return 0; +} + static int aspeed_vuart_probe(struct platform_device *pdev) { struct of_phandle_args sirq_polarity_sense_args; @@ -540,6 +617,15 @@ static int aspeed_vuart_probe(struct platform_device *= pdev) aspeed_vuart_set_host_tx_discard(vuart, true); platform_set_drvdata(pdev, vuart); =20 + if (of_device_is_compatible(dev->of_node, "aspeed,ast2600-vuart") && + of_property_read_bool(dev->of_node, "aspeed,vuart-over-pci")) { + rc =3D aspeed_ast2600_vuart_over_pci_set_enabled(pdev); + if (rc < 0) { + dev_err_probe(dev, rc, "could not enable VUART over PCI\n"); + goto err_sysfs_remove; + } + } + return 0; =20 err_sysfs_remove: --=20 2.54.0 From nobody Tue Jul 28 10:51:54 2026 Received: from mail-wm2-f2.google.com (mail-wm2-f2.google.com [74.125.225.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF28F41CB3F for ; Wed, 8 Jul 2026 15:38:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.225.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525124; cv=none; b=VkJFobuQHNkmhkekAQpI1lhg3UXMx/6UYSRyzCqg966nyht1VPiIVHpPKiBx3V1mnmIW05KYLovyOt/WJc2Eil1BUPnzEmYcQZSkxITd+ghbo/iPTQA0Eg6MN41zRq0mRfWBt/eP70YIuhVrFQAXmYM0UOTqSESL5YXfLXMdNyQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525124; c=relaxed/simple; bh=Cuf6+ZFpQj9as82hqAYL+jDoHowhB1w1fudH1PX2eog=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=neLuH8zFjxWngHR0oiMhK8TbcdkT2FJDbkraU6s6f7Zelg08V1VK4LUdjSCGUHzG2fieaQ6CsJsdyKE9TMkFxLpXks6/yl7Geb+lkEKPNluwh4hFlQbG8lpCzjI2NSzoL6Y9SOiYYnjjJTCaLX2c+0yjBy+tOlrpDa1FqN1N0Z8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com; spf=pass smtp.mailfrom=9elements.com; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b=LB8LH953; arc=none smtp.client-ip=74.125.225.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=9elements.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b="LB8LH953" Received: by mail-wm2-f2.google.com with SMTP id 5b1f17b1804b1-49242309566so1415975e9.0 for ; Wed, 08 Jul 2026 08:38:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; t=1783525121; x=1784129921; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=f1Rm+ycDLzcJTW5brmAbfPnl/20w3yUac+m/GbIIsJs=; b=LB8LH953g6QNFsMNzHBHh2rZHbMGPJOZZogRPhXpQuARsnU66JCl8DZ7lSyW7xHJaH BlZ7TAznJABPdMUXiQtn5MskJsLWJBzFkl44uezqwGDuqxTxiQvECnsVUxqqhzKg+O93 yELc5OJ1SIOrdCNLN5nbodnLxl65K9jzZtltnXYbBuJvvdL2d9gzyvZygFpawpijlkrD qtE8llpJbn7SFEr11jzHYGi+Ubi0nI3n8vvu0oI0lPdd76jhG82H50C0i4uuSe2M1nM+ b3k8/cYWBJKWQTpb+9Zysk/TmAjlhMpzRwByZSIuV8rN2qt+HXWWv1TCFoHJVBDcLn5D L2GQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783525121; x=1784129921; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=f1Rm+ycDLzcJTW5brmAbfPnl/20w3yUac+m/GbIIsJs=; b=rOszFzaaa8WRkSlOHX53BJ/dpH551UqdJI+CV6a5RKphiXo0hOOQbx+GeMZWCZZWTk v2ZJcIItdxzL9hojXBPTUbJYDELmbYQD5f9J5Ij0Hb9t8rL0cOAQLqm8g9tsqOr8LWP1 3L2HGMLZY80Sm5lcgnQYLDhJAmsKM4R3E6Dmc/J0rRX0JZjFHszp7+NUsFwI/ceerLyr 7PO3SZmtcZSTGbD3X/KCcHWJCisdrm13kutV9Bgp6EpEubcNDDgvgTIUAYGKImS/TvMK YyHpm+MmMtYTsUCm98ZjIv+OqLm07ZmevsKPko86cRl5XXoMfS1tbZ5vW9JL4bqAZ6hJ Dyhw== X-Forwarded-Encrypted: i=1; AHgh+Ro7djxhldLKq2KRJ1OTH+pmIt/dhLWshSilSKs5WXsEUgV8Y2qSKAm6dKb3NiRf3Pz1XyuGOjlLwzUUxq0=@vger.kernel.org X-Gm-Message-State: AOJu0Yy56E0AZwdw0xr8U4N38AzJCM1no3PGChUNdH6lAYyQG1tA3glL TtdKKVuzfJ/NL2kOBZBa+wuYwZ4izW15Ev9CNXuYGYhzF7xXT4QQZhjlYp+dBHBRIuU= X-Gm-Gg: AfdE7cm0omzqpqk428nWhQ8V3fznJGZaum1Al/sslh0OsshWG+9GSCXoq6exDTMfQ+1 HWgpcXcsl0GCfGjebvRC53UEUJKjeXcGANRA+M8uqUPDO0QZkWABLDnurdPuw/N0NBvl9iNqcn2 Pm/wj0u7DVCFWm1yffpWJomKXLt8FZaOXn7xZWSKvjhgSsY0xx1XRJFlAxbgBE/Cil178yx0F1m FshdWjWnjrRpSSPbYNGeT0eFzaMQHwUij/9KrbUI8g8+NCx+0oYY/4YC5Q8yBrkxg48TnPKUqj2 eaBhahw3ZZ9d2qeRYHmsZxtp1yPGMPhfEgbZzLsR9ICEyYMju49+9bR6eBlG1HmnjUFyiX3b9Cu SlFFJyUD6auShaw9AivxFMMwdVpbSHs9WkNTQQEqU5ESjWjbFwiB/2ERT27rv8jtjOo59TpIrDA C/7LmaMIHJKHzenzLh2DAxkODp65UTgabS9wj66vXfOTgJ6QLkvOB59EoLJ9DtZEeEqKgifmRpE a50+8DTFP3PRiXHKu+NQliP4oQX X-Received: by 2002:a05:600c:8b72:b0:493:c634:952 with SMTP id 5b1f17b1804b1-493e69b0dc8mr29860325e9.7.1783525121089; Wed, 08 Jul 2026 08:38:41 -0700 (PDT) Received: from gregwork.sec.9e.network ([188.111.3.154]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47a9e4d8410sm44254136f8f.15.2026.07.08.08.38.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2026 08:38:40 -0700 (PDT) From: =?UTF-8?q?Gr=C3=A9goire=20Layet?= To: joel@jms.id.au, andrew@codeconstruct.com.au, lkundrak@v3.sk, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andrew@lunn.ch, jacky_chou@aspeedtech.com, yh_chung@aspeedtech.com, ninad@linux.ibm.com, anirudhsriniv@gmail.com, linux-serial@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Gr=C3=A9goire=20Layet?= Subject: [PATCH v4 5/7] soc: aspeed: add host-side PCIe BMC device driver Date: Wed, 8 Jul 2026 15:35:57 +0000 Message-ID: <51e455417bdcfe608270c6cb2806b1fd971fb998.1783524645.git.gregoire.layet@9elements.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add support for VUART over PCIe between BMC and host. Add the host side driver. Support only the AST2600. Taken from ASPEED 6.18 Kernel SDK and trimmed down. The host can't detect the VUART addresses, so force them to 0x3f8 and 0x2f8, as in the initial ASPEED driver. Change the MSI vector index of VUART2 from 15 to 17. The index 15 used in the initial driver was not working. Data path in both direction is tested on both VUART. This module is added in soc/aspeed as it's very soc specific. This is not added as a PCI 8250 UART device as this host module can be expanded upon for IPMI over KCS. It can also be used in the future for custom BMC<->host communication with shared memory and doorbell. This host module should be the entry point for setting up all features related to an AST2600 present on the PCI bus. Signed-off-by: Jacky Chou Signed-off-by: aspeedyh Signed-off-by: Gr=C3=A9goire Layet --- drivers/soc/aspeed/Kconfig | 15 ++ drivers/soc/aspeed/Makefile | 1 + drivers/soc/aspeed/aspeed-host-bmc-dev.c | 174 +++++++++++++++++++++++ 3 files changed, 190 insertions(+) create mode 100644 drivers/soc/aspeed/aspeed-host-bmc-dev.c diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig index f579ee0b5afa..147a9033bdc4 100644 --- a/drivers/soc/aspeed/Kconfig +++ b/drivers/soc/aspeed/Kconfig @@ -55,3 +55,18 @@ config ASPEED_SOCINFO endmenu =20 endif + +menu "ASPEED host-side drivers" + depends on PCI + +config ASPEED_HOST_BMC_DEV + tristate "ASPEED host-side BMC PCIe device" + depends on SERIAL_8250 + help + Host-side driver for the ASPEED AST2600 BMC PCIe device found on + BMC expansion cards. Exposes two 8250-compatible VUART + ports. + + If unsure, say N. Choose M to build aspeed-host-bmc-dev. + +endmenu diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile index b35d74592964..c515e163eab7 100644 --- a/drivers/soc/aspeed/Makefile +++ b/drivers/soc/aspeed/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_ASPEED_HOST_BMC_DEV) +=3D aspeed-host-bmc-dev.o obj-$(CONFIG_ASPEED_LPC_CTRL) +=3D aspeed-lpc-ctrl.o obj-$(CONFIG_ASPEED_LPC_SNOOP) +=3D aspeed-lpc-snoop.o obj-$(CONFIG_ASPEED_UART_ROUTING) +=3D aspeed-uart-routing.o diff --git a/drivers/soc/aspeed/aspeed-host-bmc-dev.c b/drivers/soc/aspeed/= aspeed-host-bmc-dev.c new file mode 100644 index 000000000000..e586d0505577 --- /dev/null +++ b/drivers/soc/aspeed/aspeed-host-bmc-dev.c @@ -0,0 +1,174 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright (C) ASPEED Technology Inc. + +#include +#include +#include +#include +#include +#include +#include + +#define BMC_MULTI_MSI 32 +#define PCI_BMC_DEVICE_ID 0x2402 + +#define DRIVER_NAME "aspeed-host-bmc-dev" + +enum aspeed_platform_id { + ASPEED, +}; + +static const int vuart_msi_index[2] =3D { 16, 17 }; +static const int vuart_port_addr[2] =3D {0x3f8, 0x2f8}; + +struct aspeed_pci_bmc_dev { + unsigned long message_bar_base; + + struct uart_8250_port uart[2]; + int uart_line[2]; +}; + +static int aspeed_pci_bmc_device_setup_vuart(struct pci_dev *pdev, int idx) +{ + struct aspeed_pci_bmc_dev *pci_bmc_dev =3D pci_get_drvdata(pdev); + struct device *dev =3D &pdev->dev; + struct uart_8250_port *uart =3D &pci_bmc_dev->uart[idx]; + u16 vuart_ioport; + int ret; + + /* Assign the line to non-exist device before everything is setup */ + pci_bmc_dev->uart_line[idx] =3D -ENOENT; + + vuart_ioport =3D vuart_port_addr[idx]; + /* ASPEED BMC device shift addresses by 2 to the left */ + vuart_ioport =3D vuart_ioport << 2; + + uart->port.flags =3D UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ; + uart->port.uartclk =3D 115200 * 16; + uart->port.irq =3D pci_irq_vector(pdev, vuart_msi_index[idx]); + uart->port.dev =3D dev; + uart->port.iotype =3D UPIO_MEM32; + uart->port.iobase =3D 0; + uart->port.mapbase =3D pci_bmc_dev->message_bar_base + vuart_ioport; + uart->port.membase =3D 0; + uart->port.type =3D PORT_16550A; + uart->port.flags |=3D (UPF_IOREMAP | UPF_FIXED_PORT | UPF_FIXED_TYPE); + uart->port.regshift =3D 2; + + ret =3D serial8250_register_8250_port(&pci_bmc_dev->uart[idx]); + if (ret < 0) { + dev_err_probe(dev, ret, "Can't setup PCIe VUART%d\n", idx); + return ret; + } + + pci_bmc_dev->uart_line[idx] =3D ret; + + return 0; +} + +static void aspeed_pci_host_bmc_device_release_vuart(struct pci_dev *pdev,= int idx) +{ + struct aspeed_pci_bmc_dev *pci_bmc_dev =3D pci_get_drvdata(pdev); + + if (pci_bmc_dev->uart_line[idx] >=3D 0) + serial8250_unregister_port(pci_bmc_dev->uart_line[idx]); +} + +static int aspeed_pci_host_setup(struct pci_dev *pdev) +{ + struct aspeed_pci_bmc_dev *pci_bmc_dev =3D pci_get_drvdata(pdev); + int rc =3D 0; + + pci_bmc_dev->message_bar_base =3D pci_resource_start(pdev, 1); + + if (pdev->revision =3D=3D 0x27) { + pr_err("AST2700 detected but not supported"); + return -ENODEV; + } + + rc =3D aspeed_pci_bmc_device_setup_vuart(pdev, 0); + if (rc) + return rc; + + rc =3D aspeed_pci_bmc_device_setup_vuart(pdev, 1); + if (rc) + goto out_free_VUART0; + + return 0; + +out_free_VUART0: + aspeed_pci_host_bmc_device_release_vuart(pdev, 0); + + return rc; +} + +static int aspeed_pci_host_bmc_device_probe(struct pci_dev *pdev, const st= ruct pci_device_id *ent) +{ + struct aspeed_pci_bmc_dev *pci_bmc_dev; + int rc =3D 0; + + pci_bmc_dev =3D devm_kzalloc(&pdev->dev, sizeof(*pci_bmc_dev), GFP_KERNEL= ); + if (!pci_bmc_dev) + return -ENOMEM; + + rc =3D pci_enable_device(pdev); + if (rc) { + dev_err(&pdev->dev, "pci_enable_device() returned error %d\n", rc); + return rc; + } + + pci_set_master(pdev); + pci_set_drvdata(pdev, pci_bmc_dev); + + rc =3D pci_alloc_irq_vectors(pdev, BMC_MULTI_MSI, BMC_MULTI_MSI, PCI_IRQ_= INTX | PCI_IRQ_MSI); + if (rc < 0) { + dev_err(&pdev->dev, "aspeed_pci_setup_irq_resource() returned error %d\n= ", rc); + goto disable_device; + } + + /* Setup BMC PCI device */ + rc =3D aspeed_pci_host_setup(pdev); + if (rc) { + dev_err(&pdev->dev, "ASPEED PCIe Host device returned error %d\n", rc); + goto free_irq; + } + + return 0; + +free_irq: + pci_free_irq_vectors(pdev); +disable_device: + pci_disable_device(pdev); + return rc; +} + +static void aspeed_pci_host_bmc_device_remove(struct pci_dev *pdev) +{ + aspeed_pci_host_bmc_device_release_vuart(pdev, 0); + aspeed_pci_host_bmc_device_release_vuart(pdev, 1); + + pci_free_irq_vectors(pdev); + pci_disable_device(pdev); +} + +static struct pci_device_id aspeed_host_bmc_dev_pci_ids[] =3D { + { PCI_DEVICE(PCI_VENDOR_ID_ASPEED, PCI_BMC_DEVICE_ID), + .class =3D 0xFF0000, .class_mask =3D 0xFFFF00, + .driver_data =3D ASPEED }, + { 0 } +}; + +MODULE_DEVICE_TABLE(pci, aspeed_host_bmc_dev_pci_ids); + +static struct pci_driver aspeed_host_bmc_dev_driver =3D { + .name =3D DRIVER_NAME, + .id_table =3D aspeed_host_bmc_dev_pci_ids, + .probe =3D aspeed_pci_host_bmc_device_probe, + .remove =3D aspeed_pci_host_bmc_device_remove, +}; + +module_driver(aspeed_host_bmc_dev_driver, pci_register_driver, pci_unregis= ter_driver); + +MODULE_AUTHOR("Ryan Chen "); +MODULE_DESCRIPTION("ASPEED Host BMC DEVICE Driver"); +MODULE_LICENSE("GPL"); --=20 2.54.0 From nobody Tue Jul 28 10:51:54 2026 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D26FB41CB52 for ; Wed, 8 Jul 2026 15:38:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525126; cv=none; b=sAspX2wMxO3Im6nektQoOG8iluEmPqka6dORQFdrEE3yjXLa5dYlH3mFrodzyMMCU5HA5kUqAm0cBa5jx0dlCiJgTBK1gVcfUxpCR6Sa7yhlRBJKYwTO+S6gFw7lsbDbSwCr59DlNZhLPyzuOCVPV4JvgiapqRXtUpmJ8Z3TDoQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525126; c=relaxed/simple; bh=dkorfggf36ztPK+fgZCnE3kh62ef0QtYuBdCi01480Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=RlQ42HoAfHpKyGzcRwIK4NcqHogf66/IzP4bkruBHgVEci7OTMuSJJD03vQde+lxLGDTLQczEzlvaOv1LLQPQq/XgUhvsxT3PGtAG2AfgS5+F8HGtpLCb7O44zA9nKShTyuXFmLfP5f8w4G+16DSH8QFFPDogBSkPEB041zOa0E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com; spf=pass smtp.mailfrom=9elements.com; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b=G1R94AZ6; arc=none smtp.client-ip=209.85.221.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=9elements.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b="G1R94AZ6" Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-46ed4f66256so742344f8f.3 for ; Wed, 08 Jul 2026 08:38:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; t=1783525123; x=1784129923; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=R478x+VsQssRpU/U+H9eTTLOJEK424oXp8O1P95M0Gk=; b=G1R94AZ6NlS77X3o0TEod+xcO708X15cjl2xswiZ+/9BGiaNXwT6Nm/aZ1rhzNOZwg 81OTukHSeXJ90UFvD1/gbLB50wVGN7R1jhj013kqU/nQ23N3KB58tBTIem09US+bOmn5 3E2snAFyzJ/mn8RAz5coFG9d5jEctUbKihN0vXLqQWZZsdUpZzxDX20tkNdwVQPCCZkY XXbiU6zdPswmqDS/yDYDFAN9RE7zVLpSZT1wztwXw9vPRWMAJq2hC7lmvGzG4FlWCm9P EGTJabVjLJJ6Y+gRsNUvBgaRX61GdyXEy45URLoavJXNyrQbBu5Tn2d6yGzpz2Y1r1en fWPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783525123; x=1784129923; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=R478x+VsQssRpU/U+H9eTTLOJEK424oXp8O1P95M0Gk=; b=ClZHN4f3SMf8kM5C920z89ERJ6Sz6YL2YezwLuCE+LmMsXXi+PiUN5WgAo5A3JEA6L BLfnQoV4bOjplsU6IC3wEQBlFkwy5o4sO1njZ8usAinb5S1hY/W9jZMl3cLefbx0RlC6 n4pFPgd5/w6FBqexDAIczQhTUwD9SVHntyGlio7dpy7WSHHfp+qmlDrtdxhHE97C+VNj V8kz4q4QCDhp+7EtmUrMsLfkVQFb2FkQar742Xf1gqVEL5fLALRDvf62eXps+oelzc47 UWokqbrzsJWznmYVkoyC14FwBxKl0h3FzIaEy3QT24IKyu1xiKoumlhw0phEW/FBVrVz xBJg== X-Forwarded-Encrypted: i=1; AHgh+RqB4jBm/Oa+LOfR5kNOjqUgbdqUQfbuG50IHHXiLHNRHP4ZgvLa+1LfdE8RtiUpXwyc5dcL4AtNBmanz6Y=@vger.kernel.org X-Gm-Message-State: AOJu0YwQWD7ipT5t5vlOzmfP/P0LvVOsihIzjPGbdcW/aBNBIc5CBVzC iGijkI/H5q18ScE3u6vQGF83PZmsLubxsyPZvpeEd5Z8I16RmG+rW+4GwAgGeyvH3ZU= X-Gm-Gg: AfdE7cl1ClHhZfbP//MhljEocOy51f2+e40UMp0CG3f8MBs7+LxSJnq48Jw7f7ckkY6 f+Jif6X9s3p7NdymwDJIryPd4LujQIooJNYv5f4lTQP6X/ZCNS5gK/n0lBRwh5urumDAnXeppf2 Wvj5wmdA5DaSHgGQVHOQY3szNcr5hY3X7dhNz+3YRd3+ldro5FupCK3ckkZhHeJCOmd11psKEwq uSflEoVSyeTHrweQ0AGuNPSNLSalNUBAAYoxFTkWLV0Qe2szY5IeVVdyASCv7NiubhZXKwA16oo gqpJDwxxw6dGXm+YAZVAV6ADEx0oVQwiuZa2b+IW4MTqOD9TlYbKWsgAuMKimDA9uNpKxPg8xeu 9LiMTsY3YoWKuqQ8XabXdLUAt2bYHXhpfHYXW0RCwP14bL2H4r0R9B3l2EAOE8FdA4Irt7Dqpa+ 5ugyxLIt1OvaAYjGM1xMZrTXy4mDUnQ/TKpej+8LMJuQMS6TdxUjMUxI5FjqXyYEWD+fhSxUYVx 3f6XETK5XG4b+gSXLifGGDjrLKysDdm8twSl28= X-Received: by 2002:a05:6000:4709:b0:475:f0d1:eb69 with SMTP id ffacd0b85a97d-47df07c5accmr3512417f8f.54.1783525123283; Wed, 08 Jul 2026 08:38:43 -0700 (PDT) Received: from gregwork.sec.9e.network ([188.111.3.154]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47a9e4d8410sm44254136f8f.15.2026.07.08.08.38.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2026 08:38:43 -0700 (PDT) From: =?UTF-8?q?Gr=C3=A9goire=20Layet?= To: joel@jms.id.au, andrew@codeconstruct.com.au, lkundrak@v3.sk, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andrew@lunn.ch, jacky_chou@aspeedtech.com, yh_chung@aspeedtech.com, ninad@linux.ibm.com, anirudhsriniv@gmail.com, linux-serial@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Gr=C3=A9goire=20Layet?= Subject: [PATCH v4 6/7] ARM: dts: aspeed: g6: Change vuart compatible string for ast2600 Date: Wed, 8 Jul 2026 15:35:58 +0000 Message-ID: <5875623c1b20cf5a1abc980eab4c31a47cc58468.1783524645.git.gregoire.layet@9elements.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Use the ast2600 compatible string. Make it more precise and enable specific ast2600 properties. Still use the ast2500 compatible string as a fallback. Signed-off-by: Gr=C3=A9goire Layet --- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/as= peed/aspeed-g6.dtsi index 56bb3b0444f7..7c02633f2bd6 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -707,7 +707,7 @@ emmc: sdhci@1e750100 { }; =20 vuart1: serial@1e787000 { - compatible =3D "aspeed,ast2500-vuart"; + compatible =3D "aspeed,ast2600-vuart", "aspeed,ast2500-vuart"; reg =3D <0x1e787000 0x40>; reg-shift =3D <2>; interrupts =3D ; @@ -717,7 +717,7 @@ vuart1: serial@1e787000 { }; =20 vuart3: serial@1e787800 { - compatible =3D "aspeed,ast2500-vuart"; + compatible =3D "aspeed,ast2600-vuart", "aspeed,ast2500-vuart"; reg =3D <0x1e787800 0x40>; reg-shift =3D <2>; interrupts =3D ; @@ -727,7 +727,7 @@ vuart3: serial@1e787800 { }; =20 vuart2: serial@1e788000 { - compatible =3D "aspeed,ast2500-vuart"; + compatible =3D "aspeed,ast2600-vuart", "aspeed,ast2500-vuart"; reg =3D <0x1e788000 0x40>; reg-shift =3D <2>; interrupts =3D ; @@ -737,7 +737,7 @@ vuart2: serial@1e788000 { }; =20 vuart4: serial@1e788800 { - compatible =3D "aspeed,ast2500-vuart"; + compatible =3D "aspeed,ast2600-vuart", "aspeed,ast2500-vuart"; reg =3D <0x1e788800 0x40>; reg-shift =3D <2>; interrupts =3D ; --=20 2.54.0 From nobody Tue Jul 28 10:51:54 2026 Received: from mail-wr1-f50.google.com (mail-wr1-f50.google.com [209.85.221.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56B0C42DA2C for ; Wed, 8 Jul 2026 15:38:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525129; cv=none; b=g1KjCIVPMn7BDlU9li7NN5MAYHaJ/4hXMZjKAD5LGK0PluBHYJllbRZLvRHwoTfuvlJEmJ6UIPcmgt3C5gLsJiWyTJlX1FfZlm9bKboZ41qop5aodUwvG0yKzb9K4EzOH3PjB0IG9uOzqvKTPJ3wb6FfeusXlEXhjg34UKUEnPU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783525129; c=relaxed/simple; bh=WhuQpxIJsHfJelMhpqFK9UR04PUwBIxESY/bbTEtu84=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=VqV1IWO4oxV2bOuZNffqJOX/GCDth6IUSMQk401L20QHqX8RvQAajlsIsfExyi6ltVSKVLkxzemY1HUFRXMtq4qmk63Poxkh0DzPhXGQEWQuOVbDwdLiiv29j1ldBJ6fff+8zPyGK3StgOAftSO1v0h3b+ESD+6iRYez52+luOE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com; spf=pass smtp.mailfrom=9elements.com; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b=X4rxrjy+; arc=none smtp.client-ip=209.85.221.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=9elements.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=9elements.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=9elements.com header.i=@9elements.com header.b="X4rxrjy+" Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-46ed4f66256so742391f8f.3 for ; Wed, 08 Jul 2026 08:38:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; t=1783525125; x=1784129925; darn=vger.kernel.org; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:from:to:cc:subject :date:message-id:reply-to:content-type; bh=NnLAnFwCqMFlG/o/7EF1TFc96QCA+EgXe00U5MXSsXk=; b=X4rxrjy+0uNQYD8BxKSXRIjdWs9ySfXvMHsg+u6UHx69Wk+UJGoVtVKdjaFKoCpf9p r3u99/Y4OdLmN2PCxuXhJ898WvL2vHZF2zmcPyeWmXOYJ8R0hwAIwYgNVd+bOgsiNXyi sKXqggCL0ojmvFobYe+CPQrP4Mshw7XxeoKueebr/K6kr3LTVve0/hftqK2CK3J5ymXx o4s8PEMyHsCAki4C7di3xlGiFtwot9coVeXCUR2Gj3na1ETlQH72KC4Ff4oFTdWnU9Aq Fd/ShzElkunyVGa5jJOy19O9dX/zE+0yagrVw7rtZJEMdG81RBTraZun3D4MsqAnt4D/ wz/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1783525125; x=1784129925; h=content-transfer-encoding:content-type:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=NnLAnFwCqMFlG/o/7EF1TFc96QCA+EgXe00U5MXSsXk=; b=EsorTGpC+44P8FqxhktFAyjVfdMg9SWeUwgsFs/77heAqJfqesQ3OelPGBtRXfI9lw Z99RcGBjNu98tmvFr1WgeZT8Oq3Kd25qp1e5N/MX/MnTfDR+UdBsgdDUgC9/+vZgnotk qg9mTgLgXKudIf1P822DQTkBD0yFPxXe7u+n7lWEWTNpdH36Lcusj+QARxylp40fEwUN rEX+ZHFrk8YxddNhHlqIFFz0Kptm+FtEOaodMLePI4NjZS0kEnJeEfhG6xAOWowJENQp sbyR9xSUxO3W/yqwtQl2awO5vTPJkDXBNLEAZr7WjXWXq6fe0DilmVeIsAWN9joiTB/R DlsA== X-Forwarded-Encrypted: i=1; AHgh+RpiUSHsea1JyTGpccBgPMg7fZL5ATMPBn6/5gdx+ScNz85MCNfD8IXhqst7utswG7S7zvaWtxxBH6RJjN0=@vger.kernel.org X-Gm-Message-State: AOJu0Yy6J8OghnK7Lan5+8Zg4djpMvrNPyyN/zArTxzhiB9L0WiIrKXt D16lc+nz46KrI+otyExfBNHovaWV/D+K6boJcM+uODWTHiVu2ZvWhh7ZxRJHdAXxWPY= X-Gm-Gg: AfdE7cmsjS8naZASh84OxdrMjQ5w4vVmpbcB1zRtWGoBmu9/MINOn+LjOQuJHFqx/sJ njD9CeuN6pYxZO3NfQToi1n/+yNKsEyEiUtzxabjQrCxIZoQGFwoOnPucJv5TyJ7bs2ciCf30B+ 0fPWkcxmC7Iqvt+PWPt+bKo5gFM+zPLk3pgior3q2BSAxlVSFnUbYtIMTLeGk+4hCZzVwlSKhUX B+4MqCkvzZB4akokIJfN2UeNi6d9veGYF2sM+cyGiOzZ6zbWofUqMjb0nAhfuUZAZ7vny01fwKU IP0c8Qc7WeJqbxscixN5MplXik7uAkWHfn9LJWzvb5X9OnQ05M0DvgvYJcywmH+4xTET6ypwX6m Z5NHnw18uj/Guu55qh1KWzTxpK+Xg2txtrxruTBFEfsMcvx46gCeRGjw8yfWGWyjr8cL9KnXvWt /NYSeAXWbsCNelHkpHLsXhGrFa5AOzpetRr3X5zyOzD6hU9tkLjNkseOkwpNrYO+N3U1S5c5hiZ avi0oP1RMI+X9awsht7BYYhovvW1JBPhobynVI= X-Received: by 2002:a05:6000:220c:b0:470:3edf:e28e with SMTP id ffacd0b85a97d-47df074e230mr4140001f8f.10.1783525125665; Wed, 08 Jul 2026 08:38:45 -0700 (PDT) Received: from gregwork.sec.9e.network ([188.111.3.154]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47a9e4d8410sm44254136f8f.15.2026.07.08.08.38.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2026 08:38:45 -0700 (PDT) From: =?UTF-8?q?Gr=C3=A9goire=20Layet?= To: joel@jms.id.au, andrew@codeconstruct.com.au, lkundrak@v3.sk, devicetree@vger.kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: andrew@lunn.ch, jacky_chou@aspeedtech.com, yh_chung@aspeedtech.com, ninad@linux.ibm.com, anirudhsriniv@gmail.com, linux-serial@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Gr=C3=A9goire=20Layet?= Subject: [PATCH v4 7/7] ARM: dts: aspeed: g6: add aspeed,vuart-over-pci prop to vuart3 and 4 Date: Wed, 8 Jul 2026 15:35:59 +0000 Message-ID: <39091b1d0c716da3502a691d0a0bdb7621693cf5.1783524645.git.gregoire.layet@9elements.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The VUART 3 and 4 are VUART over PCI. Set this flag to indicate this information. Also set the syscon phandle. Signed-off-by: Gr=C3=A9goire Layet --- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/as= peed/aspeed-g6.dtsi index 7c02633f2bd6..2b51749300f8 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -722,7 +722,9 @@ vuart3: serial@1e787800 { reg-shift =3D <2>; interrupts =3D ; clocks =3D <&syscon ASPEED_CLK_APB2>; + syscon =3D <&syscon>; no-loopback-test; + aspeed,vuart-over-pci; status =3D "disabled"; }; =20 @@ -742,7 +744,9 @@ vuart4: serial@1e788800 { reg-shift =3D <2>; interrupts =3D ; clocks =3D <&syscon ASPEED_CLK_APB2>; + syscon =3D <&syscon>; no-loopback-test; + aspeed,vuart-over-pci; status =3D "disabled"; }; =20 --=20 2.54.0