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BIOS commits and LOCKs such decoders to burn slots, preventing the OS from programming new regions through them, e.g. for a Type 3 device in a Trusted Computing Base (TCB) established via the Trusted Security Protocol (TSP). init_hdm_decoder() rejects these with -ENXIO and aborts port enumeration, so "cxl list" shows nothing for the affected port. Set port->commit_end before the size check so later contiguous decoders pass the out-of-order check, and skip devm_cxl_dpa_reserve() since zero-size decoder wouldn't need to reserve DPA ranges. The decoder is added to topology normally, LOCK is read from the HW control register so "cxl list" reflects the slot's real state. Signed-off-by: Vishal Aslot Signed-off-by: Richard Cheng --- Changelog v1->v2: - Add zero-size committed decoders to the topology instead of skipping them. Drop v1's -ENOSPC sentinel and the matching "continue" in devm_cxl_enumerate_decoders(); fall through so add_hdm_decoder() registers the decoder. - Set port->commit_end unconditionally for any committed decoder, not only non-zero-size ones, so subsequent decoders satisfy the out-of-order check. - Add an explicit early-return before devm_cxl_dpa_reserve() in the endpoint-decoder path. __cxl_dpa reserve() rejects zero-size decoders - Spell out TSP and TCB and cite spec sections in commit message - Reorder series, implementation first --- drivers/cxl/core/hdm.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index 0c80b76a5f9b..467ac45bee55 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -1031,13 +1031,12 @@ static int init_hdm_decoder(struct cxl_port *port, = struct cxl_decoder *cxld, return -ENXIO; } =20 - if (size =3D=3D 0) { - dev_warn(&port->dev, - "decoder%d.%d: Committed with zero size\n", - port->id, cxld->id); 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Received: from BL0PR12MB2370.namprd12.prod.outlook.com (2603:10b6:207:47::27) by CH8PR12MB9840.namprd12.prod.outlook.com (2603:10b6:610:271::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.71.17; Tue, 2 Jun 2026 05:41:16 +0000 Received: from BL0PR12MB2370.namprd12.prod.outlook.com ([fe80::86cf:c3ec:2cf5:74c8]) by BL0PR12MB2370.namprd12.prod.outlook.com ([fe80::86cf:c3ec:2cf5:74c8%5]) with mapi id 15.21.0071.015; Tue, 2 Jun 2026 05:41:16 +0000 From: Richard Cheng To: dave@stgolabs.net, jonathan.cameron@huawei.com, dave.jiang@intel.com, alison.schofield@intel.com, vishal.l.verma@intel.com, ira.weiny@intel.com, dan.j.williams@intel.com Cc: linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org, newtonl@nvidia.com, kristinc@nvidia.com, kaihengf@nvidia.com, kobak@nvidia.com, vaslot@nvidia.com, smadhavan@nvidia.com, Richard Cheng Subject: [PATCH v2 2/2] tools/testing/cxl: Enable zero sized decoders under hb0 Date: Tue, 2 Jun 2026 13:40:53 +0800 Message-ID: <5c52cc06c27ab3754e4c046a3a9d361af89f0361.1779957270.git.icheng@nvidia.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: References: Content-Type: text/plain; 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Without cxl_test coverage the new path goes unexercised. For the special endpoints under host-bridge 0, e.g. cxl_mem.0 and cxl_mem.4, commit decoders 1 and 2 as zero-size + locked alongside the existing autoregion at decoder[0]. Mirro the same shape on the parent switch and host bridge via the walk-up that already builds the autoregion path. Signed-off-by: Vishal Aslot Signed-off-by: Richard Cheng --- Changelog: v1->v2: - Replace second_decoder(), third_decoder() with a single match_decoder_by_index() helper, so all lookups share one matcher. - Use DEFINE_RANGE() for the empty range instread of an open-coded struct - Set cxled->state =3D CXL_DECODER_STATE_MANUAL rather than STATE_AUTO - Set CXL_DECODER_F_LOCK on the mock zero-size decoders to model the BIOS-burns-slots case --- tools/testing/cxl/test/cxl.c | 79 +++++++++++++++++++++++++++++++----- 1 file changed, 69 insertions(+), 10 deletions(-) diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c index 418669927fb0..1ae0290a9221 100644 --- a/tools/testing/cxl/test/cxl.c +++ b/tools/testing/cxl/test/cxl.c @@ -1041,16 +1041,41 @@ static void default_mock_decoder(struct cxl_decoder= *cxld) WARN_ON_ONCE(!cxld_registry_new(cxld)); } =20 -static int first_decoder(struct device *dev, const void *data) +static int match_decoder_by_index(struct device *dev, const void *data) { + int target_id =3D *(const int *)data; struct cxl_decoder *cxld; =20 if (!is_switch_decoder(dev)) return 0; cxld =3D to_cxl_decoder(dev); - if (cxld->id =3D=3D 0) - return 1; - return 0; + return cxld->id =3D=3D target_id; +} + +static void size_zero_mock_decoder_ep(struct cxl_decoder *cxld, u64 base) +{ + struct cxl_endpoint_decoder *cxled =3D to_cxl_endpoint_decoder(&cxld->dev= ); + + cxld->hpa_range =3D DEFINE_RANGE(base, base - 1); + cxld->interleave_ways =3D 2; + cxld->interleave_granularity =3D 4096; + cxld->target_type =3D CXL_DECODER_HOSTONLYMEM; + cxld->flags =3D CXL_DECODER_F_ENABLE | CXL_DECODER_F_LOCK; + cxled->state =3D CXL_DECODER_STATE_MANUAL; + cxld->commit =3D mock_decoder_commit; + cxld->reset =3D mock_decoder_reset; +} + +static void size_zero_mock_decoder_sw(struct cxl_decoder *cxld, u64 base, + int level) +{ + cxld->flags =3D CXL_DECODER_F_ENABLE | CXL_DECODER_F_LOCK; + cxld->target_type =3D CXL_DECODER_HOSTONLYMEM; + cxld->interleave_ways =3D level =3D=3D 0 ? 2 : 1; + cxld->interleave_granularity =3D 4096; + cxld->hpa_range =3D DEFINE_RANGE(base, base - 1); + cxld->commit =3D mock_decoder_commit; + cxld->reset =3D mock_decoder_reset; } =20 /* @@ -1123,15 +1148,17 @@ static bool mock_init_hdm_decoder(struct cxl_decode= r *cxld) } =20 /* - * The first decoder on the first 2 devices on the first switch - * attached to host-bridge0 mock a fake / static RAM region. All - * other decoders are default disabled. Given the round robin - * assignment those devices are named cxl_mem.0, and cxl_mem.4. + * On the first 2 devices on the first switch attached to + * host-bridge0, decoder[0] mocks a fake / static RAM region and + * decoders 1 and 2 mock BIOS-burnt zero-size + locked slots + * (CXL r3.2 =C2=A78.2.4.20.12, =C2=A714.13.10). All other decoders are + * default disabled. Given the round robin assignment those + * devices are named cxl_mem.0 and cxl_mem.4. * * See 'cxl list -BMPu -m cxl_mem.0,cxl_mem.4' */ if (!is_endpoint_decoder(&cxld->dev) || !hb0 || pdev->id % 4 || - pdev->id > 4 || cxld->id > 0) { + pdev->id > 4 || cxld->id > 2) { default_mock_decoder(cxld); return false; } @@ -1145,6 +1172,18 @@ static bool mock_init_hdm_decoder(struct cxl_decoder= *cxld) base =3D window->base_hpa; if (extended_linear_cache) base +=3D mock_auto_region_size; + + /* + * Decoders 1 and 2 of the special endpoints under host-bridge0 + * are committed as zero-size + locked to mock BIOS burning + * decoder slots (CXL r3.2 =C2=A78.2.4.20.12, =C2=A714.13.10). + */ + if (cxld->id =3D=3D 1 || cxld->id =3D=3D 2) { + size_zero_mock_decoder_ep(cxld, base); + port->commit_end =3D cxld->id; + WARN_ON_ONCE(!cxld_registry_new(cxld)); + return false; + } cxld->hpa_range =3D (struct range) { .start =3D base, .end =3D base + mock_auto_region_size - 1, @@ -1168,9 +1207,12 @@ static bool mock_init_hdm_decoder(struct cxl_decoder= *cxld) */ iter =3D port; for (i =3D 0; i < 2; i++) { + int id; + dport =3D iter->parent_dport; iter =3D dport->port; - dev =3D device_find_child(&iter->dev, NULL, first_decoder); + id =3D 0; + dev =3D device_find_child(&iter->dev, &id, match_decoder_by_index); /* * Ancestor ports are guaranteed to be enumerated before * @port, and all ports have at least one decoder. @@ -1214,6 +1256,23 @@ static bool mock_init_hdm_decoder(struct cxl_decoder= *cxld) =20 cxld_registry_update(cxld); put_device(dev); + + /* + * Mirror the endpoint: also commit the next two switch + * decoders as zero-size + locked so the hierarchy looks + * like a BIOS post-lock layout end-to-end. + */ + for (id =3D 1; id <=3D 2; id++) { + dev =3D device_find_child(&iter->dev, &id, + match_decoder_by_index); + if (WARN_ON(!dev)) + continue; + cxld =3D to_cxl_decoder(dev); + size_zero_mock_decoder_sw(cxld, base, i); + iter->commit_end =3D id; + cxld_registry_update(cxld); + put_device(dev); + } } =20 return false; --=20 2.43.0