From nobody Fri Jun 12 12:42:43 2026 Received: from mail-pf1-f172.google.com (mail-pf1-f172.google.com [209.85.210.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B4AE31CA4A for ; Fri, 15 May 2026 05:42:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823751; cv=none; b=YWcfLlrZrrmIMlvq7r+88ETbk3V1Vm0jlqIzwGgPy6T01cymoPia1yFD8BfBC0ySSsRRKmG3P8w8AMF0OpEz73w3qA+0CbEJfSLIO50CqRKNhJZ62tTrN8VTUUHUV8zHrEyKGYUf5TYBSQvnYFZ4RDTK6WF72rsA7gNnyXmQLys= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823751; c=relaxed/simple; bh=aVdFf5OymMVSZ4KFTnooyC2hd0qHH4hvBzmghV4dLpk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IvTnqrUNI7DuqXq1kbs7kxPXo2EPJoDt5VlzjmI3nEjRbJtOshfDhK/dyVb2xHzGiM/IzzxNdBbU0y10kBqL3H5fnp3oC1lUM4bnyrdZoA1JA3iCcw8FVsm93B+IvC760iUPtTf+l4Ys5NaDYXU4GH4AkBqBBwk1wA44rCvR82A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=P4zjnFXG; arc=none smtp.client-ip=209.85.210.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="P4zjnFXG" Received: by mail-pf1-f172.google.com with SMTP id d2e1a72fcca58-835b78c3797so3828821b3a.2 for ; Thu, 14 May 2026 22:42:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778823750; x=1779428550; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uA3KbxtyArVx1TPayII+4ue5MWymrrbmptjetuH5M+E=; b=P4zjnFXGHsF/eBNiA1ijEPqz/NFATd7mTH554p4nTpVHGlaiIPzSNPOmme5yz7k36/ DpR+N6STAkUWLTeCPyD/lw6+zaxnuRujKlOW9C/Mkk8GC2CGSCTTQEQ97eSY2tQcYWUJ ZQnYF1HtCwdD2QRW8eNCHv0gDugHAcmUGi7FOAPubXii4tDsSTxtzhEPxtSKK8YwhQhg ZgvtVdaNIo61i+GjMueX74rfcfVleUAT6JuR7FrXQd4MMDwJDhQ4Ghn3AN4a+drWzJdB mPQ9mL55ufgPy3oqpt688fTl8gcE0PnrU8Fm/9F3nkoe7CQ5j4byS8klEGelMiWokk3w Gvyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778823750; x=1779428550; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=uA3KbxtyArVx1TPayII+4ue5MWymrrbmptjetuH5M+E=; b=YH3Ny19OWFbfV68z+3W9HUQyfroa40TjDPf3f27PIDgY7AAkhxHcmWCrhlqS5V+Xq1 AEOV3rrtf5/+DmtH2QL1rJ1bsrAfVLnLEKTR/g4nIJC9Ln1oAMeUE84zTb7reajPY2CY a7TmY5bW4G3TPL3ZzzA0ywpdK7lQJOoBqVpKVAzN3BIG9z2E/J7RFV0lmVh4eP0OJo2z 0LUuMA2Ok47njSsSLa2BT2ucsS8ArFZ/bHmDDbzVmQrHaAtsR0oCWI0chh6qB+5LZdIu G4oqy3XXe/KptfJ+2y3FBv+WCsxoUk6VLITTnmZjwh6J8itBYUDXzNKWTkNxuZz0MmO/ NFcg== X-Forwarded-Encrypted: i=1; AFNElJ+n8JYhjPitYCNwTuFPa2S2HiryuRNYVOwYwLvrb42sImkM1jVNqUFZRLEGYKkU9ul7PtuBz6xgMpitRUg=@vger.kernel.org X-Gm-Message-State: AOJu0Yx3XZsVBBzvWaWnhkyn3GW3cvWzBLbE04879F6FF+hGDt0A5qnK 166Hz+iDYGNmCzkNS/+JFN2McJK1UKT3Ga0VjP304tB5xV58YwVwCLh3 X-Gm-Gg: Acq92OFN7lumUx2f/VLKBPlbB+y8JUxsJJRpKcYhKcba39KJkaz3Dzr90ujzCC2pWZK /Bwkbnn4PLnBvCife1ym+hJ+9K3GMO8nEnthdk18rCFsN23tEvf5znH+5rStis21FFT11t+LHd9 MQKckO6IysHm80bV310DYdXTy+62V8s0Dki5vmFtYWHoMlB1f42k4k9j5bijx7GY7zeDyXQNXvV teJtWFzSTCtXFNS5AbX9PVSJHRyKL1tgOIdu9nKNhHj8SWqFV0Tc5Sw4v3xrLjZz+LVUg++WqTO DbVvu9p9rFYLk2S4wKFPYC6pJ+lB3irN3wrHyf/DfYtNDXcYUuDZgrWX31Tff30WY71P5xdhYV2 pTpqOoW5nSL7yx3PWyztyNpiaXsvrVAOLpeI6SKbY4sHQj2THA1iIWJ9wwHzvipJSJHtfwupy4o GgE5uURtFJkvemClwEu9XsNYU/EI1g9+7XD1+6cuVGPKCtOQCysEm4/9Y0TCfBEoo/T091lD2nk wjls7rO6ThfKRCBiEsrJ3St5iA= X-Received: by 2002:a05:6a00:2793:b0:83f:2568:d456 with SMTP id d2e1a72fcca58-83f33d277e9mr2723997b3a.29.1778823749726; Thu, 14 May 2026 22:42:29 -0700 (PDT) Received: from harrison-Surface-Pro-12in-1st-Ed-with-Snapdragon.wework.com ([203.117.161.34]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83f2b9bec8fsm3106116b3a.33.2026.05.14.22.42.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 22:42:29 -0700 (PDT) From: Harrison Vanderbyl To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, Herbert Xu , davem@davemloft.net, neil.armstrong@linaro.org, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, jikos@kernel.org, bentiss@kernel.org, luzmaximilian@gmail.com, hansg@kernel.org, ilpo.jarvinen@linux.intel.com Cc: Douglas Anderson , Jessica Zhang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-input@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH v2 1/7] dt-bindings: arm: qcom: Add Microsoft Surface Pro 12in Date: Fri, 15 May 2026 15:41:46 +1000 Message-ID: X-Mailer: git-send-email 2.53.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Document the compatible string for the Microsoft Surface Pro 12-inch, 1st Edition with Snapdragon, based on the Qualcomm X1P42100 SoC. Signed-off-by: Harrison Vanderbyl --- Documentation/devicetree/bindings/arm/qcom.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index b4943123d2e4..aaa9a129908a 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1168,6 +1168,10 @@ properties: - const: microsoft,denali - const: qcom,x1e80100 =20 + - items: + - const: microsoft,surface-pro-12in + - const: qcom,x1p42100 + - items: - enum: - qcom,purwa-iot-evk --=20 2.53.0 From nobody Fri Jun 12 12:42:43 2026 Received: from mail-pg1-f172.google.com (mail-pg1-f172.google.com [209.85.215.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE044364029 for ; Fri, 15 May 2026 05:42:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823760; cv=none; b=Q8SQF4FiYPvYkxXs0zFu7MAPhfYopELyW2IDhDP7Lppy1HnRV46E71or62FsCemKE3+J+j1k1E4jn1qec43zZATqFYe1mk4MKi7lX7aoIsTxIiVQObonNHfox0wDRql2glz96l8kJbMDJ/UXvLgZNWv4RllGpPM921VUYVOTh+8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823760; c=relaxed/simple; bh=Uj71YxMd7CP0/+rQajvUXPXNAzpKdvAdtZ6sztvIkfc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TxFPGwEP1x3PJupjBFBIDzQssgbBMPB9trE18Ata6B1o30jm4xFfjC46XIbkT52OiNQyv7uiA/3OxGrHa/vdvSw3lyo1HI/oPv29kgRm0BaigxzTAHQRL2UxCWT6v9H3ThO+S/37sc2xdfp1cQDxn7rMUBO3wRAQXt4LOGvB4X0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=TyccnjCo; arc=none smtp.client-ip=209.85.215.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="TyccnjCo" Received: by mail-pg1-f172.google.com with SMTP id 41be03b00d2f7-c796163fac5so6514759a12.1 for ; Thu, 14 May 2026 22:42:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778823758; x=1779428558; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0S90v3cSnC5Da6GOQpoJCPTnbSf2YszUbZPGAtd7qaM=; b=TyccnjCo4ObKyoBHeWWN0uDjXxbjeo7qEUhVMUXhuS7N342JBrsNaAwA6mG4BKLzrh UA0AhBDlvKPTZjGeXFIDUICBZAZDDruCD2uwsXsu1DORDIc+JFtsbJQjBHa8dexqap5T VRR/a+jCOwc+UdR3L3UoZG0S6XUllwzUzZMf4JNQMI9sdXgC3czHojU2H88VS1q8xDTu 2Cc4XuQ//QpXgsitNSPiIWbiejqkjMtwywab7QK5HFHGQyZRfAT5MOLAD+pXaMfGL1jM LF1COegvVw6wAZ79+jkDrg1T89TgLx5V8aaHuk9WTJHLUNAlDQM4NzGJzoWapa6MN13M T/Fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778823758; x=1779428558; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=0S90v3cSnC5Da6GOQpoJCPTnbSf2YszUbZPGAtd7qaM=; b=EFHabe6I1Y+j0qUKnqFThMizwkPivqli/dzbuLp7n78buagwAxlWZ5XNgA66ZwwR4T S5MEU/t/zAe8oXuzArshE8/MQzH1Be4jTo/4BIKr6TgSJhrWveYz+3g1z26+Vu8xrLTU lnRxNtfH+Ml9MKLgwMbaGQKB8rgn+uF35s3akD7jG88DXRtnrnMSFjHTotKu2AlSwH6/ Jey47IO74eNEXf5yTc58uD+D+QpfYLRHEGVubBRy+7UaBlAlMaOOxyW2tpZYPHH72G1Q EYdYEP1L1wsS7Roi+YUDQxr2bpPLPrSonZrvZOFjAdFEqfusvSBEmPIJRB6LTv0LTNsE C1zg== X-Forwarded-Encrypted: i=1; AFNElJ+oaccdS8YjNpuimAO7yvn1Oxi8/zzvplkbj/TlR3vD677qhN9XIxQPHwhPbf9Tf2OnVXs6ZXxeXxN9Afk=@vger.kernel.org X-Gm-Message-State: AOJu0YyFLhMj9t5qTKveHZ4o9kKIkAB9N+/xooi7uTj88zTmS1Mud/aB drg2PbvXvdJUG9CV+1Ty018gys7Lg6hteRwiFu1hlvLVuDRLEZon0qkw X-Gm-Gg: Acq92OH8qwrJhTNkwC0ZAUWB70CoKhRKfcvVFOHUFP6PHyHvAU9pQc3ihmPtbeHb5be EfFzLYMVrDNRvlpUXuYbRXKTMiihVYCMt8D+1EVubV4k/VxiGm6CaPT9791f21EEMpnACKMIKDK jhCpttdtGV4ZUuGFR6EF6EdASAQzVYX5RG9NrJGgnE88Elsk/K6DY9G8MwzHUZf1vKGIqzlUp2l WshNdeBZFGWCkzaXFWXENjugnzIiTIuwy6G8MfUNfTJvRNkecg+l+4WpXeKfO6KTEdfkxveglo+ 9OaxNAD/yjm3f1FS+IRDJpxYBwohBflJTKJHw96fupoTA+mVV7eZ45MIYDaEyKmBlk1A9ydqJjl vng2v3hsQEHgByZ7QVN3CM3mFClwpXzZP48ecl4eOQxfRqm5FqDVDf0DCTRrrOGdU2DrkWApoKD fjRd4nk8Bs0PDms0Quogj4nNOE7tkhQ9dsGFBSFs/OkFpDAcc3W4QS+Et4h5J/yJA78GeqNCG6P 2Ha9vOAHfwSoTKZF9b6Qz/kklc= X-Received: by 2002:a05:6a00:400a:b0:835:cc47:6fe7 with SMTP id d2e1a72fcca58-83f33d96b70mr2736897b3a.30.1778823758064; Thu, 14 May 2026 22:42:38 -0700 (PDT) Received: from harrison-Surface-Pro-12in-1st-Ed-with-Snapdragon.wework.com ([203.117.161.34]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83f2b9bec8fsm3106116b3a.33.2026.05.14.22.42.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 22:42:37 -0700 (PDT) From: Harrison Vanderbyl To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, Herbert Xu , davem@davemloft.net, neil.armstrong@linaro.org, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, jikos@kernel.org, bentiss@kernel.org, luzmaximilian@gmail.com, hansg@kernel.org, ilpo.jarvinen@linux.intel.com Cc: Douglas Anderson , Jessica Zhang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-input@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH v2 2/7] dt-bindings: crypto: Add x1e80100 inline crypto Date: Fri, 15 May 2026 15:41:47 +1000 Message-ID: <14cd42e3d3af4b2591c9dd8dffde11ef18666751.1778822464.git.harrison.vanderbyl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add compatibility string for the x1e80100/x1p42100 inline crypto engine. Signed-off-by: Harrison Vanderbyl --- .../devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-en= gine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-eng= ine.yaml index 876bf90ed96e..a338c4a33e98 100644 --- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.ya= ml +++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.ya= ml @@ -24,6 +24,7 @@ properties: - qcom,sm8550-inline-crypto-engine - qcom,sm8650-inline-crypto-engine - qcom,sm8750-inline-crypto-engine + - qcom,x1e80100-inline-crypto-engine - const: qcom,inline-crypto-engine =20 reg: --=20 2.53.0 From nobody Fri Jun 12 12:42:43 2026 Received: from mail-pf1-f173.google.com (mail-pf1-f173.google.com [209.85.210.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39E3D31CA4A for ; Fri, 15 May 2026 05:42:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823767; cv=none; b=spUqY6iAnF+VDvxZ+D0ey+MV75HqsJM44uBmMX4kUHw80KlCqQVQzElkQJnk/V9sM8TN5eUcwnlMhVOEJvxTdOGiRhz4CMXTkWaL6gNI9k1xC/7opgghSp8oJX76wQqi4K/kkimCJ1Voat1H5VB/M9mry537cSUtzNXnlJ02/DI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823767; c=relaxed/simple; bh=Y73P+DS/FTU/93/7veziKipaMWdTKZWFtdrT9hZPEZ8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gS35EZ6j2L6dKBV6hoXpfFv1y0gva0TqgiiZoYc4xnalB6xq2sDLE65csfafdIfpi5NLSEnfvFWWyCizg6To8Oxs2xtKp64jmFr637UZ9a4sIsUIw2/eCanDahrpWXpxPutfA2ah0EGJADk5jjivrImul4pelRgsa/HT+GSMMzY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=h5Uqhr98; arc=none smtp.client-ip=209.85.210.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="h5Uqhr98" Received: by mail-pf1-f173.google.com with SMTP id d2e1a72fcca58-835386ff122so8435136b3a.3 for ; Thu, 14 May 2026 22:42:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778823766; x=1779428566; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1QMruzNzp/w/H8WMl6Rm7xeR7IZKT2QV9Y6KPDlL64Q=; b=h5Uqhr98A/S+sWa891n/nmnzzvr/7o+Kxt+YySgyGIP/67X2XmE6pED4cwveVgY9h4 hMxNtNMkWN8M0HfhFnJ6Y1K0qZHZ+E85ByyTCh4Biu9psn3h8fTEyzg4JxZMlrEzNjXW WdEsY4brrHD1CreJVnYW+gEjohMz1F8teTntonshydl28SBQL0hQjD0Gsald4IFPn2kf gVnmoObBr+8R6Iis3BRWgMQlSyL9fMdMfVowozSpmg6iHw6W8oEgm1r6rUHTUpG26WFV 3Fy/Qqiai9h6wgM/BQxmXsjeLpLogntYV34iSsbUKXgIIekGljwC564i0Mvz8AVvEsVi aMHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778823766; x=1779428566; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=1QMruzNzp/w/H8WMl6Rm7xeR7IZKT2QV9Y6KPDlL64Q=; b=bBAWSagnfaptFUvxkbUVNzmeLrJUBmj/HCjKoXXIkh2JgTG5L5z0A1Q92FPzBhQuuf 9MyvHwQu5dPNUYwzKwpE29w2LW0TVBHhsOURynhehLSZNKKV7twAQYxaLRMG636g769i gqGuzFd4KpAafFKO7NJY/Dwp8Q0ouqmlagnytZanCchN77xvVil2tl3BrIS1mldB/36a mTEk5uzqC9dxNYRMBeXn3Fi05mR89xBHD6zz8+dd+xS8YpCNrGjiUMG5eAQMt5m0wpIg LJJR5uGF9/liGhV5TrYo61JrLE5SUBiIQV99qC6U81QNZPByPY0eFyEu7+kN2gVwt2BN t+gw== X-Forwarded-Encrypted: i=1; AFNElJ+HUVKdA9yVsv3sjjUW3T2A92YH+5M0MW61dw3sRLw3OJLQmZtug3HiPWaz0ZPZ9LcE1mEdlkcR01MdkYw=@vger.kernel.org X-Gm-Message-State: AOJu0YzpmbeT/tOkd15mcA96gM4REg9lXAkKyghxD3IddZkcEZUAHO8F kxtJYRENyAW88AAE8X9G9sSzEwrQeWlF00uACWzBOOkkhuHQRuDN0LSo X-Gm-Gg: Acq92OHit363r6/OSuBZ5TpoXFqytcN9n6Ppks2LhxgE169rezTuCS3qthzn/UDYxCp U0BsWKm4IYRBL8hit/ZC/wkOig+bFUbkng7LKCMuIsndqmPm439BKcy9fIFm6wAZrgIBQXGY1sa zhND54zBpqi2icjS+dZCDLNu2v1ceE4orSco/hRrZax7NPGfKFh+PxqM2Srsb2TnQ37QagI+7mW Vp+rGgs7WNhINZv3vhNoJGheqW7ZoYhgowDqlllqwu2BB4ET7GhCm/fnA8pTw0Apd1zM/lGX8N+ XemRrCcU6mly2t8dq/nhx1Wv6bukeyrbMcfw8ms3Qu52p8mQa8XxlguVQsIS9w4xlZnpVEAVqdn fE52QeXGKLv3YVE8x4B/OTY2VbzP5P3CdmuhaCxWRu8X5mkcSgHuwrqKsAZzcqx2rNAosXwN8GM YMl44GFSTqPAi5S85yeVQ97gzI5sCaWJW9o59JV1G/mZX2GEXpFJzJcZ5E+sBR8Ttm6PZPKsNuA S16zW6Z2rslY/KZC7bqPeXpWgg= X-Received: by 2002:a05:6a00:340c:b0:82c:6b46:271d with SMTP id d2e1a72fcca58-83f33d0a2e5mr2772793b3a.48.1778823765596; Thu, 14 May 2026 22:42:45 -0700 (PDT) Received: from harrison-Surface-Pro-12in-1st-Ed-with-Snapdragon.wework.com ([203.117.161.34]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83f2b9bec8fsm3106116b3a.33.2026.05.14.22.42.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 22:42:45 -0700 (PDT) From: Harrison Vanderbyl To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, Herbert Xu , davem@davemloft.net, neil.armstrong@linaro.org, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, jikos@kernel.org, bentiss@kernel.org, luzmaximilian@gmail.com, hansg@kernel.org, ilpo.jarvinen@linux.intel.com Cc: Douglas Anderson , Jessica Zhang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-input@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH v2 3/7] platform/surface: SAM: Add support for Surface Pro 12in Date: Fri, 15 May 2026 15:41:48 +1000 Message-ID: X-Mailer: git-send-email 2.53.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a SAM client device node group and registry entry for the Microsoft Surface Pro, 12-inch with Snapdragon. This set enables the use of the following devices. 1: cover keyboard 2: cover touchpad 3: pen stash events. The battery info and charger info devices have been purposefully omitted as they are also reported by other drivers and cause conflicts. Signed-off-by: Harrison Vanderbyl --- .../surface/surface_aggregator_registry.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/platform/surface/surface_aggregator_registry.c b/drive= rs/platform/surface/surface_aggregator_registry.c index 0599d5adf02e..884049961415 100644 --- a/drivers/platform/surface/surface_aggregator_registry.c +++ b/drivers/platform/surface/surface_aggregator_registry.c @@ -422,6 +422,19 @@ static const struct software_node *ssam_node_group_sp1= 1[] =3D { NULL, }; =20 +/* Devices for Surface Pro 12" first edition (ARM/QCOM) */ +static const struct software_node *ssam_node_group_sp12in[] =3D { + &ssam_node_root, + &ssam_node_hub_kip, + &ssam_node_tmp_sensors, + &ssam_node_hid_kip_keyboard, + &ssam_node_hid_sam_penstash, + &ssam_node_hid_kip_touchpad, + &ssam_node_hid_kip_fwupd, + &ssam_node_pos_tablet_switch, + NULL, +}; + /* -- SSAM platform/meta-hub driver. -------------------------------------= --- */ =20 static const struct acpi_device_id ssam_platform_hub_acpi_match[] =3D { @@ -500,6 +513,8 @@ static const struct of_device_id ssam_platform_hub_of_m= atch[] __maybe_unused =3D { { .compatible =3D "microsoft,arcata", (void *)ssam_node_group_sp9_5g }, /* Surface Pro 11 (ARM/QCOM) */ { .compatible =3D "microsoft,denali", (void *)ssam_node_group_sp11 }, + /* Surface Pro 12in First Edition (ARM/QCOM) */ + { .compatible =3D "microsoft,surface-pro-12in", (void *)ssam_node_group_s= p12in }, /* Surface Laptop 7 */ { .compatible =3D "microsoft,romulus13", (void *)ssam_node_group_sl7 }, { .compatible =3D "microsoft,romulus15", (void *)ssam_node_group_sl7 }, --=20 2.53.0 From nobody Fri Jun 12 12:42:43 2026 Received: from mail-pf1-f181.google.com (mail-pf1-f181.google.com [209.85.210.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1532A31CA4A for ; Fri, 15 May 2026 05:42:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823775; cv=none; b=Gula4W6X6QG6cTH4DNlQDukFe4RKJc0RjDQ6CGRDjolhuOmY3K4fqKRcO7DSmRnmvWH8D4fHVHAkBXH2Ca5H7sazmhLlJ8LMHKmHWNHiTUwm4CS9o568sXNuPIXqY1stAQ5L9Sx0o/Jec5rfFC+eUk27wBKfVPfNG4mWD38A7Uw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823775; c=relaxed/simple; bh=GnGzQTNG2sWXCYiVIHV6PxxXdvgI+nP2hkQMIdexBZc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jGvr28bCmh5pkMYo4bHTuP8R4tJ38vW6tYAwBq1FkudUZhtUE1Ef8yWubsPjmSP7+f7rIH/KQ2+ErdsosvHP04FSGPjgi4GA9iJq0LyN69dbCsK8yaxd+yd38enxsR1+Q6K2Sl3HITlGw62VYxCVy4Xr1zpf+fUpxEugpuf6MtI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=IeVeAtJj; arc=none smtp.client-ip=209.85.210.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="IeVeAtJj" Received: by mail-pf1-f181.google.com with SMTP id d2e1a72fcca58-835b78c3797so3828916b3a.2 for ; Thu, 14 May 2026 22:42:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778823773; x=1779428573; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Vu8r9w9o/+B86iBJC+fZKkUwDRzmjJF1xgahG3OvjQQ=; b=IeVeAtJju4/+vUQAXwnjDov4VYTPkTmxzLXBJaqJ5dVcHLFzly+VOfRY6jY4kl3Vut YZ0uFVkIJw3/0tH6XOb1c+lxX+hBBjL9+0/KqENkkcLYEwsuMnvfu08U8ujHWh7UZtGF vhsBZoNinnxsxp6z87QiRL/+Z1lESdhyAaztjtDrjeHLmLbOkJvK/DFrn/jBrORl0Pjk zceUQdWI2nUx3Ggi5khpRYqAGOtwpJvpfgrDTQlx2Sxr/02P0mPDXBY+98IeoAA4d4dI BIZwurFwOZs/Avh31IrqaImqDSFQFyby+ItLgMY0t1fpfxXbCnZRVxMLyw+LHRK7oCA/ wnrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778823773; x=1779428573; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Vu8r9w9o/+B86iBJC+fZKkUwDRzmjJF1xgahG3OvjQQ=; b=FScUfzSZOlULN1jnwzC5g56GiD27MExsxD08mj1ato+zavV/hJRIQ0IisQtKhu8oX2 FfC7JxWwJHhZ7paNChHm4+N4IFiQZvKb1BcjsFDAgnNyFgAXQXZT7im2v0Fc/J3gXaDJ 8cYZxnA1wjUHF4j9Udn6KlZJE5EdR+WiAnhE1Z1t+Zr0BPsNyB2IWQFes5Gu0l0FwY9M GAp7TYx20nrf/vfrgjdEz/Z+SeJuO37yHJvoE5snrOqRA+VRZ+L9quhdO6NsMbgPRjpS kZVu6KJa9gjxC/JT9HsbGP8alVFgzTQ2UPWXw5NoMU4PV1fM0GIHVZj+TWIT02SNiaWd xurQ== X-Forwarded-Encrypted: i=1; AFNElJ+BnZk96IwimKpzTz1PxstVPtcBTZIdXvxKwHm04+KapwKPRmCW/lwCIqKzz7Xp10+GrjU8ZsJWgZG/OdU=@vger.kernel.org X-Gm-Message-State: AOJu0YyCHy9h3LvuDVDR5RiecmpWS2vu0n9wHzrHaku8/u3scp7Qp/ey V4EFV8RPmd8Xv1UkSGZKrMQdPcn5Kotg8UyjJ+MURtKhkwaKS2S/lpG6 X-Gm-Gg: Acq92OEF1nV9S8VIZxzVn3Uy2190bLZE/duI9I2QM1PwWDHvP6PYYI45EZQowZvMKlp 7h1EReE12fJTzFXrWnTiT2WweGqRlgta1NQAEwrny0R8gUM5OjJTGwzM7slTYBHZ27IwWroyq0s Nzqoeh8K1qpwx6Qp8iY2WtIkU9HvwIvivD4uOuSzapjhv2MiyYbu4qvT7jTzf2XAu7owuOS6lvW JBUxhb4D3povcB3uadr+fInjs5F0ae3q2FaGKwfqirbp18ybPJ8ZK53BlfLmnzXZL/senvPiFSR 0Abt1lja2DiVEWH+j/4S4+WkgSqvyF1P/twGzEeGU0Eq0LH7WsfXPp4pOeSeAUCl2R8Hg1Z32nc TEm7N+NI1ibN+JYeyQNhMmsBUSEMvh3BRTEYFxCw/JxstZRtBtdVfCmjCuLr5ouMjJpMQ1CK2BK qGYMnG42jdL5HLx2GLK1a02EdLErJ5M0ITJYAAqXbnGA4Cej1fhAEgJQl0qWumosaMuTsra/32/ moo2THaxckn1raYq5aT4xdtHJs= X-Received: by 2002:a05:6a00:ace:b0:829:8a84:b9fc with SMTP id d2e1a72fcca58-83f33ba720amr2908112b3a.8.1778823773353; Thu, 14 May 2026 22:42:53 -0700 (PDT) Received: from harrison-Surface-Pro-12in-1st-Ed-with-Snapdragon.wework.com ([203.117.161.34]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83f2b9bec8fsm3106116b3a.33.2026.05.14.22.42.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 22:42:52 -0700 (PDT) From: Harrison Vanderbyl To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, Herbert Xu , davem@davemloft.net, neil.armstrong@linaro.org, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, jikos@kernel.org, bentiss@kernel.org, luzmaximilian@gmail.com, hansg@kernel.org, ilpo.jarvinen@linux.intel.com Cc: Douglas Anderson , Jessica Zhang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-input@vger.kernel.org, platform-driver-x86@vger.kernel.org, Jiri Kosina Subject: [PATCH v2 4/7] hid: Pen battery quirk for Surface Pro 12in Date: Fri, 15 May 2026 15:41:49 +1000 Message-ID: X-Mailer: git-send-email 2.53.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The pen setup for this device uses bluetooth for communicating battery levels and status instead of reporting it over i2c. Without this quirk, the device either reports an extra, broken phantom battery, or hangs. Signed-off-by: Harrison Vanderbyl Acked-by: Jiri Kosina --- drivers/hid/hid-ids.h | 1 + drivers/hid/hid-input.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h index 0cf63742315b..d16f55479786 100644 --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h @@ -459,6 +459,7 @@ #define USB_DEVICE_ID_HP_X2 0x074d #define USB_DEVICE_ID_HP_X2_10_COVER 0x0755 #define I2C_DEVICE_ID_CHROMEBOOK_TROGDOR_POMPOM 0x2F81 +#define I2C_DEVICE_ID_SURFACE_PRO_12IN 0x4376 =20 #define USB_VENDOR_ID_ELECOM 0x056e #define USB_DEVICE_ID_ELECOM_BM084 0x0061 diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c index d73cfa2e73d3..61ecd840d0bd 100644 --- a/drivers/hid/hid-input.c +++ b/drivers/hid/hid-input.c @@ -395,6 +395,8 @@ static const struct hid_device_id hid_battery_quirks[] = =3D { HID_BATTERY_QUIRK_AVOID_QUERY }, { HID_I2C_DEVICE(USB_VENDOR_ID_ELAN, I2C_DEVICE_ID_CHROMEBOOK_TROGDOR_POM= POM), HID_BATTERY_QUIRK_AVOID_QUERY }, + { HID_I2C_DEVICE(USB_VENDOR_ID_ELAN, I2C_DEVICE_ID_SURFACE_PRO_12IN), + HID_BATTERY_QUIRK_IGNORE }, /* * Elan HID touchscreens seem to all report a non present battery, * set HID_BATTERY_QUIRK_IGNORE for all Elan I2C and USB HID devices. --=20 2.53.0 From nobody Fri Jun 12 12:42:43 2026 Received: from mail-pf1-f172.google.com (mail-pf1-f172.google.com [209.85.210.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5BE20364025 for ; Fri, 15 May 2026 05:43:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823782; cv=none; b=RYrJgCRyA2/BfXrknu9r/7MGEe4nsD785NLTS9WaaW3ROfxEhqLnyNh/aN05CZaUgBqKHZkD9tY38qNRT1DSFfn9V5Bs2IcwkB14uJzKbExmoXNQQCTsMkT9zMNh5788P1KkfXyg0U+ryXd+4N9sZyWWMYVsUGLlmb+WPeZeXM4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823782; c=relaxed/simple; bh=PpKTrbBM4Os8Rc8SCG+XYjDDmnVB1a2xO0tDP9ChOPs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=X4+PmXY9oEm2XoazGKHe879VgYDptEj8fKGeG3Sanbl6n+SSamyPrc0FJ5CCg2daq1qvn3jHa+11F2RxTkqUnkYcNjar9gS70ql0o/liy9gUwiUO75FtfuzSLQAFMeBLtAEu3G++WRVgRAT/G9tgsJjFjXA/9aCCux2mcLz7jsw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=OgtS8lN+; arc=none smtp.client-ip=209.85.210.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OgtS8lN+" Received: by mail-pf1-f172.google.com with SMTP id d2e1a72fcca58-835399c11e0so3964822b3a.0 for ; Thu, 14 May 2026 22:43:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778823781; x=1779428581; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=L3PjlyOf8sBl8btmWeVxVjjQtlMp0Y5dRKaD1umBdh4=; b=OgtS8lN+M8PI7PmackOsmBnijGCXED8pYUDNWm4hAHcxUwnaOMsSKvtOZ5/JTtuEfG IlYDC/uEs4/3LlXbS+gCFlnJGBxee5RVh3NRQbpLRKDWyW/IbfhJrSpX3aB10iUWft21 jFIesrYPkUsGv5uSwlraY2Fl3y6Sfo8sQsinKU669Zj97qOQd8T+V4BLJVhmq7TH3Wqp EF7KCylwDdhB3C3428lLZsu6sYdt7ibMvSzT6gmlBA9P87j2sBkUdifmRBjLMHWDKZln 7qg7dCWc0Oi7/pZWGv2yhIJBPVLoRtv0ydkxO7GgNcSZN0qfb1pogamFNmPya0RhJy/T e/Dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778823781; x=1779428581; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=L3PjlyOf8sBl8btmWeVxVjjQtlMp0Y5dRKaD1umBdh4=; b=HGDdZzHIuhh/99dhsqIVJsRbmKsPoGjOSKD86CGpHsfyMHDG5D3o9H/tb7MHmR32yM eyL2FrySY8PEC5lOuBSDgKXgs1tUI45zH3jABnqmjqbRqSMKx/yOW9RDpwZtHj3pHLzr SB7K/9bHQRWj1tcNbzI478/RaCF/+rOzHfeY7UbN5TiSbpLUuIZnrdD276B7lv/MGTaI G2ft7IZqvJVZge7mqMceax8cBt8YRoiSS/cLbeXIvigPTsU0+bzU2vUMx2HCaB2ZZupP lIsZGvYMKJHubySy3Vjx3q+Zi3WZ23hVADzrK7Zg4ADio5vmIiLLgAHvH5xf7htZlh5h xdvg== X-Forwarded-Encrypted: i=1; AFNElJ8e59OM0MBciT7RCVqa9O2IQ4n8FzIFOsxUjMc31EDTKSqNzGHRvvfNO2Y8d53fIVZZWFhljNI36Sowoqw=@vger.kernel.org X-Gm-Message-State: AOJu0YyB/Fhvmo9/HKEYOz2nt6TzxQMa1+n8AX3RsE7LmxUDnhVMQf8+ DRg+vDo3jW2BCXoip/xrwpVq7vBYNR6ov9jo3ao0ZLM/CqUL/RAAuHb0 X-Gm-Gg: Acq92OHZqUx2MjzCX78o2LYzhEw3lEwGVdb7uQOzjJ4OU/UZtqKPUxgNzQQTRo3/wLo qKmOVS76qyTIX3do8P5Wh9Rq+ts6M10ojgyEtWPqAlS1ntSVbFxYpZCfa6BYrFofM7dFEszFPEM e1KK3c/r5quT0NWBGtzcuuDuCOFJV5nPNE1385/7T+DWxY3cKspGYaCiRpk+TGI9pV3WkopT7wi RDOnyafRTRNsP5wet7/vduI2TDU1TaXRS5qIhQNL+OJLzFt1NkeTCOD/hskcNrsC6fhCi28n+KR MgrLbL5rZch0w29hCA3Xpj8mfgteuna39HJ1If4VBDlkCsqaowm6VubczUFpvyE+UTBmwKHvglF 5NzDPpGxisxZcgL0oUKbK/zpaOn8oYSC4Lv/3y/+pkp/ibeWF/7AlGqY17wAWzDEj8OGxADY8q5 9ifXiKXn1wBKf3ivS+yF0mGm8r6DIx2XmXIktiugf+TADEOyd0L2JwhYRHgJprypWdIGSfuXVp6 8+OR78LGtDqikcdpNehpHRNJJA0Z1vQJRDjGQ== X-Received: by 2002:a05:6a00:3921:b0:83c:de0e:bac5 with SMTP id d2e1a72fcca58-83f33f3d3c7mr2755385b3a.49.1778823780683; Thu, 14 May 2026 22:43:00 -0700 (PDT) Received: from harrison-Surface-Pro-12in-1st-Ed-with-Snapdragon.wework.com ([203.117.161.34]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83f2b9bec8fsm3106116b3a.33.2026.05.14.22.42.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 22:43:00 -0700 (PDT) From: Harrison Vanderbyl To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, Herbert Xu , davem@davemloft.net, neil.armstrong@linaro.org, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, jikos@kernel.org, bentiss@kernel.org, luzmaximilian@gmail.com, hansg@kernel.org, ilpo.jarvinen@linux.intel.com Cc: Douglas Anderson , Jessica Zhang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-input@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH v2 5/7] drm/panel-edp: Add panel for Surface Pro 12in Date: Fri, 15 May 2026 15:41:50 +1000 Message-ID: <9e749a3a483e4a3c684eac3ee6a4b241c94a0362.1778822464.git.harrison.vanderbyl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add an entry for the BOE NE120DRM-N28 panel, used in the Microsoft Surface Pro 12-inch. The values chosen were tested to be working fine for wake from sleep and hibernation. Panel edid: 00 ff ff ff ff ff ff 00 09 e5 c9 0c a0 06 00 07 0a 22 01 04 a5 19 11 78 07 9f 15 a6 55 4c 9b 25 0e 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 62 53 94 a0 80 b8 2e 50 18 10 3a 00 fe a9 00 00 00 1a 13 7d 94 a0 80 b8 2e 50 18 10 3a 00 fe a9 00 00 00 1a 00 00 00 fd 00 18 5a 5b 88 20 01 0a 20 20 20 20 20 20 00 00 00 fc 00 4e 45 31 32 30 44 52 4d 2d 4e 32 38 0a 00 0a Signed-off-by: Harrison Vanderbyl Reviewed-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-edp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/pane= l-edp.c index 497dcd48f57b..2cf52f03c217 100644 --- a/drivers/gpu/drm/panel/panel-edp.c +++ b/drivers/gpu/drm/panel/panel-edp.c @@ -2020,6 +2020,7 @@ static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c26, &delay_200_500_p2e200, "NV140WUM-T= 08"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c93, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cb6, &delay_200_500_e200, "NT116WHM-N44= "), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cc9, &delay_200_500_e50, "NE120DRM-N28"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cf2, &delay_200_500_e200, "NV156FHM-N4S= "), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cf6, &delay_200_500_e200_d100, "NV140WU= M-N64"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cfa, &delay_200_500_e50, "NV116WHM-A4D"= ), --=20 2.53.0 From nobody Fri Jun 12 12:42:43 2026 Received: from mail-pg1-f179.google.com (mail-pg1-f179.google.com [209.85.215.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D22A6363C5E for ; Fri, 15 May 2026 05:43:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823790; cv=none; b=fdc6IqVoeBp9VEpLfGQISnbZvWRUh2ODNZKjaVeDFQ4pT3i3Jhrg93PElF+Q3iu54E8eDXPSsPcwfJjVIbIYrsbwt6YHX+geKZZrflGa0qO3cDf+XNZ4qerOF1XTac8qCmOf6Y7RHG0GfOsUbuS0dEgYyS7IcRXIQd2BlTW6p4o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823790; c=relaxed/simple; bh=SiUP5HbQ3G7apTtOZhLEzXF9Q4mu0oKKv/Ar7YPzG9U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=c+SYLJn0veJ7+wAe3q+IBJFNN1vImkmQ9NKoJnCwJVdtJYCJoa84FBdssdPMpX2yTdaF/qo55dRVfZ2nyF4CPbeo5/hv7pItdPcwptag0tm/gQgK/+xXS7iM4jRuiaWXpgJUypZSQzn3D166R5bWa9wiWqbDHejCUfUZFXALqwA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=i8czAkuL; arc=none smtp.client-ip=209.85.215.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="i8czAkuL" Received: by mail-pg1-f179.google.com with SMTP id 41be03b00d2f7-c802803ac17so4014786a12.1 for ; Thu, 14 May 2026 22:43:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778823788; x=1779428588; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PGxg0Mcj6I7tC+AGT1Hg22gidJPewv2bFQbIhOlsycI=; b=i8czAkuL1qW7uKzNR3k7OK4djrO5NzYP4Acolbdic9GR/FqgjvJcz1k8vkm0Ft3tAi BJfkl28OfMhjrkOLzhzYcCR2yWaP6o/I1MquqZxPaa4BCUM5KVXoTGj8vDHfURZa5Ikw ye7cov56zt8IijoCeD236toJq55mOhtNG+4B0P44fw8jrCXdBQlmJcbTfKFZT5mMqzrP /ZplfFKJ/shAl4ZHU9bBKAnfmx1nIhWNFxCg0/6WgRmVJShMggzza59UvsImGxBjPiGa RB2QtqbQRZ62bNtj0XSPY8NTXCz3R/SA0ydNmemq3RsqD+Vd0U8W16cXW4AiB2+M3ZZs iWjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778823788; x=1779428588; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=PGxg0Mcj6I7tC+AGT1Hg22gidJPewv2bFQbIhOlsycI=; b=ERtTVD4O9W6Gr2BEelX8XTE2bta21FxGb1nSA/dFN5ID9qvHYJ52BKuV5FxnoqykFV 4f4PSwVg5JKfE58GI0fJRmsZgOlW7nAN1sxqCg1yUed3EwqDmVG2cTgAbZepqYAxX8jA GvwbhRV445vVjLEePRKmDiyXNZ/IlQeoiRjltCJ3gNmvrDz9+aKorZiD6oeYD6rjdTG0 WLArGP76DC4CrPSy5C+KKD/xSryzoyrRBAXRdoRc3ZXfhzyPy/unlafE+b2xyfH2xL/l hq2Q4yRkeb3MsUXDGXPb7iPxjv/KfTUE4uzPRhyIlOa3y/B/r+CSttXC4LQvXUdQiUop twwA== X-Forwarded-Encrypted: i=1; AFNElJ/pZTe4wbciflxUhIhhodt0mLiMYZcKR1EaLZz4/yxtt4n5PwI9Zc/Td5NfwvWlpPz0cagl/Gpgylgwmx4=@vger.kernel.org X-Gm-Message-State: AOJu0YxLSPJ9UjNVrIKkhmc1kA8TDtoGvk/XDtZr+S0uZfIJdI666vjH nTFTt2SWWpNAhDxsUO93ioQ5kCVx1EEPJxQ+1ykp1EUcWYVCZOOJRnvP X-Gm-Gg: Acq92OFnIOi9JLyp3oPyu48RjVwBed7juhPT8nRLovXY7W4Dax9qiHqqqLnLBND8btK S4glsNJrTuLN8DBqQCBl9RYuhuZfsAd8IuVw0+pq8xkZjwqVyRVbVdXNZyJ/ZWGuhKOkkOeKR1b RrVaaispqpX3MFXIn2VkR+mIjPhkdM/R54wQM9x9hTLyMvsNN+y/YbHzrCOSNujcYlD+waWFiu5 JEQl6C367WeWFQdB5hTJ6tUYXcLn7uKkeSzd8Izc1IQ3/80dVfALJzCYpO1IDR7ZIUsjonYgDlN 2vLqHqnB/n0zE+8Ay1+fS2wqlydge1xnWG/8dST2C9MkD289T19aZlSQ6UdkiAnQI5V6gJfnZPu 8Y+pR+/ZcLoWGF0g97V6ibnzih2FstPS2r2q5RqNcsNkJTLdXSZH1uDeUbrarGH3o3aPHI9nEmv OfPOXIf1lwy1iENa68MF4NVVr0pJ9t6GnYeSzXf/E7PL2Upc1r0LLI9ZPR20mbdzM7+flIwYSxz JqNbEgklI9t8JVYciM1+otXGAc= X-Received: by 2002:a05:6a20:158b:b0:3aa:f9cb:d43c with SMTP id adf61e73a8af0-3b22ed00276mr2807800637.34.1778823788168; Thu, 14 May 2026 22:43:08 -0700 (PDT) Received: from harrison-Surface-Pro-12in-1st-Ed-with-Snapdragon.wework.com ([203.117.161.34]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83f2b9bec8fsm3106116b3a.33.2026.05.14.22.43.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 22:43:07 -0700 (PDT) From: Harrison Vanderbyl To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, Herbert Xu , davem@davemloft.net, neil.armstrong@linaro.org, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, jikos@kernel.org, bentiss@kernel.org, luzmaximilian@gmail.com, hansg@kernel.org, ilpo.jarvinen@linux.intel.com Cc: Douglas Anderson , Jessica Zhang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-input@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH v2 6/7] arm64: dts: qcom: hamoa: Add inline crypto for UFS Date: Fri, 15 May 2026 15:41:51 +1000 Message-ID: <30c12b79c6cc481afb13ac93630c5a16bc856ae4.1778822464.git.harrison.vanderbyl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the Inline Crypto node and wire it to ufs_mem, enabling UFS storage encryption on x1e80100 and derivative SOCs. This is needed to support encrypted storage on the Microsoft Surface Pro 12-inch. Signed-off-by: Harrison Vanderbyl --- arch/arm64/boot/dts/qcom/hamoa.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom= /hamoa.dtsi index 051dee076416..22420d0a323a 100644 --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi @@ -3952,6 +3952,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, phys =3D <&ufs_mem_phy>; phy-names =3D "ufsphy"; =20 + qcom,ice =3D <&ice>; + #reset-cells =3D <1>; =20 status =3D "disabled"; @@ -3997,6 +3999,14 @@ opp-300000000 { }; }; =20 + ice: crypto@1d88000 { + compatible =3D "qcom,x1e80100-inline-crypto-engine", + "qcom,inline-crypto-engine"; + reg =3D <0x0 0x01d88000 0x0 0x8000>; + + clocks =3D <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + }; + cryptobam: dma-controller@1dc4000 { compatible =3D "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; reg =3D <0x0 0x01dc4000 0x0 0x28000>; --=20 2.53.0 From nobody Fri Jun 12 12:42:43 2026 Received: from mail-pg1-f176.google.com (mail-pg1-f176.google.com [209.85.215.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ADE9A364924 for ; Fri, 15 May 2026 05:43:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823800; cv=none; b=bxAtmiPTWwZbfQckpkrRye2PvheOOIq4xHLjrBEj0BfKAknmj6cCOM7vblwwkos7ItwCIZRHechyURhBwzEXLRl7KyDPWbKJtoxlqct8Lh8KihaXna+TuOBVV6HTFtSJwPsQzee3pVtUCnVOzbrPrcBtyJaSKnp7yxzwdO9ss5k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778823800; c=relaxed/simple; bh=7hdu7UvjCw7PPNOKum2BeKYj6txVYdLgiic2DWvdDCc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Fa7ScJV7iDm/PxNQVFfLhEjtpZOof0HebngbyJLZZxVyuo35dWcCCEqgkLK8JOmsnKK7QwsVRBdsAzxO+vPkL7BgfyXRsW4L01Ll7xS5IjsXnKZLe9mKFuVM+gQ37U9Yvf12p4z7GZURFZYTZbbbn5Cqp5wgaQ/WrJkT27tuGRo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Ix3ErP18; arc=none smtp.client-ip=209.85.215.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Ix3ErP18" Received: by mail-pg1-f176.google.com with SMTP id 41be03b00d2f7-c801b30188dso3932956a12.3 for ; Thu, 14 May 2026 22:43:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778823797; x=1779428597; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mB5f3tqVgjuDVpoG/7XIIRcdiNEH7CNdPM+NqL/AwVw=; b=Ix3ErP18+IP8LDJJvwLhJrFWaZqeEp0XrP47HB8tMqARrU12nxD4fTTiI5/h/m0qKQ AjR5fvUuSrg5lofRar5QhSRq2KkLZwrj0Kcf5I8pGtFc1xoJXQPLwCmWe3o3nH8PM6PF slpgs+vUAMT7A4CA1jCPrF7c5pBkKZPcyj5zl8LBVHopp4TByJSb4jA6B+GBjleDnByR M0k8uan4imNRAd+gBTqM7XwXPEZdNX3vcXTCeC/3GCquKCEZGBIlPmh3xBbhKxiGKbb0 zCQjRsdYvkU4GoOwE4Vn5w9OWJ0H3Brigi5CaGA5Eb4JueTnFcVzrK+FlVn+CarDxLuS H2BQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778823797; x=1779428597; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=mB5f3tqVgjuDVpoG/7XIIRcdiNEH7CNdPM+NqL/AwVw=; b=VtfPOC6F1WX9g54JMIvsFtsewHMuOD3UkraWbMyARbCmyAxrsNiKava2Is6/o46lIO pwY98gtkdB0AJn1B+x1Kp4tYYZQFyBHdz2JvyLUza8eRjoO8jP3fmvhHQJTM1jT1/WrY 5g15Bira99gatdR7J6/iO6TnvPBykOKs8TmCqqWbpPHQWsnUEQ3ltXrRY1d57RV6l9FN Mmk6CZwSJWeRCl/tGTeUk/MTfszvzJgbdDaM3QtcUNuNMUlhULeG+ejJh1vHODtsT5G5 EwfoGsrMLBklrc8920bslHpzMU/cWvrMV2ZG+p+q0tQLf7OYiePzfCGN+qZf6PeENMSj W2lg== X-Forwarded-Encrypted: i=1; AFNElJ/dRSvYi2Fj91VAwQiCGh8ctsAR+WB+h+TNTyPYZ5CXhbduKLFDKCEGlpOaMfIL0e6xIViA8RIj9CXrRPk=@vger.kernel.org X-Gm-Message-State: AOJu0YwlPxA+2QEXWXvg49mxdHv+b4i0D9MqSXmJdVgphAA152Mtw9dr kN5qwCVfqi5VPLRtapKm164PnanEfm3r8QCMO4M1wItkGKkORqdUDIVw X-Gm-Gg: Acq92OEAdurgCRbrAeQLkYrTt813YqrIO4DxjPevrQyyUk65e3slS9bNra5cgaCAKLJ wGkHJRCCd/FjsbEOURoPaS3RHs2MYO9mqkMSJp9oea3jbRFgewXvWDACddL8syr0nAlDr3iw+5Y vTMZEI/w2OZJA5dqg4CJZgyVwj/WwmXCaEWp045SSo8YtDJEbLbLinQ4ndasxADOwl4HU3AevEH Jp4LWH0c6hSLDePaD6LccjPR0YeD9CqQKqeARj1q4ufA6lKEzRks6AEdAlDsUkqKIlaI34/qrCm jhV/KUoNPxahhDA9/Bq5V8xVtlVzpxpbhfDN5i2vNuP6izrTALSK1l/T9/OoGS6xN2GFV/PKBgi ioWur1xkHB9yNg69ZJSIzIVY/1qUJO3wtwCpDqoNwH1QLWs7Q6hSFx1B3vb6sIVgObcVmvZSmgn Q5sgwrgdUFxl2dMMo9p/SpftucwPW2h/qqH4fagJadOqzKj1qJVmtEHtc4IUHnA43aU0A1SBWXN WV8xIxK2fMS+LZBYOcohdKE5X3Ni/YIh+AAEA== X-Received: by 2002:a05:6a00:2e08:b0:837:80a:5ab4 with SMTP id d2e1a72fcca58-83f33f0dd44mr2883516b3a.44.1778823796721; Thu, 14 May 2026 22:43:16 -0700 (PDT) Received: from harrison-Surface-Pro-12in-1st-Ed-with-Snapdragon.wework.com ([203.117.161.34]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83f2b9bec8fsm3106116b3a.33.2026.05.14.22.43.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 22:43:16 -0700 (PDT) From: Harrison Vanderbyl To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, Herbert Xu , davem@davemloft.net, neil.armstrong@linaro.org, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, jikos@kernel.org, bentiss@kernel.org, luzmaximilian@gmail.com, hansg@kernel.org, ilpo.jarvinen@linux.intel.com Cc: Douglas Anderson , Jessica Zhang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-input@vger.kernel.org, platform-driver-x86@vger.kernel.org Subject: [PATCH v2 7/7] arm64: dts: qcom: Add Microsoft Surface Pro 12in Date: Fri, 15 May 2026 15:41:52 +1000 Message-ID: <8ac29ee38ba80a3fbde8bfe43b74b9b936b31cb1.1778822464.git.harrison.vanderbyl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Initial device tree for Microsoft Surface Pro 12in Currently supported: - UFS - Touchscreen - Pen - USB 3.2 x2 (DP Alt Mode) - Audio - Wifi - Bluetooth - CDSP - ADSP - GPU Not currently supported: - Accelerometer - Front, Back and IR cameras - IRIS video decoder Tested on Surface_Pro_12in_1st_Ed_with_Snapdragon_2110 Signed-off-by: Harrison Vanderbyl Reviewed-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/Makefile | 2 + .../dts/qcom/x1p42100-microsoft-sp12in.dts | 1201 +++++++++++++++++ 2 files changed, 1203 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 4ba8e7306419..8b6d3e4b479c 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -449,3 +449,5 @@ x1p42100-lenovo-thinkbook-16-el2-dtbs :=3D x1p42100-len= ovo-thinkbook-16.dtb x1-el2 dtb-$(CONFIG_ARCH_QCOM) +=3D x1p42100-lenovo-thinkbook-16.dtb x1p42100-len= ovo-thinkbook-16-el2.dtb x1p64100-microsoft-denali-el2-dtbs :=3D x1p64100-microsoft-denali.dtb x1-e= l2.dtbo dtb-$(CONFIG_ARCH_QCOM) +=3D x1p64100-microsoft-denali.dtb x1p64100-micros= oft-denali-el2.dtb +x1p42100-microsoft-sp12in-el2-dtbs :=3D x1p42100-microsoft-sp12in.dtb x1-e= l2.dtbo +dtb-$(CONFIG_ARCH_QCOM) +=3D x1p42100-microsoft-sp12in.dtb x1p42100-micros= oft-sp12in-el2.dtb diff --git a/arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts b/arch/= arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts new file mode 100644 index 000000000000..32b8df249791 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/x1p42100-microsoft-sp12in.dts @@ -0,0 +1,1201 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024, Linaro Limited + * Copyright (c) 2025, Jens Glathe + * Copyright (c) 2025, Harrison Vanderbyl + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include + +#include "purwa.dtsi" +#include "hamoa-pmics.dtsi" + +/delete-node/ &pmc8380_6; +/delete-node/ &pmc8380_6_thermal; + +/ { + model =3D "Surface Pro 12in 1st Edition"; + compatible =3D "microsoft,surface-pro-12in", "qcom,x1p42100"; + chassis-type =3D "tablet"; + + aliases { + serial0 =3D &uart2; + serial1 =3D &uart14; + }; + + backlight: backlight { + compatible =3D "pwm-backlight"; + pwms =3D <&pmk8550_pwm 0 5000000>; + + power-supply =3D <&vreg_edp_3p3>; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + pinctrl-0 =3D <&hall_int_n_default>, <&vol_up_n_default>, <&vol_down_n_d= efault>; + pinctrl-names =3D "default"; + + switch-lid { + gpios =3D <&tlmm 2 GPIO_ACTIVE_LOW>; + linux,input-type =3D ; + linux,code =3D ; + wakeup-source; + wakeup-event-action =3D ; + }; + + key-vol-up { + gpios =3D <&pm8550_gpios 8 GPIO_ACTIVE_LOW>; + linux,code =3D ; + debounce-interval =3D <15>; + linux,can-disable; + wakeup-source; + }; + + key-vol-down { + gpios =3D <&pm8550_gpios 6 GPIO_ACTIVE_LOW>; + linux,code =3D ; + debounce-interval =3D <15>; + linux,can-disable; + wakeup-source; + }; + }; + + pmic-glink { + compatible =3D "qcom,x1e80100-pmic-glink", + "qcom,sm8550-pmic-glink", + "qcom,pmic-glink"; + orientation-gpios =3D <&tlmm 121 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* Right-side upper port */ + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss0_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss0_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss0_sbu: endpoint { + remote-endpoint =3D <&usb_1_ss0_sbu_mux>; + }; + }; + }; + }; + + /* Right-side lower port */ + connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss1_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss1_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss1_sbu: endpoint { + remote-endpoint =3D <&usb_1_ss1_sbu_mux>; + }; + }; + }; + }; + }; + + reserved-memory { + linux,cma { + compatible =3D "shared-dma-pool"; + size =3D <0x0 0x20000000>; + reusable; + linux,cma-default; + }; + }; + + vreg_edp_3p3: regulator-edp-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 70 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + vin-supply =3D <&vreg_panel_en>; + }; + + vreg_panel_en: regulator-panel-en { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_PANEL_EN"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 29 GPIO_ACTIVE_HIGH>; + enable-active-high; + + regulator-enable-ramp-delay =3D <150000>; + + pinctrl-0 =3D <&panel_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + }; + + vreg_wcn_0p95: regulator-wcn-0p95 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_0P95"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <950000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wcn_1p9: regulator-wcn-1p9 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_1P9"; + regulator-min-microvolt =3D <1900000>; + regulator-max-microvolt =3D <1900000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 214 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wcn_sw_en>; + pinctrl-names =3D "default"; + }; + + sound { + compatible =3D "qcom,x1e80100-sndcard"; + model =3D "X1P42100-Microsoft-Surface-Pro-12in"; + audio-routing =3D "SpkrLeft IN", "WSA WSA_SPK1 OUT", + "SpkrRight IN", "WSA WSA_SPK2 OUT", + "VA DMIC0", "vdd-micb", + "VA DMIC1", "vdd-micb"; + + va-dai-link { + link-name =3D "VA Capture"; + + codec { + sound-dai =3D <&lpass_vamacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai VA_CODEC_DMA_TX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + + wsa-dai-link { + link-name =3D "WSA Playback"; + + codec { + sound-dai =3D <&left_spkr>, <&right_spkr>, + <&swr0 0>, <&lpass_wsamacro 0>; + }; + + cpu { + sound-dai =3D <&q6apmbedai WSA_CODEC_DMA_RX_0>; + }; + + platform { + sound-dai =3D <&q6apm>; + }; + }; + }; + + wcn7850-pmu { + compatible =3D "qcom,wcn7850-pmu"; + + vdd-supply =3D <&vreg_wcn_0p95>; + vddio-supply =3D <&vreg_l15b_1p8>; + vddaon-supply =3D <&vreg_wcn_0p95>; + vdddig-supply =3D <&vreg_wcn_0p95>; + vddrfa1p2-supply =3D <&vreg_wcn_1p9>; + vddrfa1p8-supply =3D <&vreg_wcn_1p9>; + + wlan-enable-gpios =3D <&tlmm 117 GPIO_ACTIVE_HIGH>; + bt-enable-gpios =3D <&tlmm 116 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&wcn_wlan_bt_en>; + pinctrl-names =3D "default"; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p8: ldo7 { + regulator-name =3D "vreg_pmu_rfa_1p8"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + }; + }; + + usb-1-ss0-sbu-mux { + compatible =3D "onnn,fsusb42", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 168 GPIO_ACTIVE_LOW>; + select-gpios =3D <&tlmm 167 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb_1_ss0_sbu_default>; + pinctrl-names =3D "default"; + + mode-switch; + orientation-switch; + + port { + usb_1_ss0_sbu_mux: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_sbu>; + }; + }; + }; + + usb-1-ss1-sbu-mux { + compatible =3D "onnn,fsusb42", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 179 GPIO_ACTIVE_LOW>; + select-gpios =3D <&tlmm 178 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb_1_ss1_sbu_default>; + pinctrl-names =3D "default"; + + mode-switch; + orientation-switch; + + port { + usb_1_ss1_sbu_mux: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_sbu>; + }; + }; + }; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm8550-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-bob1-supply =3D <&vph_pwr>; + vdd-bob2-supply =3D <&vph_pwr>; + vdd-l1-l4-l10-supply =3D <&vreg_s4c_1p8>; + vdd-l2-l13-l14-supply =3D <&vreg_bob1>; + vdd-l5-l16-supply =3D <&vreg_bob1>; + vdd-l6-l7-supply =3D <&vreg_bob2>; + vdd-l8-l9-supply =3D <&vreg_bob1>; + vdd-l12-supply =3D <&vreg_s5j_1p2>; + vdd-l15-supply =3D <&vreg_s4c_1p8>; + vdd-l17-supply =3D <&vreg_bob2>; + + vreg_bob1: bob1 { + regulator-name =3D "vreg_bob1"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; + + vreg_bob2: bob2 { + regulator-name =3D "vreg_bob2"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l1b_1p8: ldo1 { + regulator-name =3D "vreg_l1b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2b_3p0: ldo2 { + regulator-name =3D "vreg_l2b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l4b_1p8: ldo4 { + regulator-name =3D "vreg_l4b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l5b_3p0: ldo5 { + regulator-name =3D "vreg_l5b_3p0"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-initial-mode =3D ; + }; + + vreg_l6b_1p8: ldo6 { + regulator-name =3D "vreg_l6b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l7b_2p8: ldo7 { + regulator-name =3D "vreg_l7b_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l8b_3p0: ldo8 { + regulator-name =3D "vreg_l8b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l9b_2p9: ldo9 { + regulator-name =3D "vreg_l9b_2p9"; + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l10b_1p8: ldo10 { + regulator-name =3D "vreg_l10b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l12b_1p2: ldo12 { + regulator-name =3D "vreg_l12b_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l13b_3p0: ldo13 { + regulator-name =3D "vreg_l13b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l14b_3p0: ldo14 { + regulator-name =3D "vreg_l14b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l15b_1p8: ldo15 { + regulator-name =3D "vreg_l15b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l16b_2p9: ldo16 { + regulator-name =3D "vreg_l16b_2p9"; + regulator-min-microvolt =3D <2900000>; + regulator-max-microvolt =3D <2912000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l17b_2p5: ldo17 { + regulator-name =3D "vreg_l17b_2p5"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <2504000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + }; + + regulators-1 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-s4-supply =3D <&vph_pwr>; + + vreg_s4c_1p8: smps4 { + regulator-name =3D "vreg_s4c_1p8"; + regulator-min-microvolt =3D <1856000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l1c_1p2: ldo1 { + regulator-name =3D "vreg_l1c_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c_0p8: ldo2 { + regulator-name =3D "vreg_l2c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c_0p8: ldo3 { + regulator-name =3D "vreg_l3c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-2 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "d"; + + vdd-l3-supply =3D <&vreg_s4c_1p8>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_l1d_0p8: ldo1 { + regulator-name =3D "vreg_l1d_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l2d_0p9: ldo2 { + regulator-name =3D "vreg_l2d_0p9"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3d_1p8: ldo3 { + regulator-name =3D "vreg_l3d_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + }; + + regulators-3 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "e"; + + vdd-l3-supply =3D <&vreg_s5j_1p2>; + + vreg_l2e_0p8: ldo2 { + regulator-name =3D "vreg_l2e_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + }; + + vreg_l3e_1p2: ldo3 { + regulator-name =3D "vreg_l3e_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + }; + + regulators-6 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "i"; + + vdd-l1-supply =3D <&vreg_s4c_1p8>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + + vreg_s1i_0p9: smps1 { + regulator-name =3D "vreg_s1i_0p9"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_s2i_1p0: smps2 { + regulator-name =3D "vreg_s2i_1p0"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + + vreg_l1i_1p8: ldo1 { + regulator-name =3D "vreg_l1i_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2i_1p2: ldo2 { + regulator-name =3D "vreg_l2i_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l3i_0p8: ldo3 { + regulator-name =3D "vreg_l3i_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + }; + + regulators-7 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "j"; + + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-s5-supply =3D <&vph_pwr>; + + vreg_s5j_1p2: smps5 { + regulator-name =3D "vreg_s5j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l1j_0p8: ldo1 { + regulator-name =3D "vreg_l1j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l2j_1p2: ldo2 { + regulator-name =3D "vreg_l2j_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1256000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + + vreg_l3j_0p8: ldo3 { + regulator-name =3D "vreg_l3j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + regulator-allow-set-load; + regulator-allowed-modes =3D ; + }; + }; +}; + +&gpu { + status =3D "okay"; +}; + +&gpu_zap_shader { + firmware-name =3D "qcom/x1p42100/Microsoft/Surface12/qcdxkmsucpurwa.mbn"; +}; + +&i2c8 { + clock-frequency =3D <1000000>; + + status =3D "okay"; + + touchscreen@16 { + compatible =3D "hid-over-i2c"; + reg =3D <0x16>; + + hid-descr-addr =3D <0x1>; + interrupts-extended =3D <&tlmm 38 IRQ_TYPE_LEVEL_LOW>; + wakeup-source; + + vddl-supply =3D <&vreg_l15b_1p8>; + + pinctrl-0 =3D <&ts0_default>; + pinctrl-names =3D "default"; + }; +}; + +&i2c0 { + clock-frequency =3D <400000>; + + status =3D "okay"; +}; + +&i2c4 { + clock-frequency =3D <400000>; + + /* MAX34417 @12 */ + /* MAX34417 @14 */ + /* MAX34417 @16 */ + /* MAX34417 @18 */ + /* MAX34417 @1a */ + + status =3D "okay"; +}; + +&i2c9 { + clock-frequency =3D <400000>; + + // NFC @28, commercial devices only + + status =3D "okay"; +}; + +&lpass_tlmm { + spkr_01_sd_n_active: spkr-01-sd-n-active-state { + pins =3D "gpio12"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + output-low; + }; +}; + +&lpass_vamacro { + qcom,dmic-sample-rate =3D <4800000>; + + vdd-micb-supply =3D <&vreg_l1b_1p8>; + + pinctrl-0 =3D <&dmic01_default>; + pinctrl-names =3D "default"; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp0 { + status =3D "okay"; +}; + +&mdss_dp0_out { + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp1 { + status =3D "okay"; +}; + +&mdss_dp1_out { + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp3 { + /delete-property/ #sound-dai-cells; + + pinctrl-0 =3D <&edp0_hpd_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; + + aux-bus { + panel: panel { + compatible =3D "edp-panel"; + + backlight =3D <&backlight>; + + power-supply =3D <&vreg_edp_3p3>; + + port { + edp_panel_in: endpoint { + remote-endpoint =3D <&mdss_dp3_out>; + }; + }; + }; + }; + + ports { + port@1 { + reg =3D <1>; + + mdss_dp3_out: endpoint { + data-lanes =3D <0 1 2 3>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000= 00000>; + + remote-endpoint =3D <&edp_panel_in>; + }; + }; + }; +}; + +&mdss_dp3_phy { + vdda-phy-supply =3D <&vreg_l3j_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&pcie4 { + pinctrl-0 =3D <&pcie4_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie4_phy { + vdda-phy-supply =3D <&vreg_l3i_0p8>; + vdda-pll-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&pcie4_port0 { + reset-gpios =3D <&tlmm 146 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 148 GPIO_ACTIVE_LOW>; + + wifi@0 { + compatible =3D "pci17cb,1107"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + vddpcie0p9-supply =3D <&vreg_pmu_pcie_0p9>; + vddpcie1p8-supply =3D <&vreg_pmu_pcie_1p8>; + }; +}; + +&pm8550_gpios { + vol_up_n_default: vol-up-n-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; + bias-pull-up; + input-enable; + }; + + vol_down_n_default: vol-down-n-state { + pins =3D "gpio6"; + function =3D "normal"; + power-source =3D <1>; + bias-pull-up; + input-enable; + }; +}; + +&pmk8550_pwm { + status =3D "okay"; +}; + +&qupv3_0 { + status =3D "okay"; +}; + +&qupv3_1 { + status =3D "okay"; +}; + +&qupv3_2 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/x1p42100/Microsoft/Surface12/qcadsp8380.mbn", + "qcom/x1p42100/Microsoft/Surface12/adsp_dtbs.elf"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/x1p42100/Microsoft/Surface12/qccdsp8380.mbn", + "qcom/x1p42100/Microsoft/Surface12/cdsp_dtbs.elf"; + + status =3D "okay"; +}; + +&smb2360_0 { + status =3D "okay"; +}; + +&smb2360_0_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l2b_3p0>; +}; + +&smb2360_1 { + status =3D "okay"; +}; + +&smb2360_1_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l14b_3p0>; +}; + +&swr0 { + pinctrl-0 =3D <&wsa_swr_active>, <&spkr_01_sd_n_active>; + pinctrl-names =3D "default"; + + status =3D "okay"; + + /* WSA8845, Left speaker */ + left_spkr: speaker@0,0 { + compatible =3D "sdw20217020400"; + reg =3D <0 0>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SpkrLeft"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <1 2 3 7 10 13>; + }; + + /* WSA8845, Right speaker */ + right_spkr: speaker@0,1 { + compatible =3D "sdw20217020400"; + reg =3D <0 1>; + reset-gpios =3D <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; + #sound-dai-cells =3D <0>; + sound-name-prefix =3D "SpkrRight"; + vdd-1p8-supply =3D <&vreg_l15b_1p8>; + vdd-io-supply =3D <&vreg_l12b_1p2>; + qcom,port-mapping =3D <4 5 6 7 11 13>; + }; +}; + +&tlmm { + gpio-reserved-ranges =3D <34 2>, /* Unused */ + <44 4>; /* SPI (TPM) */ + + edp_reg_en: edp-reg-en-state { + pins =3D "gpio70"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + hall_int_n_default: hall-int-n-state { + pins =3D "gpio2"; + function =3D "gpio"; + bias-disable; + }; + + panel_en: panel-en-state { + pins =3D "gpio29"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins =3D "gpio147"; + function =3D "pcie4_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio146"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio148"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + ssam_state: ssam-state-state { + pins =3D "gpio91"; + function =3D "gpio"; + bias-disable; + }; + + ts0_default: ts0-default-state { + int-n-pins { + pins =3D "gpio38"; + function =3D "gpio"; + bias-disable; + }; + + reset-n-pins { + pins =3D "gpio48"; + function =3D "gpio"; + output-high; + drive-strength =3D <16>; + }; + }; + + wcn_sw_en: wcn-sw-en-state { + pins =3D "gpio214"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wcn_wlan_bt_en: wcn-wlan-bt-en-state { + pins =3D "gpio116", "gpio117"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb_1_ss0_sbu_default: usb-1-ss0-sbu-state { + oe-n-pins { + pins =3D "gpio168"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + + sel-pins { + pins =3D "gpio167"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + + }; + + usb_1_ss1_sbu_default: usb-1-ss1-sbu-state { + oe-n-pins { + pins =3D "gpio179"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + + sel-pins { + pins =3D "gpio178"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + }; +}; + +&uart2 { + status =3D "okay"; + + embedded-controller { + compatible =3D "microsoft,surface-sam"; + + interrupts-extended =3D <&tlmm 91 IRQ_TYPE_EDGE_RISING>; + + current-speed =3D <4000000>; + + pinctrl-0 =3D <&ssam_state>; + pinctrl-names =3D "default"; + }; +}; + +&uart14 { + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn7850-bt"; + max-speed =3D <3200000>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + }; +}; + +&ufs_mem_hc { + vcc-supply =3D <&vreg_l17b_2p5>; + vcc-max-microamp =3D <800000>; + vccq-supply =3D <&vreg_l2i_1p2>; + vccq-max-microamp =3D <900000>; + + vdd-hba-supply =3D <&vreg_l3j_0p8>; + + status =3D "okay"; +}; + +&ufs_mem_phy { + status =3D "okay"; + + vdda-phy-supply =3D <&vreg_l3i_0p8>; + vdda-pll-supply =3D <&vreg_l3e_1p2>; +}; + +&usb_1_ss0_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + phys =3D <&smb2360_0_eusb2_repeater>; + + status =3D "okay"; +}; + +&usb_1_ss0_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l1j_0p8>; + + status =3D "okay"; +}; + +&usb_1_ss0 { + dr_mode =3D "host"; + + status =3D "okay"; +}; + +&usb_1_ss0_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss0_hs_in>; +}; + +&usb_1_ss0_qmpphy_out { + remote-endpoint =3D <&pmic_glink_ss0_ss_in>; +}; + +&usb_1_ss1_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + phys =3D <&smb2360_1_eusb2_repeater>; + + status =3D "okay"; +}; + +&usb_1_ss1_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_1_ss1 { + dr_mode =3D "host"; + + status =3D "okay"; +}; + +&usb_1_ss1_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss1_hs_in>; +}; + +&usb_1_ss1_qmpphy_out { + remote-endpoint =3D <&pmic_glink_ss1_ss_in>; +}; --=20 2.53.0