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Sun, 10 May 2026 14:23:11 -0700 From: Nicolin Chen To: , , , CC: , , , , , , , , , , Subject: [PATCH v5 1/6] iommu/arm-smmu-v3: Add arm_smmu_kdump_adopt_strtab() for kdump Date: Sun, 10 May 2026 14:23:00 -0700 Message-ID: <0582326eeadd4ae2b16fd4914e9bd46da5a251d3.1778416609.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0002256E:EE_|SJ2PR12MB9085:EE_ X-MS-Office365-Filtering-Correlation-Id: 63c3449c-85e4-4252-5312-08deaeda5c8c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|36860700016|1800799024|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: xRhzaM7uwg7QM19Fmv2NWxck1APGp28PMe/vPpO/Vit55B7mzNHMuznR6yeIf7MI5v3LMJwDAWZLvAL+HQuQULL1o3sGWqRmujHv796mCWVuSo5f9ukThOFwNtrrawntgj+pfYa2WPCWhbriPvstRzo0RNJOq6jaIvGlU1/t6bCRId2P6OPkByP7GPf4zR+A9HOsvX3nGy7s8mfYPLBFS82n7QpKQnvfFXwTYcOeG01iZAGrDqEKfBcBvhaLDP7BtU+tvZMKMTbs9sIWUdqECYof7m2x8yjB5L/kvMKdXFuAoju5jRVQuRh9F8ky46qCVHE+A0GKIFYH8Of+ruf8YuOGKj3KIi4BhDxTVlbbI3uEAWze7rxwNIvmQ8cSBXLww8du1ZNZjda0h5D1qv02sFAKyB3R67Yj8ks9puqi3hG8MASX2PR0RukXiKEJfgt+10B6Va1Raal7KQa6OLRwBN0HQ3V1f3OHUqBZKvqx79B0gVg9q11M1KzTzwyIxbJQgRIIOC8tH4CZShXS866vs1et9v+Hssyw+aTpoH4ZLUxldXvevYZr8nDDiXdUOLQfSbyFh4TYvkJahbibETt7R1OyhSUupOF02mVZN4cLGhdEcCvAIywYzJxneppeuIH+IexWo+WRshyEJZKDaWnbOn9UXAH0Zb1Uby6WAi2NJH+rlggoc5CKlB7RO0YySKkWAzEOcYIrbk2lxJkFCNJBETX8g5am+n/4MHYr7gPPtSg= X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(376014)(7416014)(36860700016)(1800799024)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; 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charset="utf-8" When transitioning to a kdump kernel, the primary kernel might have crashed while endpoint devices were actively bus-mastering DMA. Currently, the SMMU driver aggressively resets the hardware during probe by clearing CR0_SMMUEN and setting the Global Bypass Attribute (GBPA) to ABORT. In a kdump scenario, this aggressive reset is highly destructive: a) If GBPA is set to ABORT, in-flight DMA will be aborted, generating fatal PCIe AER or SErrors that may panic the kdump kernel b) If GBPA is set to BYPASS, in-flight DMA targeting some IOVAs will bypass the SMMU and corrupt the physical memory at those 1:1 mapped IOVAs. To safely absorb in-flight DMAs, a kdump kernel will have to leave SMMUEN= =3D1 intact and avoid modifying STRTAB_BASE, allowing HW to continue translating in-flight DMAs reusing the crashed kernel's page tables until the endpoint device drivers probe and quiesce their respective hardware. However, the ARM SMMUv3 architecture specification states that updating the SMMU_STRTAB_BASE register while SMMUEN =3D=3D 1 is UNPREDICTABLE or ignored. This leaves a kdump kernel no choice but to adopt the stream table from the crashed kernel. Introduce ARM_SMMU_OPT_KDUMP_ADOPT and adopt functions memremapping all the stream tables extracted from STRTAB_BASE and STRTAB_BASE_CFG. Note that the adoption of the crashed kernel's stream table follows certain strict rules, since the old stream table might be compromised. Thus, apply a series of validations against the values read from the registers. If any address or size doesn't pass the test, it means the stream table cannot be trusted, so toss it entirely. To avoid OOM due to a deeply corrupted stream table, the memremap for l2 tables is done on the kdump kernel's demand. The new option will be set in a following change. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 305 +++++++++++++++++++- 2 files changed, 303 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index ef42df4753ec4..cd60b692c3901 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -861,6 +861,7 @@ struct arm_smmu_device { #define ARM_SMMU_OPT_MSIPOLL (1 << 2) #define ARM_SMMU_OPT_CMDQ_FORCE_SYNC (1 << 3) #define ARM_SMMU_OPT_TEGRA241_CMDQV (1 << 4) +#define ARM_SMMU_OPT_KDUMP_ADOPT (1 << 5) u32 options; =20 struct arm_smmu_cmdq cmdq; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index e8d7dbe495f03..bab60e4b91716 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -2040,16 +2041,111 @@ static void arm_smmu_init_initial_stes(struct arm_= smmu_ste *strtab, } } =20 +/* + * Adopting the crashed kernel's stream table has risks: the physical addr= esses + * read from ARM_SMMU_STRTAB_BASE / L1 descriptors may be corrupted. Rejec= t any + * range that overlaps the kdump kernel's critical regions. + */ +static bool arm_smmu_kdump_phys_is_corrupted(phys_addr_t base, size_t size) +{ + /* + * On arm64 kdump, iomem_resource entries are typically: + * ------------------------------------------------------------ + * | Entry | IORESOURCE_ Flags | IORES_DESC_ Desc | + * ------------------------------------------------------------ + * | System RAM | MEM + BUSY + SYSRAM | NONE | + * | MMIO regions | MEM + BUSY | NONE | + * | Reserved memory | MEM | NONE | + * ------------------------------------------------------------ + * + * Test and reject any overlap with MEM + BUSY, covering/excluding: + * + System RAM: silent corruption of kdump kernel's own memory + * + MMIO regions: fatal SError on cacheable speculative access + * - Reserved memory: crashed kernel's stream table might reside + */ + if (region_intersects(base, size, IORESOURCE_MEM | IORESOURCE_BUSY, + IORES_DESC_NONE) !=3D REGION_DISJOINT) + return true; + + /* + * Note: physical holes are absent from iomem_resource, so a corrupted + * address pointing into one will not be caught here. Closing that gap + * requires a firmware memory map and is left as a future improvement. + */ + return false; +} + +static int arm_smmu_kdump_adopt_l2_strtab(struct arm_smmu_device *smmu, u3= 2 sid, + u32 l1_idx, u64 l2_dma, u32 span, + struct arm_smmu_strtab_l2 **l2table) +{ + phys_addr_t base =3D dma_to_phys(smmu->dev, l2_dma); + struct arm_smmu_strtab_l2 *table; + size_t size; + + /* + * Only a coherent SMMU is supported at this moment. For a non-coherent + * SMMU that wants to support ARM_SMMU_OPT_KDUMP_ADOPT, try MEMREMAP_WC. + */ + if (WARN_ON(!(smmu->features & ARM_SMMU_FEAT_COHERENCY))) + return -EOPNOTSUPP; + + /* + * Retest the memremap inputs in case the L1 descriptor was overwritten + * since adopt. Reject this master's insert; panic or SMMU-disable would + * either lose the vmcore or cascade aborts. Do not try to fix it, as it + * would break all other SIDs in the same bus (PCI case). The corruption + * blast radius is already bounded to that bus range. + */ + if (span !=3D STRTAB_SPLIT + 1) { + dev_err(smmu->dev, + "kdump: L1[%u] span %u changed since adopt (was %u)\n", + l1_idx, span, STRTAB_SPLIT + 1); + return -EINVAL; + } + + size =3D (1UL << (span - 1)) * sizeof(struct arm_smmu_ste); + if (arm_smmu_kdump_phys_is_corrupted(base, size)) { + dev_err(smmu->dev, + "kdump: L1[%u] now points at a corrupt range\n", + l1_idx); + return -EINVAL; + } + + table =3D devm_memremap(smmu->dev, base, size, MEMREMAP_WB); + if (IS_ERR(table)) { + dev_err(smmu->dev, + "kdump: failed to adopt l2 stream table for SID %u\n", + sid); + return PTR_ERR(table); + } + + *l2table =3D table; + return 0; +} + static int arm_smmu_init_l2_strtab(struct arm_smmu_device *smmu, u32 sid) { dma_addr_t l2ptr_dma; struct arm_smmu_strtab_cfg *cfg =3D &smmu->strtab_cfg; struct arm_smmu_strtab_l2 **l2table; + u32 l1_idx =3D arm_smmu_strtab_l1_idx(sid); =20 - l2table =3D &cfg->l2.l2ptrs[arm_smmu_strtab_l1_idx(sid)]; + l2table =3D &cfg->l2.l2ptrs[l1_idx]; if (*l2table) return 0; =20 + /* Deferred adoption of the crashed kernel's L2 table */ + if (smmu->options & ARM_SMMU_OPT_KDUMP_ADOPT) { + u64 l2ptr =3D le64_to_cpu(cfg->l2.l1tab[l1_idx].l2ptr); + dma_addr_t l2_dma =3D l2ptr & STRTAB_L1_DESC_L2PTR_MASK; + u32 span =3D FIELD_GET(STRTAB_L1_DESC_SPAN, l2ptr); + + if (span && l2_dma) + return arm_smmu_kdump_adopt_l2_strtab( + smmu, sid, l1_idx, l2_dma, span, l2table); + } + *l2table =3D dmam_alloc_coherent(smmu->dev, sizeof(**l2table), &l2ptr_dma, GFP_KERNEL); if (!*l2table) { @@ -2061,8 +2157,7 @@ static int arm_smmu_init_l2_strtab(struct arm_smmu_de= vice *smmu, u32 sid) =20 arm_smmu_init_initial_stes((*l2table)->stes, ARRAY_SIZE((*l2table)->stes)); - arm_smmu_write_strtab_l1_desc(&cfg->l2.l1tab[arm_smmu_strtab_l1_idx(sid)], - l2ptr_dma); + arm_smmu_write_strtab_l1_desc(&cfg->l2.l1tab[l1_idx], l2ptr_dma); return 0; } =20 @@ -4556,10 +4651,213 @@ static int arm_smmu_init_strtab_linear(struct arm_= smmu_device *smmu) return 0; } =20 +static int arm_smmu_kdump_adopt_strtab_2lvl(struct arm_smmu_device *smmu, + u32 cfg_reg, dma_addr_t dma) +{ + u32 log2size =3D FIELD_GET(STRTAB_BASE_CFG_LOG2SIZE, cfg_reg); + u32 split =3D FIELD_GET(STRTAB_BASE_CFG_SPLIT, cfg_reg); + struct arm_smmu_strtab_cfg *cfg =3D &smmu->strtab_cfg; + phys_addr_t base; + u32 num_l1_ents; + size_t size; + int i; + + /* + * Only a coherent SMMU is supported at this moment. For a non-coherent + * SMMU that wants to support ARM_SMMU_OPT_KDUMP_ADOPT, try MEMREMAP_WC. + */ + if (WARN_ON(!(smmu->features & ARM_SMMU_FEAT_COHERENCY))) + return -EOPNOTSUPP; + + if (log2size < split || log2size > smmu->sid_bits) { + dev_err(smmu->dev, "kdump: log2size %u out of range [%u, %u]\n", + log2size, split, smmu->sid_bits); + return -EINVAL; + } + if (split !=3D STRTAB_SPLIT) { + dev_err(smmu->dev, + "kdump: unsupported STRTAB_SPLIT %u (expected %u)\n", + split, STRTAB_SPLIT); + return -EINVAL; + } + + num_l1_ents =3D 1U << (log2size - split); + if (num_l1_ents > STRTAB_MAX_L1_ENTRIES) { + dev_err(smmu->dev, "kdump: l1 entries %u exceeds max %u\n", + num_l1_ents, STRTAB_MAX_L1_ENTRIES); + return -EINVAL; + } + + cfg->l2.l1_dma =3D dma; + cfg->l2.num_l1_ents =3D num_l1_ents; + + base =3D dma_to_phys(smmu->dev, dma); + size =3D num_l1_ents * sizeof(struct arm_smmu_strtab_l1); + if (arm_smmu_kdump_phys_is_corrupted(base, size)) { + dev_err(smmu->dev, "kdump: l1 stream table is corrupted\n"); + return -EINVAL; + } + + cfg->l2.l1tab =3D devm_memremap(smmu->dev, base, size, MEMREMAP_WB); + if (IS_ERR(cfg->l2.l1tab)) + return PTR_ERR(cfg->l2.l1tab); + + cfg->l2.l2ptrs =3D devm_kcalloc(smmu->dev, num_l1_ents, + sizeof(*cfg->l2.l2ptrs), GFP_KERNEL); + if (!cfg->l2.l2ptrs) + return -ENOMEM; + + for (i =3D 0; i < num_l1_ents; i++) { + u64 l2ptr =3D le64_to_cpu(cfg->l2.l1tab[i].l2ptr); + dma_addr_t l2_dma =3D l2ptr & STRTAB_L1_DESC_L2PTR_MASK; + u32 span =3D FIELD_GET(STRTAB_L1_DESC_SPAN, l2ptr); + + if (!span || !l2_dma) + continue; + + if (span !=3D STRTAB_SPLIT + 1) { + dev_err(smmu->dev, + "kdump: L1[%u] unsupported span %u (vs %u)\n", + i, span, STRTAB_SPLIT + 1); + return -EINVAL; + } + + base =3D dma_to_phys(smmu->dev, l2_dma); + size =3D (1UL << (span - 1)) * sizeof(struct arm_smmu_ste); + if (arm_smmu_kdump_phys_is_corrupted(base, size)) { + dev_err(smmu->dev, + "kdump: l2 stream table is corrupted\n"); + return -EINVAL; + } + + /* + * If the crashed kernel's l1 descriptors are deeply corrupted, + * blindly memremapping every l2 table here could lead to OOM. + * + * Defer the l2 memremap to arm_smmu_init_l2_strtab(), so peak + * memory is bounded by the kdump kernel's actual demand. + */ + } + + return 0; +} + +static int arm_smmu_kdump_adopt_strtab_linear(struct arm_smmu_device *smmu, + u32 cfg_reg, dma_addr_t dma) +{ + u32 log2size =3D FIELD_GET(STRTAB_BASE_CFG_LOG2SIZE, cfg_reg); + struct arm_smmu_strtab_cfg *cfg =3D &smmu->strtab_cfg; + unsigned int max_log2size; + phys_addr_t base; + size_t size; + + /* + * Only a coherent SMMU is supported at this moment. For a non-coherent + * SMMU that wants to support ARM_SMMU_OPT_KDUMP_ADOPT, try MEMREMAP_WC. + */ + if (WARN_ON(!(smmu->features & ARM_SMMU_FEAT_COHERENCY))) + return -EOPNOTSUPP; + + /* Cap the size at what the kdump kernel itself would have allocated */ + if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) + max_log2size =3D + ilog2(STRTAB_MAX_L1_ENTRIES * STRTAB_NUM_L2_STES); + else + max_log2size =3D smmu->sid_bits; + + /* cfg->linear.num_ents is unsigned int, so cap log2size at 31 */ + max_log2size =3D min(max_log2size, 31U); + if (log2size > max_log2size) { + dev_err(smmu->dev, "kdump: unsupported log2size %u (> %u)\n", + log2size, max_log2size); + return -EINVAL; + } + + /* + * We might end up with a num_ents !=3D sid_bits, which is fine. In the + * ARM_SMMU_OPT_KDUMP_ADOPT case, arm_smmu_write_strtab() is bypassed. + */ + cfg->linear.num_ents =3D 1U << log2size; + cfg->linear.ste_dma =3D dma; + + base =3D dma_to_phys(smmu->dev, dma); + size =3D cfg->linear.num_ents * sizeof(struct arm_smmu_ste); + if (arm_smmu_kdump_phys_is_corrupted(base, size)) { + dev_err(smmu->dev, "kdump: stream table is corrupted\n"); + return -EINVAL; + } + + cfg->linear.table =3D devm_memremap(smmu->dev, base, size, MEMREMAP_WB); + if (IS_ERR(cfg->linear.table)) + return PTR_ERR(cfg->linear.table); + return 0; +} + +static void arm_smmu_kdump_adopt_cleanup(struct arm_smmu_device *smmu, u32= fmt) +{ + struct arm_smmu_strtab_cfg *cfg =3D &smmu->strtab_cfg; + + if (fmt =3D=3D STRTAB_BASE_CFG_FMT_2LVL) { + if (cfg->l2.l2ptrs) + devm_kfree(smmu->dev, cfg->l2.l2ptrs); + if (!IS_ERR_OR_NULL(cfg->l2.l1tab)) + devm_memunmap(smmu->dev, cfg->l2.l1tab); + } else if (fmt =3D=3D STRTAB_BASE_CFG_FMT_LINEAR) { + if (!IS_ERR_OR_NULL(cfg->linear.table)) + devm_memunmap(smmu->dev, cfg->linear.table); + } +} + +static int arm_smmu_kdump_adopt_strtab(struct arm_smmu_device *smmu) +{ + u32 cfg_reg =3D readl_relaxed(smmu->base + ARM_SMMU_STRTAB_BASE_CFG); + u64 base_reg =3D readq_relaxed(smmu->base + ARM_SMMU_STRTAB_BASE); + u32 fmt =3D FIELD_GET(STRTAB_BASE_CFG_FMT, cfg_reg); + dma_addr_t dma =3D base_reg & STRTAB_BASE_ADDR_MASK; + int ret; + + dev_info(smmu->dev, "kdump: adopting crashed kernel's stream table\n"); + + if (fmt =3D=3D STRTAB_BASE_CFG_FMT_2LVL) { + /* + * Both kernels run on the same hardware, so it's impossible for + * kdump kernel to see the support for linear stream table only. + */ + if (WARN_ON(!(smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB))) + ret =3D -EINVAL; + else + ret =3D arm_smmu_kdump_adopt_strtab_2lvl(smmu, cfg_reg, + dma); + } else if (fmt =3D=3D STRTAB_BASE_CFG_FMT_LINEAR) { + /* + * In case that the old kernel for some reason used the linear + * format, enforce the same format to match the adopted table. + */ + ret =3D arm_smmu_kdump_adopt_strtab_linear(smmu, cfg_reg, dma); + if (!ret) + smmu->features &=3D ~ARM_SMMU_FEAT_2_LVL_STRTAB; + } else { + dev_err(smmu->dev, "kdump: invalid STRTAB format %u\n", fmt); + ret =3D -EINVAL; + } + + if (ret) { + dev_warn(smmu->dev, "kdump: falling back to full reset\n"); + arm_smmu_kdump_adopt_cleanup(smmu, fmt); + smmu->options &=3D ~ARM_SMMU_OPT_KDUMP_ADOPT; + memset(&smmu->strtab_cfg, 0, sizeof(smmu->strtab_cfg)); + } + return ret; +} + static int arm_smmu_init_strtab(struct arm_smmu_device *smmu) { int ret; =20 + if ((smmu->options & ARM_SMMU_OPT_KDUMP_ADOPT) && + !arm_smmu_kdump_adopt_strtab(smmu)) + goto out; + if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) ret =3D arm_smmu_init_strtab_2lvl(smmu); else @@ -4567,6 +4865,7 @@ static int arm_smmu_init_strtab(struct arm_smmu_devic= e *smmu) if (ret) return ret; =20 +out: ida_init(&smmu->vmid_map); =20 return 0; --=20 2.43.0 From nobody Sat Jun 13 04:17:34 2026 Received: from BN8PR05CU002.outbound.protection.outlook.com (mail-eastus2azon11011041.outbound.protection.outlook.com [52.101.57.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB7D733F8C2; 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charset="utf-8" Though the kdump kernel adopts the crashed kernel's stream table, the iommu core will still try to attach each probed device to a default domain, which overwrites the adopted STE and breaks in-flight DMA from that device. Implement an is_attach_deferred() callback to prevent this. For each device that has STE.V=3D1 and STE.Cfg!=3DAbort in the adopted table, defer the def= ault domain attachment, until the device driver explicitly requests it. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Signed-off-by: Nicolin Chen Reviewed-by: Kevin Tian Reviewed-by: Jason Gunthorpe --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 24 +++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index bab60e4b91716..579c8af82d6b6 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -4310,6 +4310,29 @@ static void arm_smmu_remove_master(struct arm_smmu_m= aster *master) kfree(master->build_invs); } =20 +static bool arm_smmu_is_attach_deferred(struct device *dev) +{ + struct arm_smmu_master *master =3D dev_iommu_priv_get(dev); + struct arm_smmu_device *smmu =3D master->smmu; + int i; + + if (!(smmu->options & ARM_SMMU_OPT_KDUMP_ADOPT)) + return false; + + for (i =3D 0; i < master->num_streams; i++) { + struct arm_smmu_ste *ste =3D + arm_smmu_get_step_for_sid(smmu, master->streams[i].id); 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charset="utf-8" In kdump cases, the crashed kernel's CDs and page tables can be corrupted, which could trigger event spamming. Also, we cannot serve page requests. Skip the IRQ setup for EVTQ/PRIQ in arm_smmu_setup_irqs(), and guard the thread functions against being entered via a combined-IRQ delivery while the queue is disabled. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 23 +++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 579c8af82d6b6..ebb0826d74541 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2364,6 +2364,14 @@ static irqreturn_t arm_smmu_evtq_thread(int irq, voi= d *dev) static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST); =20 + /* + * A combined IRQ might call into this function with the queue disabled. + * E.g. kdump, where stale HW PROD vs SW CONS would drive a bogus drain + * and a CONS write to a disabled queue. + */ + if (!(readl_relaxed(smmu->base + ARM_SMMU_CR0) & CR0_EVTQEN)) + return IRQ_NONE; + do { while (!queue_remove_raw(q, evt)) { arm_smmu_decode_event(smmu, evt, &event); @@ -2432,6 +2440,14 @@ static irqreturn_t arm_smmu_priq_thread(int irq, voi= d *dev) struct arm_smmu_ll_queue *llq =3D &q->llq; u64 evt[PRIQ_ENT_DWORDS]; =20 + /* + * A combined IRQ might call into this function with the queue disabled. + * E.g. kdump, where stale HW PROD vs SW CONS would drive a bogus drain + * and a CONS write to a disabled queue. + */ + if (!(readl_relaxed(smmu->base + ARM_SMMU_CR0) & CR0_PRIQEN)) + return IRQ_NONE; + do { while (!queue_remove_raw(q, evt)) arm_smmu_handle_ppr(smmu, evt); @@ -5056,7 +5072,10 @@ static void arm_smmu_setup_unique_irqs(struct arm_sm= mu_device *smmu) static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu) { int ret, irq; - u32 irqen_flags =3D IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; + u32 irqen_flags =3D IRQ_CTRL_GERROR_IRQEN; + + if (!is_kdump_kernel()) + irqen_flags |=3D IRQ_CTRL_EVTQ_IRQEN; =20 /* Disable IRQs first */ ret =3D arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, @@ -5082,7 +5101,7 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device= *smmu) } else arm_smmu_setup_unique_irqs(smmu); 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charset="utf-8" In kdump cases, the crashed kernel's CDs and page tables can be corrupted, which could trigger event spamming. Also, we cannot serve page requests. Skip the EVTQ/PRIQ setup entirely rather than enabling then disabling them. Also add some inline comments explaining that. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Suggested-by: Kevin Tian Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen Reviewed-by: Jason Gunthorpe --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 43 +++++++++++++-------- 1 file changed, 27 insertions(+), 16 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index ebb0826d74541..b7298218bac9a 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -5211,21 +5211,35 @@ static int arm_smmu_device_reset(struct arm_smmu_de= vice *smmu) cmd.opcode =3D CMDQ_OP_TLBI_NSNH_ALL; arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); =20 - /* Event queue */ - writeq_relaxed(smmu->evtq.q.q_base, smmu->base + ARM_SMMU_EVTQ_BASE); - writel_relaxed(smmu->evtq.q.llq.prod, smmu->page1 + ARM_SMMU_EVTQ_PROD); - writel_relaxed(smmu->evtq.q.llq.cons, smmu->page1 + ARM_SMMU_EVTQ_CONS); - - enables |=3D CR0_EVTQEN; - ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, - ARM_SMMU_CR0ACK); - if (ret) { - dev_err(smmu->dev, "failed to enable event queue\n"); - return ret; + /* + * Event queue + * + * Do not enable in a kdump case, as the crashed kernel's CDs and page + * tables might be corrupted, triggering event spamming. + */ + if (!is_kdump_kernel()) { + writeq_relaxed(smmu->evtq.q.q_base, + smmu->base + ARM_SMMU_EVTQ_BASE); + writel_relaxed(smmu->evtq.q.llq.prod, + smmu->page1 + ARM_SMMU_EVTQ_PROD); + writel_relaxed(smmu->evtq.q.llq.cons, + smmu->page1 + ARM_SMMU_EVTQ_CONS); + + enables |=3D CR0_EVTQEN; + ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, + ARM_SMMU_CR0ACK); + if (ret) { + dev_err(smmu->dev, "failed to enable event queue\n"); + return ret; + } } =20 - /* PRI queue */ - if (smmu->features & ARM_SMMU_FEAT_PRI) { + /* + * PRI queue + * + * Do not enable in a kdump case, as we cannot serve page requests. + */ + if (!is_kdump_kernel() && (smmu->features & ARM_SMMU_FEAT_PRI)) { writeq_relaxed(smmu->priq.q.q_base, smmu->base + ARM_SMMU_PRIQ_BASE); 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charset="utf-8" When ARM_SMMU_OPT_KDUMP_ADOPT is detected, do not disable SMMUEN and skip the CR1/CR2/STRTAB_BASE update sequence in arm_smmu_device_reset(). Those register writes are all CONSTRAINED UNPREDICTABLE while CR0_SMMUEN=3D=3D1, = so leaving them intact lets in-flight DMAs continue to be translated by the adopted stream table. Initialize 'enables' to 0 so it can carry CR0_SMMUEN in kdump case. Then, preserve that when enabling the command queue. Clear latched gerror bits if necessary. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Signed-off-by: Nicolin Chen Reviewed-by: Kevin Tian --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 47 +++++++++++++++++++-- 1 file changed, 44 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index b7298218bac9a..bb8cc580e7ad8 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -5151,11 +5151,28 @@ static void arm_smmu_write_strtab(struct arm_smmu_d= evice *smmu) static int arm_smmu_device_reset(struct arm_smmu_device *smmu) { int ret; - u32 reg, enables; + u32 reg, enables =3D 0; struct arm_smmu_cmdq_ent cmd; =20 - /* Clear CR0 and sync (disables SMMU and queue processing) */ reg =3D readl_relaxed(smmu->base + ARM_SMMU_CR0); + + /* + * In a kdump case (set when CR0_SMMUEN=3D1 and !GERROR_SFM_ERR), retain + * CR0_SMMUEN to avoid aborting in-flight DMA, and CR0_ATSCHK to carry + * on the ATS-check policy. + * + * According to spec, updating STRTAB_BASE/CR1/CR2 when CR0_SMMUEN=3D1 is + * CONSTRAINED UNPREDICTABLE. So, skip those register updates and rely + * on the adopted stream table from the crashed kernel. + */ + if (smmu->options & ARM_SMMU_OPT_KDUMP_ADOPT) { + dev_info(smmu->dev, + "kdump: retaining SMMUEN for in-flight DMA\n"); + enables =3D reg & (CR0_SMMUEN | CR0_ATSCHK); + goto reset_queues; + } + + /* Clear CR0 and sync (disables SMMU and queue processing) */ if (reg & CR0_SMMUEN) { dev_warn(smmu->dev, "SMMU currently enabled! Resetting...\n"); arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); @@ -5185,12 +5202,36 @@ static int arm_smmu_device_reset(struct arm_smmu_de= vice *smmu) /* Stream table */ arm_smmu_write_strtab(smmu); =20 +reset_queues: + if (smmu->options & ARM_SMMU_OPT_KDUMP_ADOPT) { + /* Disable queues since arm_smmu_device_disable() was skipped */ + ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, + ARM_SMMU_CR0ACK); + if (ret) { + dev_err(smmu->dev, "failed to disable queues\n"); + return ret; + } + } + + /* + * GERROR bits are latched. Read after queue disabling so that unhandled + * errors would be visible. Ack everything prior to re-enabling the CMDQ + * as a stale CMDQ_ERR would halt the CMDQ and new command will timeout. + */ + if (is_kdump_kernel()) { + u32 gerror =3D readl_relaxed(smmu->base + ARM_SMMU_GERROR); + u32 gerrorn =3D readl_relaxed(smmu->base + ARM_SMMU_GERRORN); + + if ((gerror ^ gerrorn) & GERROR_ERR_MASK) + writel(gerror, smmu->base + ARM_SMMU_GERRORN); + } + /* Command queue */ writeq_relaxed(smmu->cmdq.q.q_base, smmu->base + ARM_SMMU_CMDQ_BASE); writel_relaxed(smmu->cmdq.q.llq.prod, smmu->base + ARM_SMMU_CMDQ_PROD); writel_relaxed(smmu->cmdq.q.llq.cons, smmu->base + ARM_SMMU_CMDQ_CONS); =20 - enables =3D CR0_CMDQEN; + enables |=3D CR0_CMDQEN; ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, ARM_SMMU_CR0ACK); if (ret) { --=20 2.43.0 From nobody Sat Jun 13 04:17:34 2026 Received: from SJ2PR03CU001.outbound.protection.outlook.com (mail-westusazon11012025.outbound.protection.outlook.com [52.101.43.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 16EB7344D9D; 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charset="utf-8" arm_smmu_device_hw_probe() runs before arm_smmu_init_structures(), so it's natural to decide whether the kdump kernel must adopt the crashed kernel's stream table. Given that memremap is used to adopt the old stream table, set this option only on a coherent SMMU. And make sure SMMU isn't in Service Failure Mode. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen Reviewed-by: Jason Gunthorpe --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 31 +++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index bb8cc580e7ad8..310f9cf7e5577 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -5403,6 +5403,33 @@ static void arm_smmu_get_httu(struct arm_smmu_device= *smmu, u32 reg) hw_features, fw_features); } =20 +static void arm_smmu_device_hw_probe_kdump(struct arm_smmu_device *smmu) +{ + u32 gerror, gerrorn, active; + + /* No adoption if SMMU is disabled (i.e., there is no in-flight DMA) */ + if (!(readl_relaxed(smmu->base + ARM_SMMU_CR0) & CR0_SMMUEN)) + return; + + /* For now, only support a coherent SMMU that works with MEMREMAP_WB */ + if (!(smmu->features & ARM_SMMU_FEAT_COHERENCY)) { + dev_warn(smmu->dev, + "kdump: non-coherent SMMU unsupported; reset to block all DMAs\n"); + return; + } + + gerror =3D readl_relaxed(smmu->base + ARM_SMMU_GERROR); + gerrorn =3D readl_relaxed(smmu->base + ARM_SMMU_GERRORN); + active =3D gerror ^ gerrorn; + if (active & GERROR_SFM_ERR) { + dev_warn(smmu->dev, + "kdump: SMMU in Service Failure Mode, must reset\n"); + return; + } + + smmu->options |=3D ARM_SMMU_OPT_KDUMP_ADOPT; +} + static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) { u32 reg; @@ -5617,6 +5644,10 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_= device *smmu) =20 dev_info(smmu->dev, "oas %lu-bit (features 0x%08x)\n", smmu->oas, smmu->features); + + if (is_kdump_kernel()) + arm_smmu_device_hw_probe_kdump(smmu); + return 0; } =20 --=20 2.43.0