From nobody Sat Jun 13 16:17:46 2026 Received: from mout01.posteo.de (mout01.posteo.de [185.67.36.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 882DB47DFA8 for ; Wed, 6 May 2026 14:01:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.67.36.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778076107; cv=none; b=rnjmoO0movclSl2db0wmicfmw5N6QTkVIlcrWDXoTeS3hzJnU3e/Abeui5ebpEyySrr7tqK5ajXaRiYXI555P8dLRhZumYXD/Cr2ZHPFqSA8w8NkGqbzhC3cFTbNSYWLwhaH49dO80G8Q/cQ8NMYjUZft3UKzDVK43vsoi/60Pk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778076107; c=relaxed/simple; bh=lk1VBo0o+aLvY+j3qdBBdcxFXZJYH9OhUBaUSFwVy7w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RHjiVZT6x7xE/1OIpoJiGAya2JQXUD7xrHbqTDxLAjRtgKM9oz8AAJGwDsoQsjH/Uqky4InhDJvXj1Dh7lSPOb1WdK9j/6gR/AAO4fFIwfwDzaV4UaBUSbsd3hbvNMWMbifklaFgyVRg7y8s9dCUPvtbIewONQ0oeujsN3FHDSw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=posteo.net; spf=pass smtp.mailfrom=posteo.net; dkim=pass (2048-bit key) header.d=posteo.net header.i=@posteo.net header.b=Acc0cTN5; arc=none smtp.client-ip=185.67.36.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=posteo.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=posteo.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=posteo.net header.i=@posteo.net header.b="Acc0cTN5" Received: from submission (posteo.de [185.67.36.169]) by mout01.posteo.de (Postfix) with ESMTPS id BF631241BB7 for ; Wed, 6 May 2026 16:01:42 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=posteo.net; s=2017; t=1778076102; bh=oMp6DQwjZrRVZf84lVyKrhPYtfUehN8xUFWuSE93QNc=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version: Content-Transfer-Encoding:From; b=Acc0cTN5Xb1GSfVUmpYhhKeCiIiC63Kp019JIhxwhkn1C7KMwvjBp2j5ByKxM1oor FoQTikzLsjiuljTnY78VgCE64ljiI7jPotVdejDPCRAe/qwAKN8ggUkDYWVjopqCHX ZMrM6ZNutdQvajFsKxezVpYp+Fk450Jwl5syEiO9Agwcf/Vqnlu2TwONpMGQXGLzpC lge2vS0OI4ejTY11tVXHivJRSM2n3s0KhvfeemQLx6HE+Whhh5oAAST7Tc49Gm+8qD FuE6ztByxdn9EnoDW31NE8rIqjhfaWxvmYJt75z2mGxoc23HXIdXEOfCihrocHraRm vnyF+w501F21g== Received: from customer (localhost [127.0.0.1]) by submission (posteo.de) with ESMTPSA id 4g9cW83Dfpz9rxL; Wed, 6 May 2026 16:01:40 +0200 (CEST) From: Mateusz Nowicki To: don.brace@microchip.com Cc: martin.petersen@oracle.com, James.Bottomley@HansenPartnership.com, storagedev@microchip.com, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, Mateusz Nowicki Subject: [PATCH 1/2] scsi: smartpqi: add pci_error_handlers for bus reset recovery Date: Wed, 06 May 2026 14:01:42 +0000 Message-ID: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The smartpqi driver does not register pci_error_handlers. When the PCI subsystem performs a bus reset (e.g. "echo 1 > /sys/bus/pci/devices/ /reset") on a controller without FLR support, the driver is not notified. Firmware reverts to SIS mode and drops admin and operational queue mappings while the driver still believes PQI is active; SCSI I/O hangs until reboot. Add .reset_prepare and .reset_done callbacks reusing the existing SIS -> PQI recovery helpers. reset_prepare: - pqi_wait_until_ofa_finished() - pqi_ofa_ctrl_quiesce() - clear controller_online and pqi_mode_enabled reset_done: - ssleep(PQI_POST_RESET_DELAY_SECS) - pqi_ofa_ctrl_unquiesce() - pqi_ctrl_init_resume() to drive SIS -> PQI, recreate queues, re-enable events and rescan - pqi_take_ctrl_offline() on failure No new helpers or exports. Tested on HPE SR932i-p Gen10+. Signed-off-by: Mateusz Nowicki Reviewed-by: Laurence Oberman Tested-by: Laurence Oberman --- drivers/scsi/smartpqi/smartpqi_init.c | 47 +++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/drivers/scsi/smartpqi/smartpqi_init.c b/drivers/scsi/smartpqi/= smartpqi_init.c index 2026ac645d6a..c4003d3cda7e 100644 --- a/drivers/scsi/smartpqi/smartpqi_init.c +++ b/drivers/scsi/smartpqi/smartpqi_init.c @@ -10677,12 +10677,59 @@ static const struct pci_device_id pqi_pci_id_tabl= e[] =3D { =20 MODULE_DEVICE_TABLE(pci, pqi_pci_id_table); =20 +static void pqi_reset_prepare(struct pci_dev *pci_dev) +{ + struct pqi_ctrl_info *ctrl_info =3D pci_get_drvdata(pci_dev); + + if (!ctrl_info) + return; + + dev_info(&pci_dev->dev, "PCI reset prepare\n"); + + pqi_wait_until_ofa_finished(ctrl_info); + + pqi_ofa_ctrl_quiesce(ctrl_info); + + ctrl_info->controller_online =3D false; + ctrl_info->pqi_mode_enabled =3D false; +} + +static void pqi_reset_done(struct pci_dev *pci_dev) +{ + int rc; + struct pqi_ctrl_info *ctrl_info =3D pci_get_drvdata(pci_dev); + + if (!ctrl_info) + return; + + dev_info(&pci_dev->dev, "PCI reset done - reinitializing\n"); + + ssleep(PQI_POST_RESET_DELAY_SECS); + + pqi_ofa_ctrl_unquiesce(ctrl_info); + + rc =3D pqi_ctrl_init_resume(ctrl_info); + if (rc) { + dev_err(&pci_dev->dev, "reset recovery failed: %d\n", rc); + pqi_take_ctrl_offline(ctrl_info, PQI_FIRMWARE_KERNEL_NOT_UP); + return; + } + + dev_info(&pci_dev->dev, "reset recovery complete\n"); +} + +static const struct pci_error_handlers pqi_pci_error_handlers =3D { + .reset_prepare =3D pqi_reset_prepare, + .reset_done =3D pqi_reset_done, +}; + static struct pci_driver pqi_pci_driver =3D { .name =3D DRIVER_NAME_SHORT, .id_table =3D pqi_pci_id_table, .probe =3D pqi_pci_probe, .remove =3D pqi_pci_remove, .shutdown =3D pqi_shutdown, + .err_handler =3D &pqi_pci_error_handlers, #if defined(CONFIG_PM) .driver =3D { .pm =3D &pqi_pm_ops --=20 2.43.0 From nobody Sat Jun 13 16:17:46 2026 Received: from mout02.posteo.de (mout02.posteo.de [185.67.36.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 29CF547F2C4 for ; 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Wed, 6 May 2026 16:01:42 +0200 (CEST) From: Mateusz Nowicki To: don.brace@microchip.com Cc: martin.petersen@oracle.com, James.Bottomley@HansenPartnership.com, storagedev@microchip.com, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, Mateusz Nowicki Subject: [PATCH 2/2] scsi: smartpqi: increase SIS ctrl ready resume timeout to 180s Date: Wed, 06 May 2026 14:01:43 +0000 Message-ID: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After a PCIe hot reset, firmware boot can exceed the 90 second timeout in sis_wait_for_ctrl_ready_resume(). On HPE SR932i-p Gen10+ boot takes ~125s, causing pqi_ctrl_init_resume() to fail with -ETIMEDOUT: smartpqi 0000:84:00.0: PCI reset prepare smartpqi 0000:84:00.0: PCI reset done - reinitializing smartpqi 0000:84:00.0: controller not ready after 90 seconds smartpqi 0000:84:00.0: reset recovery failed: -110 Match SIS_CTRL_READY_TIMEOUT_SECS (180s) used on the cold-boot path. Signed-off-by: Mateusz Nowicki Reviewed-by: Laurence Oberman Tested-by: Laurence Oberman --- drivers/scsi/smartpqi/smartpqi_sis.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/scsi/smartpqi/smartpqi_sis.c b/drivers/scsi/smartpqi/s= martpqi_sis.c index ae5a264d062d..df06302cec38 100644 --- a/drivers/scsi/smartpqi/smartpqi_sis.c +++ b/drivers/scsi/smartpqi/smartpqi_sis.c @@ -58,7 +58,7 @@ #define SIS_CTRL_KERNEL_UP 0x80 #define SIS_CTRL_KERNEL_PANIC 0x100 #define SIS_CTRL_READY_TIMEOUT_SECS 180 -#define SIS_CTRL_READY_RESUME_TIMEOUT_SECS 90 +#define SIS_CTRL_READY_RESUME_TIMEOUT_SECS 180 #define SIS_CTRL_READY_POLL_INTERVAL_MSECS 10 =20 enum sis_fw_triage_status { --=20 2.43.0