From nobody Sat Jun 13 20:55:25 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 339BB47F2E4; Tue, 5 May 2026 14:16:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777990583; cv=none; b=Y2ew2K/FmmIwx+3VgZzupeAgVi0EwUW04iEqmWT/jwb8agyr18hNI2dSkaV2mBcBtRWbRtX7QdnKIeFQVhtaCaQFS6dgeJQgmJ2iDkulc+TMI9alc6yh2DRY/3+Rv2VmfXBilpDr2naNwGzK+tAc2CSulqTr3LKWD0SqBWRsgTg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777990583; c=relaxed/simple; bh=eozz5PgtLSMeaXnDUrKJ7JbM68q+LAM0bhErumiYpBs=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=TKZQOlPV7MlpRp1w/Cgcorxgd0VWDwlOxns2ai2mR0vYwxtkH3rmc7lEwXWdEWZjl9Dlt5/1SGsEtk7brBhIum0EcgypakLmO82G1ds0e5fBE6xoxbiSAx2a+JUWJKzLO+HKfUEynbWo+nl4oKRRamPi5W4yHg/iIavNuOkNutQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wKGZK-000000008Qu-3Q6t; Tue, 05 May 2026 14:16:14 +0000 Date: Tue, 5 May 2026 15:16:11 +0100 From: Daniel Golle To: "Chester A. Unal" , Daniel Golle , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , DENG Qingfang , Florian Fainelli , =?utf-8?B?QXLEsW7DpyDDnE5BTA==?= , Sean Wang , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 1/5] net: dsa: mt7530: fix FDB entries not aging out with short timeout Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When setting a low ageing time such as 10 seconds, the algorithm in mt7530_set_ageing_time() finds AGE_CNT=3D0 and AGE_UNIT=3D9 as the first exact match (starting the search from tmp_age_count=3D0). On the MT7530/MT7531 hardware, the per-entry aging counter is initialized to AGE_CNT when a MAC address is learned. With AGE_CNT=3D0, new entries start with a counter value of 0, which the hardware treats as "already aged" and never removes, effectively disabling aging. Fix this by starting the search from tmp_age_count=3D1 to ensure entries always have a non-zero initial aging counter. For a 10-second ageing time this yields AGE_CNT=3D1 and AGE_UNIT=3D4 instead: the timer ticks every 5 seconds and entries are removed after 2 ticks. Fixes: ea6d5c924e39 ("net: dsa: mt7530: support setting ageing time") Signed-off-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 44d670904ad8..b1903da7d500 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -1027,8 +1027,12 @@ mt7530_set_ageing_time(struct dsa_switch *ds, unsign= ed int msecs) if (secs < 1 || secs > (AGE_CNT_MAX + 1) * (AGE_UNIT_MAX + 1)) return -ERANGE; =20 - /* iterate through all possible age_count to find the closest pair */ - for (tmp_age_count =3D 0; tmp_age_count <=3D AGE_CNT_MAX; ++tmp_age_count= ) { + /* Iterate through all possible age_count values to find the closest + * pair. Start from 1 because the per-entry aging counter is + * initialized to AGE_CNT and a value of 0 means the entry will + * never be aged out. + */ + for (tmp_age_count =3D 1; tmp_age_count <=3D AGE_CNT_MAX; ++tmp_age_count= ) { unsigned int tmp_age_unit =3D secs / (tmp_age_count + 1) - 1; =20 if (tmp_age_unit <=3D AGE_UNIT_MAX) { --=20 2.54.0 From nobody Sat Jun 13 20:55:25 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7BC2E47F2E4; Tue, 5 May 2026 14:16:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777990596; cv=none; b=lrSS0wKbe4dgQcMwZInpkpAq313TLkAFccE6PzrXK0DVhcyrcUYM8NuYx+Q1dfJmG0wHciFxm5Fkzvui/ROidVXCtziBZi2IDoLwg/g7+94bVRpgt5O7SGK6xCnvgmCulMNt7ooRUD+EG20I3HMLH495hx3RVH9bYIoHYvX+Sz8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777990596; c=relaxed/simple; bh=o1JqsJCkT/F4iOltGcutdTjIYFwB8GQ3q+L2tlCO57g=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=EPJkFrzEod6N6xZjs1L2TzQZrx5qdj549QM06+7vfzVv6IrC+YrVgBv/MxGWEbCvqaLwWhdSoTAIu5nInC1b4xLdaC/1zmHuW/R0od2grupIwS1DKw2z8lI+3nNuwQnfkVQgv/W/huVW1G6UHICMv2LxIxMmquI8jcQH0yTIVFY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wKGZZ-000000008RH-2sqA; Tue, 05 May 2026 14:16:29 +0000 Date: Tue, 5 May 2026 15:16:26 +0100 From: Daniel Golle To: "Chester A. Unal" , Daniel Golle , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , DENG Qingfang , Florian Fainelli , =?utf-8?B?QXLEsW7DpyDDnE5BTA==?= , Sean Wang , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 2/5] net: dsa: mt7530: preserve VLAN tags on trapped link-local frames Message-ID: <3ad4b724d7ae6250b8429d50fe913d2dca07a3f9.1777986341.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The BPC, RGAC1 and RGAC2 registers control the handling of link-local frames with reserved MAC DAs (01:80:C2:00:00:0x). These frames are correctly trapped to the CPU port, but the egress VLAN tag attribute was set to MT7530_VLAN_EG_UNTAGGED which causes the switch to strip any VLAN tags from trapped frames before they reach the CPU. This causes VLAN-tagged link-local frames (STP BPDUs, LLDP, PTP Peer Delay Requests) to arrive at the CPU without their VLAN tag, so they are delivered to the base network interface instead of the VLAN sub-interface. The DSA local_termination selftest confirms this: all link-local protocol tests on VLAN upper interfaces fail. Set the EG_TAG attribute to MT7530_VLAN_EG_DISABLED (system default) so that the switch does not modify VLAN tags in trapped frames. This way VLAN-tagged frames retain their original tag and are delivered to the correct VLAN sub-interface, matching the behavior of non-trapped frames which pass through without VLAN tag modification. Fixes: 69ddba9d170b ("net: dsa: mt7530: fix handling of all link-local fram= es") Signed-off-by: Daniel Golle Acked-by: Chester A. Unal --- drivers/net/dsa/mt7530.c | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index b1903da7d500..a696c8736982 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -1300,37 +1300,40 @@ static void mt7530_setup_port5(struct dsa_switch *d= s, phy_interface_t interface) static void mt753x_trap_frames(struct mt7530_priv *priv) { - /* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress them - * VLAN-untagged. + /* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress + * them with the EG_TAG attribute set to disabled (system default) + * so that any VLAN tags in the frame are not modified by the + * switch egress VLAN tag processing. This preserves VLAN tags + * for reception on VLAN sub-interfaces. */ mt7530_rmw(priv, MT753X_BPC, PAE_BPDU_FR | PAE_EG_TAG_MASK | PAE_PORT_FW_MASK | BPDU_EG_TAG_MASK | BPDU_PORT_FW_MASK, - PAE_BPDU_FR | PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | + PAE_BPDU_FR | PAE_EG_TAG(MT7530_VLAN_EG_DISABLED) | PAE_PORT_FW(TO_CPU_FW_CPU_ONLY) | - BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | + BPDU_EG_TAG(MT7530_VLAN_EG_DISABLED) | TO_CPU_FW_CPU_ONLY); =20 - /* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress - * them VLAN-untagged. + /* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and + * egress them with EG_TAG disabled. */ mt7530_rmw(priv, MT753X_RGAC1, R02_BPDU_FR | R02_EG_TAG_MASK | R02_PORT_FW_MASK | R01_BPDU_FR | R01_EG_TAG_MASK | R01_PORT_FW_MASK, - R02_BPDU_FR | R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | + R02_BPDU_FR | R02_EG_TAG(MT7530_VLAN_EG_DISABLED) | R02_PORT_FW(TO_CPU_FW_CPU_ONLY) | R01_BPDU_FR | - R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | + R01_EG_TAG(MT7530_VLAN_EG_DISABLED) | TO_CPU_FW_CPU_ONLY); =20 - /* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress - * them VLAN-untagged. + /* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and + * egress them with EG_TAG disabled. */ mt7530_rmw(priv, MT753X_RGAC2, R0E_BPDU_FR | R0E_EG_TAG_MASK | R0E_PORT_FW_MASK | R03_BPDU_FR | R03_EG_TAG_MASK | R03_PORT_FW_MASK, - R0E_BPDU_FR | R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | + R0E_BPDU_FR | R0E_EG_TAG(MT7530_VLAN_EG_DISABLED) | R0E_PORT_FW(TO_CPU_FW_CPU_ONLY) | R03_BPDU_FR | - R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) | + R03_EG_TAG(MT7530_VLAN_EG_DISABLED) | TO_CPU_FW_CPU_ONLY); } =20 --=20 2.54.0 From nobody Sat Jun 13 20:55:25 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 40CD944BC93; Tue, 5 May 2026 14:16:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777990605; cv=none; b=nvKDXKaZHBTirTPGeYH2vCescNJyQM4xDC19/JaBYmaHiCpAgba8ah1CN/EfOoXvjIUeOV6OB2hUhSd1n38rjM7psT4c9XkyEuRFfgZaSQGGe7MLVa4JBo7aKJICt8gCYbwwrdSbSz4Lf7ltAkl0RDkC2XHxtWozK5U4CW26bFQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777990605; c=relaxed/simple; bh=L1Cqbo2V5xGGHyqzvgM1NVIlUYN4iEQHS5+MPVvJoHg=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=MNUH/OFeCg/LMeWUYKMlbhkq3KYA+6FBJ8xKv0MxMt7socc//PMqKgzBfV6Thg1h5EWG+e2u1bQs+mUZOIeC+MK3KY2PZPZgEYDjvFBDStOYyRIrNBRG17gJUZ/j8AWQIJ5m7FfL1WwkYWP+xuW/c1018ohHdG6oLdLcNmOUzTI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wKGZi-000000008Rz-04iA; Tue, 05 May 2026 14:16:38 +0000 Date: Tue, 5 May 2026 15:16:35 +0100 From: Daniel Golle To: "Chester A. Unal" , Daniel Golle , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , DENG Qingfang , Florian Fainelli , =?utf-8?B?QXLEsW7DpyDDnE5BTA==?= , Sean Wang , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 3/5] net: dsa: mt7530: fix CPU port VLAN not being reset to unaware Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" After a VLAN-aware bridge is destroyed, creating any VLAN-unaware bridge loses all connectivity. The VID 0 VLAN table entry used by VLAN-unaware ports in FALLBACK mode gets corrupted during VLAN-aware operation: mt7530_hw_vlan_add() overwrites its EG_CON flag with VTAG_EN and bridge teardown removes ports from its PORT_MEM. The cleanup code that should restore it never runs because the current port's dp->vlan_filtering flag is still true when checked (DSA updates it only after the driver callback returns). Even when restored, the deferred VLAN deletion events from the switchdev workqueue can corrupt VID 0 again after the restoration. Skip the current port in the all_user_ports_removed check, call mt7530_setup_vlan0() to restore the VID 0 entry, and protect VID 0 from being modified by bridge VLAN operations in port_vlan_add and port_vlan_del since it is managed exclusively by mt7530_setup_vlan0(). Remove the CPU port PCR and PVC register writes which were clobbering PORT_VLAN mode and VLAN_ATTR with wrong values. Fixes: 83163f7dca56 ("net: dsa: mediatek: add VLAN support for MT7530") Signed-off-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 111 ++++++++++++++++++++++----------------- 1 file changed, 62 insertions(+), 49 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index a696c8736982..7cd8566a31e6 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -1623,6 +1623,49 @@ mt7530_port_bridge_join(struct dsa_switch *ds, int p= ort, return 0; } =20 +static int +mt7530_vlan_cmd(struct mt7530_priv *priv, enum mt7530_vlan_cmd cmd, u16 vi= d) +{ + struct mt7530_dummy_poll p; + u32 val; + int ret; + + val =3D VTCR_BUSY | VTCR_FUNC(cmd) | vid; + mt7530_write(priv, MT7530_VTCR, val); + + INIT_MT7530_DUMMY_POLL(&p, priv, MT7530_VTCR); + ret =3D readx_poll_timeout(_mt7530_read, &p, val, + !(val & VTCR_BUSY), 20, 20000); + if (ret < 0) { + dev_err(priv->dev, "poll timeout\n"); + return ret; + } + + val =3D mt7530_read(priv, MT7530_VTCR); + if (val & VTCR_INVALID) { + dev_err(priv->dev, "read VTCR invalid\n"); + return -EINVAL; + } + + return 0; +} + +static int +mt7530_setup_vlan0(struct mt7530_priv *priv) +{ + u32 val; + + /* Validate the entry with independent learning, keep the original + * ingress tag attribute. + */ + val =3D IVL_MAC | EG_CON | PORT_MEM(MT7530_ALL_MEMBERS) | FID(FID_BRIDGED= ) | + VLAN_VALID; + mt7530_write(priv, MT7530_VAWD1, val); + mt7530_write(priv, MT7530_VAWD2, 0); + + return mt7530_vlan_cmd(priv, MT7530_VTCR_WR_VID, 0); +} + static void mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port) { @@ -1648,6 +1691,8 @@ mt7530_port_set_vlan_unaware(struct dsa_switch *ds, i= nt port) G0_PORT_VID_DEF); =20 for (i =3D 0; i < priv->ds->num_ports; i++) { + if (i =3D=3D port) + continue; if (dsa_is_user_port(ds, i) && dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) { all_user_ports_removed =3D false; @@ -1659,13 +1704,9 @@ mt7530_port_set_vlan_unaware(struct dsa_switch *ds, = int port) * the CPU port get out of VLAN filtering mode. */ if (all_user_ports_removed) { - struct dsa_port *dp =3D dsa_to_port(ds, port); - struct dsa_port *cpu_dp =3D dp->cpu_dp; - - mt7530_write(priv, MT7530_PCR_P(cpu_dp->index), - PCR_MATRIX(dsa_user_ports(priv->ds))); - mt7530_write(priv, MT7530_PVC_P(cpu_dp->index), PORT_SPEC_TAG - | PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); + mutex_lock(&priv->reg_mutex); + mt7530_setup_vlan0(priv); + mutex_unlock(&priv->reg_mutex); } } =20 @@ -1853,33 +1894,6 @@ mt7530_port_mdb_del(struct dsa_switch *ds, int port, return ret; } =20 -static int -mt7530_vlan_cmd(struct mt7530_priv *priv, enum mt7530_vlan_cmd cmd, u16 vi= d) -{ - struct mt7530_dummy_poll p; - u32 val; - int ret; - - val =3D VTCR_BUSY | VTCR_FUNC(cmd) | vid; - mt7530_write(priv, MT7530_VTCR, val); - - INIT_MT7530_DUMMY_POLL(&p, priv, MT7530_VTCR); - ret =3D readx_poll_timeout(_mt7530_read, &p, val, - !(val & VTCR_BUSY), 20, 20000); - if (ret < 0) { - dev_err(priv->dev, "poll timeout\n"); - return ret; - } - - val =3D mt7530_read(priv, MT7530_VTCR); - if (val & VTCR_INVALID) { - dev_err(priv->dev, "read VTCR invalid\n"); - return -EINVAL; - } - - return 0; -} - static int mt7530_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filt= ering, struct netlink_ext_ack *extack) @@ -1984,21 +1998,6 @@ mt7530_hw_vlan_update(struct mt7530_priv *priv, u16 = vid, mt7530_vlan_cmd(priv, MT7530_VTCR_WR_VID, vid); } =20 -static int -mt7530_setup_vlan0(struct mt7530_priv *priv) -{ - u32 val; - - /* Validate the entry with independent learning, keep the original - * ingress tag attribute. - */ - val =3D IVL_MAC | EG_CON | PORT_MEM(MT7530_ALL_MEMBERS) | FID(FID_BRIDGED= ) | - VLAN_VALID; - mt7530_write(priv, MT7530_VAWD1, val); - - return mt7530_vlan_cmd(priv, MT7530_VTCR_WR_VID, 0); -} - static int mt7530_port_vlan_add(struct dsa_switch *ds, int port, const struct switchdev_obj_port_vlan *vlan, @@ -2011,9 +2010,18 @@ mt7530_port_vlan_add(struct dsa_switch *ds, int port, =20 mutex_lock(&priv->reg_mutex); =20 + /* VID 0 is managed exclusively by mt7530_setup_vlan0() for + * VLAN-unaware bridge operation. Don't let the bridge overwrite + * its EG_CON flag with VTAG_EN and corrupt PORT_MEM. + */ + if (vlan->vid =3D=3D 0) + goto skip_vlan_table; + mt7530_hw_vlan_entry_init(&new_entry, port, untagged); mt7530_hw_vlan_update(priv, vlan->vid, &new_entry, mt7530_hw_vlan_add); =20 +skip_vlan_table: + if (pvid) { priv->ports[port].pvid =3D vlan->vid; =20 @@ -2053,10 +2061,15 @@ mt7530_port_vlan_del(struct dsa_switch *ds, int por= t, =20 mutex_lock(&priv->reg_mutex); =20 + /* VID 0 is managed exclusively by mt7530_setup_vlan0(). */ + if (vlan->vid =3D=3D 0) + goto skip_vlan_table; + mt7530_hw_vlan_entry_init(&target_entry, port, 0); mt7530_hw_vlan_update(priv, vlan->vid, &target_entry, mt7530_hw_vlan_del); =20 +skip_vlan_table: /* PVID is being restored to the default whenever the PVID port * is being removed from the VLAN. */ --=20 2.54.0 From nobody Sat Jun 13 20:55:25 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F071D47DD6F; Tue, 5 May 2026 14:16:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777990614; cv=none; b=Urosm6bjlaonDZEMW+DJQK8JaJDwhyKr/PJvHU2+5ze0Sg1eLtjy/VTsLGlqzalnxpaVCj5YrYo+0kupAJT5M88Lzr4qniEcXKzOmIsjeB2DX/AlBRv2O4HBYzibBmgxRPPp/yc4MqJ6hG0ncocT9M6kTk1/yPZOkDzxtUjxe4U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777990614; c=relaxed/simple; bh=+e6JlMiLz06FcGnhoVMspf7Hx3agl1zTP6hy7LoMFXU=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=tt38o8XI5tFapPuWnkE4n1BssPW//H9c1QAgHjoFjaqkN233OYB0cz76RuCDZwdrG6rjemGEGuL4PrSqdD/3qubc0SG6f28FOYj+VpzG/1FiL7euSmx3TRcdggpQBusvmMYLNaN32mwwjtVIH/VkVV8+9D4I80V+TWurIe6ln+k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wKGZr-000000008SW-3pOj; Tue, 05 May 2026 14:16:48 +0000 Date: Tue, 5 May 2026 15:16:45 +0100 From: Daniel Golle To: "Chester A. Unal" , Daniel Golle , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , DENG Qingfang , Florian Fainelli , =?utf-8?B?QXLEsW7DpyDDnE5BTA==?= , Sean Wang , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 4/5] net: dsa: mt7530: clear flood flags on bridge leave Message-ID: <02ce0ee0e072a16d9ee1bf42552225482196e88b.1777986341.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Flood flags set by port_bridge_flags persist after a port leaves the bridge, causing unknown unicast to be forwarded to standalone ports. Clear UNU_FFP, UNM_FFP and BC_FFP in port_bridge_leave so that the port returns to its initial state without flooding. Fixes: 5a30833b9a16 ("net: dsa: mt7530: support MDB and bridge flag operati= ons") Signed-off-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 7cd8566a31e6..2e5337186800 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -1767,6 +1767,11 @@ mt7530_port_bridge_leave(struct dsa_switch *ds, int = port, mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, MT7530_PORT_MATRIX_MODE); =20 + /* Clear flood flags so they don't persist across bridge leave */ + mt7530_clear(priv, MT753X_MFC, + UNU_FFP(BIT(port)) | UNM_FFP(BIT(port)) | + BC_FFP(BIT(port))); + mutex_unlock(&priv->reg_mutex); } =20 --=20 2.54.0 From nobody Sat Jun 13 20:55:25 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C25A480355; Tue, 5 May 2026 14:17:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777990625; cv=none; b=tcqrrXGqyRzU1X6vO1AsHFNWWoxZah0SFGBP9+ziyYRqmBJgWV/iDFVaxcD/qBrbFHBfIdXk85fMdSxMVT3Yj8RcYIid6beMJ7dA/zn0GZ1aprdcLPxqg9ePP+4VjCuveFbOQbWl2g6RD6REA6nK1Ncsg00sxP1x73A+V3GqCuI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777990625; c=relaxed/simple; bh=4h7T+gYLbRSieuhnWr0d7eaW1cNMbGPRyC9H1b/xvnQ=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=FLCBJZ3wrgMDh5w54DbUqCIVzW/QSyhsaPESqDCOxR013j70JI7lKyLcdBhlB6uhuHFYqTQVNtUDMn3DJJ3RTEL72gJXwVxEv/4Yh5QuBv0bbaNgdfE+u1EpHuUUEsjSPMmR9mNUpPpPx2xCaLn+dEu59Yk9ccy47sj1k4+8SGo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wKGa3-000000008T3-1K8F; Tue, 05 May 2026 14:16:59 +0000 Date: Tue, 5 May 2026 15:16:56 +0100 From: Daniel Golle To: "Chester A. Unal" , Daniel Golle , Edward Parker , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , DENG Qingfang , Florian Fainelli , =?utf-8?B?QXLEsW7DpyDDnE5BTA==?= , Sean Wang , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net 5/5] net: dsa: mt7530: untag VLAN-aware bridge PVID Message-ID: <79d4032a475ad94569669a330bc1a731b85db962.1777986341.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Edward Parker With bridge VLAN filtering enabled on a port configured as untagged member of the bridge PVID, ingress untagged frames do not reach the corresponding bridge VLAN upper interface (br-lan.). ARP and similar traffic is visible on the physical port but not delivered to the VLAN sub-interface. The MT7530/MT7531 forwards frames to the CPU port with the user port's PVID tag applied even when the frame ingressed untagged on the wire, because the CPU port is set to MT7530_VLAN_EG_CONSISTENT and is a tagged member of the VLAN entry created for the bridge VLAN. The DSA core then sees a hwaccel-tagged frame whose VID matches the port's PVID, which the bridge does not treat as the untagged-on-the-wire frame that the user expects. Set ds->untag_vlan_aware_bridge_pvid in the mt7530 and mt7531 setup paths so the DSA core strips that hwaccel tag in software when the parsed VID matches the bridge port's PVID, restoring the on-the-wire frame as the bridge expects to see it. Link: https://github.com/openwrt/openwrt/issues/18576 Fixes: 83163f7dca56 ("net: dsa: mediatek: add VLAN support for MT7530") Signed-off-by: Edward Parker [daniel@makrotopia.org: improve commit message] Signed-off-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 2e5337186800..4b7e5398b211 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2452,6 +2452,7 @@ mt7530_setup(struct dsa_switch *ds) } =20 ds->assisted_learning_on_cpu_port =3D true; + ds->untag_vlan_aware_bridge_pvid =3D true; ds->mtu_enforcement_ingress =3D true; =20 if (priv->id =3D=3D ID_MT7530) { @@ -2641,6 +2642,7 @@ mt7531_setup_common(struct dsa_switch *ds) int ret, i; =20 ds->assisted_learning_on_cpu_port =3D true; + ds->untag_vlan_aware_bridge_pvid =3D true; ds->mtu_enforcement_ingress =3D true; =20 mt753x_trap_frames(priv); --=20 2.54.0