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Sat, 25 Apr 2026 14:31:38 -0700 From: Nicolin Chen To: , , , CC: , , , , , , , , , Subject: [PATCH rc v3 1/5] iommu/arm-smmu-v3: Add arm_smmu_adopt_strtab() for kdump Date: Sat, 25 Apr 2026 14:30:46 -0700 Message-ID: <9ac81da2ad2fb5795565795759b3e1dd94f0b4bb.1777150307.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044A9:EE_|LV2PR12MB5846:EE_ X-MS-Office365-Filtering-Correlation-Id: 5c49a301-ab12-476c-5797-08dea3120dd1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|7416014|36860700016|18002099003|22082099003|56012099003; X-Microsoft-Antispam-Message-Info: bS6auw0ltdEMQo+hrN6TL7JQPvA4EhssCra5MM17uG2TmC3ejn90lNsMVSIupHiRMppq6NwA4PkRLYWIuLA71QkxSzwVULE0UzCC36ntXE9BX1PdaeZ8rvR4RWrhBbnzrtN3tQOpBYG2RAT8E+P11kLzgjWi7CwhNlICiQxkd0Abq1qHD7Qwd+kmilvyJ+Qbcm0qvgkMZUCOZS7Wi28QK2OCO9nTc+sheCzlUH4ctrrdNGyCu+I0HTg6VRXGvr7OvyoFflU1YPJK9rpw/WpYCG+Zj2HvpLPSJzheJ43Y3Ge1x42DeaDcnfGTBectRKwfc8kED765YI2gsHJmHgIw3u+Lp8zPz96sALMcwQv9KswMrj032H/MZOn1XoQ3LM1eYoK8ru1/3XHMkui1CJ7tD0nQ28UG6BjvmNpW0AwOMqjmussxzpnOkXw3pLN7qQqh+OQiHjIRsJG6r32mBTr4Ddr1mfcGSvsj2i6yYN1LkUoJyo3nNmLmXVf/LrlfxsihCCBRx/1Q4QgVhkWOSCECHcSDY65YAiVHs5/nRWJoPpBH/qHUvRZYZ5ZcePOPCPHpL0DP/SutxsrleFqrufeDDIs3ipo4d5+HNx5HaKcxhn0eb3tOrXdzSVDxs5KW68yPe5oWwtRvm+Jt3QPWU+YLen2bpK6d8rRSzn5SCdh8X1XSmkMVd5iY8EGNcV3ASYSBhZzSezioT+P767Iwu4i43yZiEBPuMT3mXIUnhZM63lo89yLxYMlXbVhXbdgoa9SdlV/FrGeBM6S9L7ol5k+QLg== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(7416014)(36860700016)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1101; 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charset="utf-8" When transitioning to a kdump kernel, the primary kernel might have crashed while endpoint devices were actively bus-mastering DMA. Currently, the SMMU driver aggressively resets the hardware during probe by clearing CR0_SMMUEN and setting the Global Bypass Attribute (GBPA) to ABORT. In a kdump scenario, this aggressive reset is highly destructive: a) If GBPA is set to ABORT, in-flight DMA will be aborted, generating fatal PCIe AER or SErrors that may panic the kdump kernel b) If GBPA is set to BYPASS, in-flight DMA targeting some IOVAs will bypass the SMMU and corrupt the physical memory at those 1:1 mapped IOVAs. To safely absorb in-flight DMAs, a kdump kernel will have to leave SMMUEN= =3D1 intact and avoid modifying STRTAB_BASE, allowing HW to continue translating in-flight DMAs reusing the crashed kernel's page tables until the endpoint device drivers probe and quiesce their respective hardware. However, the ARM SMMUv3 architecture specification states that updating the SMMU_STRTAB_BASE register while SMMUEN =3D=3D 1 is UNPREDICTABLE or ignored. This leaves a kdump kernel no choice but to adopt the stream table from the crashed kernel. Introduce ARM_SMMU_OPT_KDUMP_ADOPT and its pairing arm_smmu_adopt_strtab(), which does memremap on all the stream tables extracted from STRTAB_BASE and STRTAB_BASE_CFG. This new option will be set in arm_smmu_device_hw_probe() in a following change. Note that the adoption of the crashed kernel's stream table follows certain strict rules, since the old stream table might be compromised. Thus, apply a series of validations against the values read from the registers. If any address or size doesn't pass the test, it means the stream table cannot be trusted, so toss it completely. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 187 ++++++++++++++++++++ 2 files changed, 188 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index ef42df4753ec4..cd60b692c3901 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -861,6 +861,7 @@ struct arm_smmu_device { #define ARM_SMMU_OPT_MSIPOLL (1 << 2) #define ARM_SMMU_OPT_CMDQ_FORCE_SYNC (1 << 3) #define ARM_SMMU_OPT_TEGRA241_CMDQV (1 << 4) +#define ARM_SMMU_OPT_KDUMP_ADOPT (1 << 5) u32 options; =20 struct arm_smmu_cmdq cmdq; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index f6901c5437edc..bf292e1e0c323 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -4553,10 +4554,195 @@ static int arm_smmu_init_strtab_linear(struct arm_= smmu_device *smmu) return 0; } =20 +/* + * Adopting the crashed kernel's stream table has risks: the physical addr= esses + * read from ARM_SMMU_STRTAB_BASE / L1 descriptors may be corrupted. Rejec= t any + * range that overlaps the kdump kernel's critical regions. + * + * Note that we cannot reject an overlap on IORESOURCE_MEM, as reserved re= gions + * of the crashed kernel might reside there. + */ +static bool arm_smmu_kdump_phys_is_corrupted(phys_addr_t base, size_t size) +{ + /* Must NOT overlap kdump kernel's own RAM */ + return region_intersects(base, size, IORESOURCE_SYSTEM_RAM, + IORES_DESC_NONE) !=3D REGION_DISJOINT; +} + +static int arm_smmu_adopt_strtab_2lvl(struct arm_smmu_device *smmu, u32 cf= g_reg, + dma_addr_t dma) +{ + u32 log2size =3D FIELD_GET(STRTAB_BASE_CFG_LOG2SIZE, cfg_reg); + u32 split =3D FIELD_GET(STRTAB_BASE_CFG_SPLIT, cfg_reg); + struct arm_smmu_strtab_cfg *cfg =3D &smmu->strtab_cfg; + phys_addr_t base; + u32 num_l1_ents; + size_t size; + int i; + + /* + * Only a coherent SMMU is supported at this moment. For a non-coherent + * SMMU that wants to support ARM_SMMU_OPT_KDUMP_ADOPT, try MEMREMAP_WC. + */ + if (WARN_ON(!(smmu->features & ARM_SMMU_FEAT_COHERENCY))) + return -EOPNOTSUPP; + + if (log2size < split || log2size > smmu->sid_bits) { + dev_err(smmu->dev, "kdump: log2size %u out of range [%u, %u]\n", + log2size, split, smmu->sid_bits); + return -EINVAL; + } + if (split !=3D STRTAB_SPLIT) { + dev_err(smmu->dev, + "kdump: unsupported STRTAB_SPLIT %u (expected %u)\n", + split, STRTAB_SPLIT); + return -EINVAL; + } + + num_l1_ents =3D 1U << (log2size - split); + if (num_l1_ents > STRTAB_MAX_L1_ENTRIES) { + dev_err(smmu->dev, "kdump: l1 entries %u exceeds max %u\n", + num_l1_ents, STRTAB_MAX_L1_ENTRIES); + return -EINVAL; + } + + cfg->l2.l1_dma =3D dma; + cfg->l2.num_l1_ents =3D num_l1_ents; + + base =3D dma_to_phys(smmu->dev, dma); + size =3D num_l1_ents * sizeof(struct arm_smmu_strtab_l1); + if (arm_smmu_kdump_phys_is_corrupted(base, size)) { + dev_err(smmu->dev, "kdump: l1 stream table is corrupted\n"); + return -EINVAL; + } + + cfg->l2.l1tab =3D devm_memremap(smmu->dev, base, size, MEMREMAP_WB); + if (IS_ERR(cfg->l2.l1tab)) + return PTR_ERR(cfg->l2.l1tab); + + cfg->l2.l2ptrs =3D devm_kcalloc(smmu->dev, num_l1_ents, + sizeof(*cfg->l2.l2ptrs), GFP_KERNEL); + if (!cfg->l2.l2ptrs) + return -ENOMEM; + + for (i =3D 0; i < num_l1_ents; i++) { + u64 l2ptr =3D le64_to_cpu(cfg->l2.l1tab[i].l2ptr); + dma_addr_t l2_dma =3D l2ptr & STRTAB_L1_DESC_L2PTR_MASK; + u32 span =3D FIELD_GET(STRTAB_L1_DESC_SPAN, l2ptr); + + if (!span || !l2_dma) + continue; + + if (span !=3D STRTAB_SPLIT + 1) { + dev_err(smmu->dev, + "kdump: L1[%u] unsupported span %u (vs %u)\n", + i, span, STRTAB_SPLIT + 1); + return -EINVAL; + } + + base =3D dma_to_phys(smmu->dev, l2_dma); + size =3D (1UL << (span - 1)) * sizeof(struct arm_smmu_ste); + if (arm_smmu_kdump_phys_is_corrupted(base, size)) { + dev_err(smmu->dev, + "kdump: l2 stream table is corrupted\n"); + return -EINVAL; + } + + cfg->l2.l2ptrs[i] =3D + devm_memremap(smmu->dev, base, size, MEMREMAP_WB); + if (IS_ERR(cfg->l2.l2ptrs[i])) + return PTR_ERR(cfg->l2.l2ptrs[i]); + } + + return 0; +} + +static int arm_smmu_adopt_strtab_linear(struct arm_smmu_device *smmu, + u32 cfg_reg, dma_addr_t dma) +{ + u32 log2size =3D FIELD_GET(STRTAB_BASE_CFG_LOG2SIZE, cfg_reg); + struct arm_smmu_strtab_cfg *cfg =3D &smmu->strtab_cfg; + unsigned int max_log2size; + phys_addr_t base; + size_t size; + + /* + * Only a coherent SMMU is supported at this moment. For a non-coherent + * SMMU that wants to support ARM_SMMU_OPT_KDUMP_ADOPT, try MEMREMAP_WC. + */ + if (WARN_ON(!(smmu->features & ARM_SMMU_FEAT_COHERENCY))) + return -EOPNOTSUPP; + + /* cfg->linear.num_ents is unsigned int, so cap log2size at 31 */ + max_log2size =3D min(smmu->sid_bits, 31U); + if (log2size > max_log2size) { + dev_err(smmu->dev, "kdump: unsupported log2size %u (> %u)\n", + log2size, max_log2size); + return -EINVAL; + } + + cfg->linear.ste_dma =3D dma; + cfg->linear.num_ents =3D 1U << log2size; + + base =3D dma_to_phys(smmu->dev, dma); + size =3D cfg->linear.num_ents * sizeof(struct arm_smmu_ste); + if (arm_smmu_kdump_phys_is_corrupted(base, size)) { + dev_err(smmu->dev, "kdump: stream table is corrupted\n"); + return -EINVAL; + } + + cfg->linear.table =3D devm_memremap(smmu->dev, base, size, MEMREMAP_WB); + if (IS_ERR(cfg->linear.table)) + return PTR_ERR(cfg->linear.table); + return 0; +} + +static int arm_smmu_adopt_strtab(struct arm_smmu_device *smmu) +{ + u32 cfg_reg =3D readl_relaxed(smmu->base + ARM_SMMU_STRTAB_BASE_CFG); + u64 base_reg =3D readq_relaxed(smmu->base + ARM_SMMU_STRTAB_BASE); + u32 fmt =3D FIELD_GET(STRTAB_BASE_CFG_FMT, cfg_reg); + dma_addr_t dma =3D base_reg & STRTAB_BASE_ADDR_MASK; + int ret; + + dev_info(smmu->dev, "kdump: adopting crashed kernel's stream table\n"); + + if (fmt =3D=3D STRTAB_BASE_CFG_FMT_2LVL) { + /* + * Both kernels run on the same hardware, so it's impossible for + * kdump kernel to see the support for linear stream table only. + */ + if (WARN_ON(!(smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB))) + return -EINVAL; + ret =3D arm_smmu_adopt_strtab_2lvl(smmu, cfg_reg, dma); + } else if (fmt =3D=3D STRTAB_BASE_CFG_FMT_LINEAR) { + /* + * In case that the old kernel for some reason used the linear + * format, enforce the same format to match the adopted table. + */ + smmu->features &=3D ~ARM_SMMU_FEAT_2_LVL_STRTAB; + ret =3D arm_smmu_adopt_strtab_linear(smmu, cfg_reg, dma); + } else { + dev_err(smmu->dev, "kdump: invalid STRTAB format %u\n", fmt); + ret =3D -EINVAL; + } + + if (ret) { + dev_warn(smmu->dev, "kdump: falling back to full reset\n"); + smmu->options &=3D ~ARM_SMMU_OPT_KDUMP_ADOPT; + memset(&smmu->strtab_cfg, 0, sizeof(smmu->strtab_cfg)); + } + return ret; +} + static int arm_smmu_init_strtab(struct arm_smmu_device *smmu) { int ret; =20 + if ((smmu->options & ARM_SMMU_OPT_KDUMP_ADOPT) && + !arm_smmu_adopt_strtab(smmu)) + goto out; + if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) ret =3D arm_smmu_init_strtab_2lvl(smmu); else @@ -4564,6 +4750,7 @@ static int arm_smmu_init_strtab(struct arm_smmu_devic= e *smmu) if (ret) return ret; =20 +out: ida_init(&smmu->vmid_map); =20 return 0; --=20 2.43.0 From nobody Sun Jun 21 09:00:15 2026 Received: from BYAPR05CU005.outbound.protection.outlook.com (mail-westusazon11010043.outbound.protection.outlook.com [52.101.85.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80CB3317167; Sat, 25 Apr 2026 21:31:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.85.43 ARC-Seal: i=2; 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charset="utf-8" Though the kdump kernel adopts the crashed kernel's stream table, the iommu core will still try to attach each probed device to a default domain, which overwrites the adopted STE and breaks in-flight DMA from that device. Implement an is_attach_deferred() callback to prevent this. For each device that has STE.V=3D1 and STE.Cfg!=3DAbort in the adopted table, defer the def= ault domain attachment, until the device driver explicitly requests it. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 24 +++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index bf292e1e0c323..8423bcc4be69e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -4213,6 +4213,29 @@ static void arm_smmu_remove_master(struct arm_smmu_m= aster *master) kfree(master->build_invs); } =20 +static bool arm_smmu_is_attach_deferred(struct device *dev) +{ + struct arm_smmu_master *master =3D dev_iommu_priv_get(dev); + struct arm_smmu_device *smmu =3D master->smmu; + int i; + + if (!(smmu->options & ARM_SMMU_OPT_KDUMP_ADOPT)) + return false; + + for (i =3D 0; i < master->num_streams; i++) { + struct arm_smmu_ste *ste =3D + arm_smmu_get_step_for_sid(smmu, master->streams[i].id); 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charset="utf-8" When ARM_SMMU_OPT_KDUMP_ADOPT is detected, do not disable SMMUEN and skip the CR1/CR2/STRTAB_BASE update sequence in arm_smmu_device_reset(). Those register writes are all CONSTRAINED UNPREDICTABLE while CR0_SMMUEN=3D=3D1, = so leaving them intact lets in-flight DMAs continue to be translated by the adopted stream table. Initialize 'enables' to 0 so it can carry CR0_SMMUEN in kdump case. Then, preserve that when enabling the command queue. Clear latched gerror bits if necessary. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 47 +++++++++++++++++++-- 1 file changed, 44 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 8423bcc4be69e..b6aade469a6b6 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -5017,11 +5017,28 @@ static void arm_smmu_write_strtab(struct arm_smmu_d= evice *smmu) static int arm_smmu_device_reset(struct arm_smmu_device *smmu) { int ret; - u32 reg, enables; + u32 reg, enables =3D 0; struct arm_smmu_cmdq_ent cmd; =20 - /* Clear CR0 and sync (disables SMMU and queue processing) */ reg =3D readl_relaxed(smmu->base + ARM_SMMU_CR0); + + /* + * In a kdump case (set when CR0_SMMUEN=3D1 and !GERROR_SFM_ERR), retain + * CR0_SMMUEN to avoid aborting in-flight DMA, and CR0_ATSCHK to carry + * on the ATS-check policy. + * + * According to spec, updating STRTAB_BASE/CR1/CR2 when CR0_SMMUEN=3D1 is + * CONSTRAINED UNPREDICTABLE. So, skip those register updates and rely + * on the adopted stream table from the crashed kernel. + */ + if (smmu->options & ARM_SMMU_OPT_KDUMP_ADOPT) { + dev_info(smmu->dev, + "kdump: retaining SMMUEN for in-flight DMA\n"); + enables =3D reg & (CR0_SMMUEN | CR0_ATSCHK); + goto reset_queues; + } + + /* Clear CR0 and sync (disables SMMU and queue processing) */ if (reg & CR0_SMMUEN) { dev_warn(smmu->dev, "SMMU currently enabled! Resetting...\n"); arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); @@ -5051,12 +5068,36 @@ static int arm_smmu_device_reset(struct arm_smmu_de= vice *smmu) /* Stream table */ arm_smmu_write_strtab(smmu); =20 +reset_queues: + if (smmu->options & ARM_SMMU_OPT_KDUMP_ADOPT) { + /* Disable queues since arm_smmu_device_disable() was skipped */ + ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, + ARM_SMMU_CR0ACK); + if (ret) { + dev_err(smmu->dev, "failed to disable queues\n"); + return ret; + } + } + + /* + * GERROR bits are latched. Read after queue disabling so that unhandled + * errors would be visible. Ack everything prior to re-enabling the CMDQ + * as a stale CMDQ_ERR would halt the CMDQ and new command will timeout. + */ + if (is_kdump_kernel()) { + u32 gerror =3D readl_relaxed(smmu->base + ARM_SMMU_GERROR); + u32 gerrorn =3D readl_relaxed(smmu->base + ARM_SMMU_GERRORN); + + if ((gerror ^ gerrorn) & GERROR_ERR_MASK) + writel(gerror, smmu->base + ARM_SMMU_GERRORN); + } + /* Command queue */ writeq_relaxed(smmu->cmdq.q.q_base, smmu->base + ARM_SMMU_CMDQ_BASE); writel_relaxed(smmu->cmdq.q.llq.prod, smmu->base + ARM_SMMU_CMDQ_PROD); writel_relaxed(smmu->cmdq.q.llq.cons, smmu->base + ARM_SMMU_CMDQ_CONS); =20 - enables =3D CR0_CMDQEN; + enables |=3D CR0_CMDQEN; ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, ARM_SMMU_CR0ACK); if (ret) { --=20 2.43.0 From nobody Sun Jun 21 09:00:15 2026 Received: from CH1PR05CU001.outbound.protection.outlook.com (mail-northcentralusazon11010040.outbound.protection.outlook.com [52.101.193.40]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A6A3314A9E; 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charset="utf-8" In kdump cases, the crashed kernel's CDs and page tables can be corrupted, which could trigger event spamming. Also, we cannot serve page requests. Skip the EVTQ/PRIQ setup entirely rather than enabling then disabling them. Skip the IRQ setup and guard their thread functions as well. Also add some inline comments explaining that. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Suggested-by: Kevin Tian Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 66 +++++++++++++++------ 1 file changed, 48 insertions(+), 18 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index b6aade469a6b6..f0ab0b640a3bb 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2269,6 +2269,14 @@ static irqreturn_t arm_smmu_evtq_thread(int irq, voi= d *dev) static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST); =20 + /* + * A combined IRQ might call into this function with the queue disabled. + * E.g. kdump, where stale HW PROD vs SW CONS would drive a bogus drain + * and a CONS write to a disabled queue. + */ + if (!(readl_relaxed(smmu->base + ARM_SMMU_CR0) & CR0_EVTQEN)) + return IRQ_HANDLED; + do { while (!queue_remove_raw(q, evt)) { arm_smmu_decode_event(smmu, evt, &event); @@ -2337,6 +2345,14 @@ static irqreturn_t arm_smmu_priq_thread(int irq, voi= d *dev) struct arm_smmu_ll_queue *llq =3D &q->llq; u64 evt[PRIQ_ENT_DWORDS]; =20 + /* + * A combined IRQ might call into this function with the queue disabled. + * E.g. kdump, where stale HW PROD vs SW CONS would drive a bogus drain + * and a CONS write to a disabled queue. + */ + if (!(readl_relaxed(smmu->base + ARM_SMMU_CR0) & CR0_PRIQEN)) + return IRQ_HANDLED; + do { while (!queue_remove_raw(q, evt)) arm_smmu_handle_ppr(smmu, evt); @@ -4941,7 +4957,10 @@ static void arm_smmu_setup_unique_irqs(struct arm_sm= mu_device *smmu) static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu) { int ret, irq; - u32 irqen_flags =3D IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; + u32 irqen_flags =3D IRQ_CTRL_GERROR_IRQEN; + + if (!is_kdump_kernel()) + irqen_flags |=3D IRQ_CTRL_EVTQ_IRQEN; =20 /* Disable IRQs first */ ret =3D arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, @@ -4967,7 +4986,7 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device= *smmu) } else arm_smmu_setup_unique_irqs(smmu); =20 - if (smmu->features & ARM_SMMU_FEAT_PRI) + if (!is_kdump_kernel() && (smmu->features & ARM_SMMU_FEAT_PRI)) irqen_flags |=3D IRQ_CTRL_PRIQ_IRQEN; =20 /* Enable interrupt generation on the SMMU */ @@ -5118,21 +5137,35 @@ static int arm_smmu_device_reset(struct arm_smmu_de= vice *smmu) cmd.opcode =3D CMDQ_OP_TLBI_NSNH_ALL; arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); =20 - /* Event queue */ - writeq_relaxed(smmu->evtq.q.q_base, smmu->base + ARM_SMMU_EVTQ_BASE); - writel_relaxed(smmu->evtq.q.llq.prod, smmu->page1 + ARM_SMMU_EVTQ_PROD); - writel_relaxed(smmu->evtq.q.llq.cons, smmu->page1 + ARM_SMMU_EVTQ_CONS); - - enables |=3D CR0_EVTQEN; - ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, - ARM_SMMU_CR0ACK); - if (ret) { - dev_err(smmu->dev, "failed to enable event queue\n"); - return ret; + /* + * Event queue + * + * Do not enable in a kdump case, as the crashed kernel's CDs and page + * tables might be corrupted, triggering event spamming. + */ + if (!is_kdump_kernel()) { + writeq_relaxed(smmu->evtq.q.q_base, + smmu->base + ARM_SMMU_EVTQ_BASE); + writel_relaxed(smmu->evtq.q.llq.prod, + smmu->page1 + ARM_SMMU_EVTQ_PROD); + writel_relaxed(smmu->evtq.q.llq.cons, + smmu->page1 + ARM_SMMU_EVTQ_CONS); + + enables |=3D CR0_EVTQEN; + ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, + ARM_SMMU_CR0ACK); + if (ret) { + dev_err(smmu->dev, "failed to enable event queue\n"); + return ret; + } } =20 - /* PRI queue */ - if (smmu->features & ARM_SMMU_FEAT_PRI) { + /* + * PRI queue + * + * Do not enable in a kdump case, as we cannot serve page requests. + */ + if (!is_kdump_kernel() && (smmu->features & ARM_SMMU_FEAT_PRI)) { writeq_relaxed(smmu->priq.q.q_base, smmu->base + ARM_SMMU_PRIQ_BASE); writel_relaxed(smmu->priq.q.llq.prod, @@ -5165,9 +5198,6 @@ static int arm_smmu_device_reset(struct arm_smmu_devi= ce *smmu) return ret; } =20 - if (is_kdump_kernel()) - enables &=3D ~(CR0_EVTQEN | CR0_PRIQEN); - /* Enable the SMMU interface */ enables |=3D CR0_SMMUEN; ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, --=20 2.43.0 From nobody Sun Jun 21 09:00:15 2026 Received: from BL2PR02CU003.outbound.protection.outlook.com (mail-eastusazon11011054.outbound.protection.outlook.com [52.101.52.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 94CFA313E38; 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charset="utf-8" arm_smmu_device_hw_probe() runs before arm_smmu_init_structures(), so it's natural to decide whether the kdump kernel must adopt the crashed kernel's stream table. Given that memremap is used to adopt the old stream table, set this option only on a coherent SMMU. And make sure SMMU isn't in Service Failure Mode. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 34 +++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index f0ab0b640a3bb..35aceb22d5c89 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -5288,6 +5288,36 @@ static void arm_smmu_get_httu(struct arm_smmu_device= *smmu, u32 reg) hw_features, fw_features); } =20 +static void arm_smmu_device_hw_probe_kdump(struct arm_smmu_device *smmu) +{ + u32 gerror, gerrorn, active; + + /* + * If SMMU is already active in kdump case, there could be in-flight DMA + * from devices initiated by the crashed kernel. + */ + if (!(readl_relaxed(smmu->base + ARM_SMMU_CR0) & CR0_SMMUEN)) + return; + + /* For now, only support a coherent SMMU that works with MEMREMAP_WB */ + if (!(smmu->features & ARM_SMMU_FEAT_COHERENCY)) { + dev_warn(smmu->dev, + "kdump: non-coherent SMMU can't adopt stream table\n"); + return; + } + + gerror =3D readl_relaxed(smmu->base + ARM_SMMU_GERROR); + gerrorn =3D readl_relaxed(smmu->base + ARM_SMMU_GERRORN); + active =3D gerror ^ gerrorn; + if (active & GERROR_SFM_ERR) { + dev_warn(smmu->dev, + "kdump: SMMU in Service Failure Mode, must reset\n"); + return; + } + + smmu->options |=3D ARM_SMMU_OPT_KDUMP_ADOPT; +} + static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) { u32 reg; @@ -5502,6 +5532,10 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_= device *smmu) =20 dev_info(smmu->dev, "oas %lu-bit (features 0x%08x)\n", smmu->oas, smmu->features); + + if (is_kdump_kernel()) + arm_smmu_device_hw_probe_kdump(smmu); + return 0; } =20 --=20 2.43.0