From nobody Fri Jun 19 09:51:52 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA67A36894D; Fri, 24 Apr 2026 19:21:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777058496; cv=none; b=Dnq8qvClvS1mdseUwkB+g9OMXqBRaJOSDpswagGl4IehbLmgl4gAzn5vlyMHPCKDU+Qsju0Hdl/IgNMgqGIvAuSi9uM3hUVCgeFzZacSwQb5SJUVjDjQpfP6IWh1Fa1juQdePv/h3VjCtuCBb840gUWrd4NIAHx1kWK0u8gTbPk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777058496; c=relaxed/simple; bh=igrutGezSuzZAGGdKVZw0ZWhiP2YVfHqPjUihN+3d9Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kFoEJ2iiAx+mn0y0n7Qgk4XwEl1h557lZdIxPBRsrHQbE3XemKcQFNz8wZtus6nH/PnBJyWdmCVqH/Ooh01C6hcPdpCv7L3ZroRz2ptL5vGAbM4UrgmSiwdMGeUv/J3X5dK3sMX3oj7r5MpKpystX7mubj1QXAzzYzUVbOev20s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=HELYr7RA; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="HELYr7RA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1777058495; x=1808594495; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=igrutGezSuzZAGGdKVZw0ZWhiP2YVfHqPjUihN+3d9Y=; b=HELYr7RA0eaizxwDnjbsZQu1GBvjTsQND9z7Vb7o36PrrioYS00zIbve sv9u1NsJ2KoOmrpA4cOkBkmYihschLlU9rIK3u+7d+sslw3BgX5l6qMVn gw9mcZyHjmnJ89oMnwOBgwFjwAejhbRgLJDB+cv7w68W0ohPN2WiKEiTV oUqQejLChZDrkJptfsIvKVyYGjNoKdMWQQkimyV2wjg+P6xEY6406IuTX ACky8tNpxV03+6wP2qhgt0lEDirjZNxl1G9ABOO5sWqmTMuviSVwPD7Zy dF9GWajNDfpnzUqoHVmcVGb2du6hbKw57zvMhkSVXEteMvFhZcprAIOVH A==; X-CSE-ConnectionGUID: +3o2b0RUTEqgTjIMlkVCtA== X-CSE-MsgGUID: ogHA1qVbQHihROYovodBjg== X-IronPort-AV: E=McAfee;i="6800,10657,11766"; a="77208279" X-IronPort-AV: E=Sophos;i="6.23,197,1770624000"; d="scan'208";a="77208279" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2026 12:21:34 -0700 X-CSE-ConnectionGUID: 0i4T82T9R4Se7VH6clDffg== X-CSE-MsgGUID: 5ROZTlgFQOGzMWBiVQpnaA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,197,1770624000"; d="scan'208";a="232040492" Received: from gklab-103a-129.igk.intel.com ([10.91.103.129]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2026 12:21:30 -0700 From: Dawid Glazik To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , linux-aspeed@lists.ozlabs.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dawid.glazik@linux.intel.com, maciej.lawniczak@intel.com, Jeremy Kerr Subject: [PATCH v4 1/3] ARM: dts: aspeed-g6: move i2c controllers directly into apb node Date: Fri, 24 Apr 2026 22:20:59 +0200 Message-ID: <7c7010a87bb70b9e2abdadfea76d41cdcb88a82f.1777058942.git.dawid.glazik@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" We currently have the apb's mapping of the i2c controller space as a labelled mostly-empty node: apb { i2c: bus@1e78a000 { ranges =3D <...>; }; } ... and then define the contents of the i2c block later: i2c: { i2c0: i2c-bus@80 { reg =3D <0x80 0x80>; }; i2c1: i2c-bus@100 { reg =3D <0x100 0x80>; }; } Krzysztof mentions[1] that isn't convention though, with the top-level simple-bus being empty and linked via the label. So, drop the label usage and move the i2c bus definition into the simple-bus node directly under the apb: apb { bus@1e78a000 { ranges =3D <...>; i2c0: i2c-bus@80 { reg =3D <0x80 0x80>; }; i2c1: i2c-bus@100 { reg =3D <0x100 0x80>; }; }; } This will allow us to be consistent when we add new definitions for the i3c nodes, which would require the latter format. Link: https://lore.kernel.org/linux-devicetree/c5331cf8-7295-4e6a-ba39-e075= 1a2c357e@kernel.org/ [1] Suggested-by: Jeremy Kerr Signed-off-by: Dawid Glazik --- v3: - pick up series after two years - rebase on top of latest tree and solve conflicts - as agreed with Jeremy off-list, he said I can take authorship of this go= ing forward v2: - new patch: reorganise i2c nodes before adding new-format i3c nodes --- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 452 ++++++++++++------------ 1 file changed, 225 insertions(+), 227 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/as= peed/aspeed-g6.dtsi index 189bc3bbb47c..f5641128614f 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -835,11 +835,235 @@ uart9: serial@1e790300 { status =3D "disabled"; }; =20 - i2c: bus@1e78a000 { + bus@1e78a000 { compatible =3D "simple-bus"; #address-cells =3D <1>; #size-cells =3D <1>; ranges =3D <0 0x1e78a000 0x1000>; + + i2c0: i2c@80 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x80 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c1_default>; + status =3D "disabled"; + }; + + i2c1: i2c@100 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x100 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c2_default>; + status =3D "disabled"; + }; + + i2c2: i2c@180 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x180 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c3_default>; + status =3D "disabled"; + }; + + i2c3: i2c@200 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x200 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c4_default>; + status =3D "disabled"; + }; + + i2c4: i2c@280 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x280 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c5_default>; + status =3D "disabled"; + }; + + i2c5: i2c@300 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x300 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c6_default>; + status =3D "disabled"; + }; + + i2c6: i2c@380 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x380 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c7_default>; + status =3D "disabled"; + }; + + i2c7: i2c@400 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x400 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c8_default>; + status =3D "disabled"; + }; + + i2c8: i2c@480 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x480 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c9_default>; + status =3D "disabled"; + }; + + i2c9: i2c@500 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x500 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c10_default>; + status =3D "disabled"; + }; + + i2c10: i2c@580 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x580 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c11_default>; + status =3D "disabled"; + }; + + i2c11: i2c@600 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x600 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c12_default>; + status =3D "disabled"; + }; + + i2c12: i2c@680 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x680 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c13_default>; + status =3D "disabled"; + }; + + i2c13: i2c@700 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x700 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c14_default>; + status =3D "disabled"; + }; + + i2c14: i2c@780 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x780 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c15_default>; + status =3D "disabled"; + }; + + i2c15: i2c@800 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0x800 0x80>; + compatible =3D "aspeed,ast2600-i2c-bus"; + clocks =3D <&syscon ASPEED_CLK_APB2>; + resets =3D <&syscon ASPEED_RESET_I2C>; + interrupts =3D ; + bus-frequency =3D <100000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i2c16_default>; + status =3D "disabled"; + }; }; =20 fsim0: fsi@1e79b000 { @@ -870,229 +1094,3 @@ fsim1: fsi@1e79b100 { }; =20 #include "aspeed-g6-pinctrl.dtsi" - -&i2c { - i2c0: i2c@80 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x80 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c1_default>; - status =3D "disabled"; - }; - - i2c1: i2c@100 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x100 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c2_default>; - status =3D "disabled"; - }; - - i2c2: i2c@180 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x180 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c3_default>; - status =3D "disabled"; - }; - - i2c3: i2c@200 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x200 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c4_default>; - status =3D "disabled"; - }; - - i2c4: i2c@280 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x280 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c5_default>; - status =3D "disabled"; - }; - - i2c5: i2c@300 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x300 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c6_default>; - status =3D "disabled"; - }; - - i2c6: i2c@380 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x380 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c7_default>; - status =3D "disabled"; - }; - - i2c7: i2c@400 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x400 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c8_default>; - status =3D "disabled"; - }; - - i2c8: i2c@480 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x480 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c9_default>; - status =3D "disabled"; - }; - - i2c9: i2c@500 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x500 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c10_default>; - status =3D "disabled"; - }; - - i2c10: i2c@580 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x580 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c11_default>; - status =3D "disabled"; - }; - - i2c11: i2c@600 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x600 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c12_default>; - status =3D "disabled"; - }; - - i2c12: i2c@680 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x680 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c13_default>; - status =3D "disabled"; - }; - - i2c13: i2c@700 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x700 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c14_default>; - status =3D "disabled"; - }; - - i2c14: i2c@780 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x780 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c15_default>; - status =3D "disabled"; - }; - - i2c15: i2c@800 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0x800 0x80>; - compatible =3D "aspeed,ast2600-i2c-bus"; - clocks =3D <&syscon ASPEED_CLK_APB2>; - resets =3D <&syscon ASPEED_RESET_I2C>; - interrupts =3D ; - bus-frequency =3D <100000>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_i2c16_default>; - status =3D "disabled"; - }; -}; --=20 2.43.0 From nobody Fri Jun 19 09:51:52 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C27B39A063; Fri, 24 Apr 2026 19:21:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777058499; cv=none; b=luCIgO/FOv65oJylPrNOK4nK0q5X26mSGsjvy2FU/Gk72xJr5yYcu9+kaXtlCMT9VIbGynhmOxbEZntKV+S/rsfSJm21YZYibOtAjMciP8LscC6EzWZ2RPms56pMoSx7V5ZJbiDnPoqgN4r94+mz6cv/XSVPZGnvWMlLvQ7S4Kg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777058499; c=relaxed/simple; bh=CDfuH2SmmN+K4WcmOTWBN1VqRl4QabbTNxYayYalR8c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XRQwPM6Id8NpCCWsyQpkW7yR0JKCvBM2JmWIODaHS9H/YaJrPMNOeDM/vcp3NfyG/Rci7riu6IN/33XpF8Uw7cc43u40sK+/u2M6HAY4mjLXYa9nJ9T3pkCAbT20awwYV9DSiaHtPh1XhgzMVFCRXRzQdg3NDF61DCGONVSMuZw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=PsSCmXlt; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="PsSCmXlt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1777058498; x=1808594498; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CDfuH2SmmN+K4WcmOTWBN1VqRl4QabbTNxYayYalR8c=; b=PsSCmXltqccWUYMCjnTc2dKX5Czb/md8CP01gkAgQMHNEg9ixghNtncJ GY7OQSZOMjey/ZrFAO8W85Xyn6Y7JN8Zj7jA2q97vpuAjMZ+SxI+UrZ5f OGga1Vyvkk4uZ7NkIQVwOyDVDCluvWjTEHw4pznHV4qjKHdHys/5nEeCR N/RG0Lnz6AQCOn8uOwi5IRr6tpYlxKl8gDcDvq4XyA/lq8n2W5IiQt/B2 ZwfPxhtIrEYJLSR6FIdBf4f46j+eLLlqSCxFTU1NBAiDAAbTVXA5H//NZ 6rACQhgMAnoLfPl2ubLmZqkcXX9vp07bPeBcWllNTooubTY3dKCQYi6De w==; X-CSE-ConnectionGUID: uYNhbIWLRp+KYOlTL9idQA== X-CSE-MsgGUID: ud506sVPQAWV5hFFBzAbEQ== X-IronPort-AV: E=McAfee;i="6800,10657,11766"; a="77208284" X-IronPort-AV: E=Sophos;i="6.23,197,1770624000"; d="scan'208";a="77208284" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2026 12:21:38 -0700 X-CSE-ConnectionGUID: maz5UlhaQjSklYtwVIvBww== X-CSE-MsgGUID: 8ypUnF/8QDiCDFus7CbLLQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,197,1770624000"; d="scan'208";a="232040496" Received: from gklab-103a-129.igk.intel.com ([10.91.103.129]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2026 12:21:35 -0700 From: Dawid Glazik To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , linux-aspeed@lists.ozlabs.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dawid.glazik@linux.intel.com, maciej.lawniczak@intel.com Subject: [PATCH v4 2/3] dt-bindings: mfd: syscon: add aspeed,ast2600-i3c-global compatible Date: Fri, 24 Apr 2026 22:21:00 +0200 Message-ID: <41d66492e1a1d42f6888459288311094c8b7bc51.1777058942.git.dawid.glazik@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add aspeed,ast2600-i3c-global to the syscon binding compatible lists to document the AST2600 I3C global register syscon node. Signed-off-by: Dawid Glazik Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentat= ion/devicetree/bindings/mfd/syscon.yaml index e57add2bacd3..50c07038122f 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -49,6 +49,7 @@ select: - apm,xgene-mcb - apm,xgene-rb - apm,xgene-scu + - aspeed,ast2600-i3c-global - atmel,sama5d2-sfrbu - atmel,sama5d3-nfc-io - atmel,sama5d3-sfrbu @@ -161,6 +162,7 @@ properties: - apm,xgene-mcb - apm,xgene-rb - apm,xgene-scu + - aspeed,ast2600-i3c-global - atmel,sama5d2-sfrbu - atmel,sama5d3-nfc-io - atmel,sama5d3-sfrbu --=20 2.43.0 From nobody Fri Jun 19 09:51:52 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA04F2BB1D; Fri, 24 Apr 2026 19:21:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777058505; cv=none; b=oGDy0YpCu5+2O43DgnNfmFiIYvjANIgK9leZt2OOlbAWeQhIxcySOaGWlNPWxHm0Fg2J00rW3MkhjTuNlD5A1+wp40UqGvacl0J5wAfV+EYb79R6E2yLRNWZCGVAZ9xVY77N7Pm+005znCFLVHAmr/a4CbDLsUTgPVifbxFZ/r4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1777058505; c=relaxed/simple; bh=i6qFgr4BdGt7bca1DzWlDakJS74x3G3JFyTvjzdSAes=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gz3/U57PeFr5n7gVYJW12AKy0PUx9BxlQZIOBzqDPlT947wqz+no9gjbwnYVJgsDQy85I7Lctrl5llbx2pmPvuUd4omMOXreMy+VxoTlaoJAstNltFIZLcHzK0JUTixv6zVTTndkcoqs0X241V2fD9WOkwLMMVHHGW/LNfq3vnY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Dx+uoDlq; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Dx+uoDlq" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1777058503; x=1808594503; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=i6qFgr4BdGt7bca1DzWlDakJS74x3G3JFyTvjzdSAes=; b=Dx+uoDlqYFZVPhq+rM7mpPIltuE9InHC1TAbvNkwfrVaJ+nFWKh9pse1 jfT/8kb3mJSV+BNMenPsUyr7wkscZuJyRpxu+nr80cGFos62xC8ImFlqc 5o7aK4qXwVdvY+v810GuifvpqBaxSrNR1G/k/4223NKXjLzYyZi4G3c60 fP5OYtYq6qQWoJXDnT9hpxBuQ/XhhBUj4t0d57HHkFqc6aYT9R7DzeaZD 6R2lkq6cf/c8X3rcLkjr9wpgt2Ofhj7UMY1s+wMPKGLHeA2nXm/pp4vSt iX5jWfof3z6WWTk72keDAhT1QhtEhwbV8cp8U/VH9OqXF0OMluGB1kOKL A==; X-CSE-ConnectionGUID: pvQRwN6cSme6+6ee2XHVUg== X-CSE-MsgGUID: bNHIyp/+Snmu/FCVuWxWmQ== X-IronPort-AV: E=McAfee;i="6800,10657,11766"; a="77208291" X-IronPort-AV: E=Sophos;i="6.23,197,1770624000"; d="scan'208";a="77208291" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2026 12:21:43 -0700 X-CSE-ConnectionGUID: Vwc3PpAlRdeK88HXvq8J4w== X-CSE-MsgGUID: 8rWdw2j+R3ypnvJ12arYeA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,197,1770624000"; d="scan'208";a="232040512" Received: from gklab-103a-129.igk.intel.com ([10.91.103.129]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Apr 2026 12:21:40 -0700 From: Dawid Glazik To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , linux-aspeed@lists.ozlabs.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dawid.glazik@linux.intel.com, maciej.lawniczak@intel.com, Jeremy Kerr Subject: [PATCH v4 3/3] ARM: dts: aspeed-g6: Add nodes for i3c controllers Date: Fri, 24 Apr 2026 22:21:01 +0200 Message-ID: <7a94a5f4cf84c11c7fba7485e666ecbaddfbe5cf.1777058942.git.dawid.glazik@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the i3c controller devices to the ast2600 g6 common dts. We add all 6 busses to the common g6 definition, but leave disabled through the status property, to be enabled per-platform. Suggested-by: Jeremy Kerr Signed-off-by: Dawid Glazik --- v4: - removed i3c aliases - renamed i3c-global node name to generic: syscon v3: - add i3c aliases - rebase on top of latest tree and solve conflicts - as agreed with Jeremy off-list, he said I can take authorship of this go= ing forward v2: - use inline bus representation, without the i3c: label --- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 91 +++++++++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/as= peed/aspeed-g6.dtsi index f5641128614f..51a6a4157f1b 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -1066,6 +1066,97 @@ i2c15: i2c@800 { }; }; =20 + bus@1e7a0000 { + compatible =3D "simple-bus"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0 0x1e7a0000 0x8000>; + + i3c_global: syscon@0 { + compatible =3D "aspeed,ast2600-i3c-global", "syscon"; + reg =3D <0x0 0x1000>; + resets =3D <&syscon ASPEED_RESET_I3C_DMA>; + }; + + i3c0: i3c@2000 { + compatible =3D "aspeed,ast2600-i3c"; + reg =3D <0x2000 0x1000>; + #address-cells =3D <3>; + #size-cells =3D <0>; + clocks =3D <&syscon ASPEED_CLK_GATE_I3C0CLK>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i3c1_default>; + interrupts =3D ; + aspeed,global-regs =3D <&i3c_global 0>; + status =3D "disabled"; + }; + + i3c1: i3c@3000 { + compatible =3D "aspeed,ast2600-i3c"; + reg =3D <0x3000 0x1000>; + #address-cells =3D <3>; + #size-cells =3D <0>; + clocks =3D <&syscon ASPEED_CLK_GATE_I3C1CLK>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i3c2_default>; + interrupts =3D ; + aspeed,global-regs =3D <&i3c_global 1>; + status =3D "disabled"; + }; + + i3c2: i3c@4000 { + compatible =3D "aspeed,ast2600-i3c"; + reg =3D <0x4000 0x1000>; + #address-cells =3D <3>; + #size-cells =3D <0>; + clocks =3D <&syscon ASPEED_CLK_GATE_I3C2CLK>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i3c3_default>; + interrupts =3D ; + aspeed,global-regs =3D <&i3c_global 2>; + status =3D "disabled"; + }; + + i3c3: i3c@5000 { + compatible =3D "aspeed,ast2600-i3c"; + reg =3D <0x5000 0x1000>; + #address-cells =3D <3>; + #size-cells =3D <0>; + clocks =3D <&syscon ASPEED_CLK_GATE_I3C3CLK>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i3c4_default>; + interrupts =3D ; + aspeed,global-regs =3D <&i3c_global 3>; + status =3D "disabled"; + }; + + i3c4: i3c@6000 { + compatible =3D "aspeed,ast2600-i3c"; + reg =3D <0x6000 0x1000>; + #address-cells =3D <3>; + #size-cells =3D <0>; + clocks =3D <&syscon ASPEED_CLK_GATE_I3C4CLK>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i3c5_default>; + interrupts =3D ; + aspeed,global-regs =3D <&i3c_global 4>; + status =3D "disabled"; + }; + + i3c5: i3c@7000 { + compatible =3D "aspeed,ast2600-i3c"; + reg =3D <0x7000 0x1000>; + #address-cells =3D <3>; + #size-cells =3D <0>; + clocks =3D <&syscon ASPEED_CLK_GATE_I3C5CLK>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_i3c6_default>; + interrupts =3D ; + aspeed,global-regs =3D <&i3c_global 5>; + status =3D "disabled"; + }; + }; + fsim0: fsi@1e79b000 { #interrupt-cells =3D <1>; compatible =3D "aspeed,ast2600-fsi-master"; --=20 2.43.0