From nobody Tue Jun 16 02:34:27 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE9E63D4123; Wed, 15 Apr 2026 15:23:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266617; cv=none; b=d27HOso8s1ZkTAV08t4MgRYo9hKtdnG4sJpnvH7F3zsS3zLTY2sdP/Gf/NWHufKD7UNGMBCHPQo/9/YdGESKf9MS3oxMvbg0xvXNs6p4QCCHoYqKCQZHrLcX9leUub0chMAmxs3IaIVa5GIRN6otSu5WUsg0Mtp7KoTIX9d7q+4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266617; c=relaxed/simple; bh=1XgVvkQGSRvXWrJRGtWIepEf78wCmrzACX3EK+/YmdI=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=tw75mJHhZTNW0YHzurwLfDpk6k+PWhrbucXO+QKu32mWe7sL2tfarEpwQ5BHFTJM7oASfkhX72AW0Bkqa9FDHnB3fX9Ab2YIhAw00G1D+ZW1amw8j3Xag0ogXie+KDHbo1xXjATpDH+SC7C/SrNKU2ZsdH0NIC0wc5kjDpIAm/Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wD25S-000000002dc-1Uez; Wed, 15 Apr 2026 15:23:30 +0000 Date: Wed, 15 Apr 2026 16:23:27 +0100 From: Daniel Golle To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Jaroslav Kysela , Takashi Iwai , Cyril Chao , Arnd Bergmann , Kuninori Morimoto , Daniel Golle , =?iso-8859-1?Q?N=EDcolas_F=2E_R=2E_A=2E?= Prado , Eugen Hristev , linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 1/9] dt-bindings: sound: mt2701-afe-pcm: add HDMI audio path clocks Message-ID: <50afd83a314cd20c715fb9b0d3bc85fb00f9a6eb.1776265610.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Document four additional optional clocks feeding the HDMI audio output path on MT2701 and MT7623N: the HADDS2 PLL (root of the HDMI audio clock tree), the HDMI audio and S/PDIF interface power gates, and the audio APLL root gate. Older device trees that do not wire these up remain valid via minItems. Signed-off-by: Daniel Golle --- .../bindings/sound/mediatek,mt2701-audio.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt2701-audio.= yaml b/Documentation/devicetree/bindings/sound/mediatek,mt2701-audio.yaml index 45382c4d86aa3..9d4fc542cd72c 100644 --- a/Documentation/devicetree/bindings/sound/mediatek,mt2701-audio.yaml +++ b/Documentation/devicetree/bindings/sound/mediatek,mt2701-audio.yaml @@ -32,6 +32,7 @@ properties: maxItems: 1 =20 clocks: + minItems: 34 items: - description: audio infra sys clock - description: top audio mux 1 @@ -67,8 +68,13 @@ properties: - description: top audio a1 sys pd - description: top audio a2 sys pd - description: audio merge interface pd + - description: HADDS2 PLL 294 MHz (HDMI audio path root) + - description: HDMI audio interface pd + - description: S/PDIF interface pd + - description: audio APLL root pd =20 clock-names: + minItems: 34 items: - const: infra_sys_audio_clk - const: top_audio_mux1_sel @@ -104,6 +110,10 @@ properties: - const: audio_a1sys_pd - const: audio_a2sys_pd - const: audio_mrgif_pd + - const: hadds2pll_294m + - const: audio_hdmi_pd + - const: audio_spdf_pd + - const: audio_apll_pd =20 required: - compatible --=20 2.53.0 From nobody Tue Jun 16 02:34:27 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 629553D8919; Wed, 15 Apr 2026 15:23:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266625; cv=none; b=QgyaSS07hGfI4MMOoJIocOGkpszxKd06RkA42O2acvTGMI3z58Bd1FR9eiwuJOKII9krk5GxEnKFYoAEmLfQ0+FJ5kL3XagZfsRkgB8BURqwSZ8AAY50SZrjBUsgKql1MaFUtBPuR3p5VgFusmSxdYd3oT2spc+zciwOt/uXeq8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266625; c=relaxed/simple; bh=RsQmyos+jQGiGSypHqS1V8C9NTnJjjxQ998V/vk1VhA=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=BrPStPgrsEv0kkRpE0gzhnXn8EedK0gr47fSGf6vyAVI8lRnNmyJk1nAyVF+Gefa2HYX9HGMG0EzrKOj6RdFDTrvNghFm71SIvFLMy+rzTG57dnVb7DqEDpGTpET8vAsg2uy8KDv1d3LExZDMmNYRahg3fF0wsdIuuQQpZPit78= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wD25a-000000002e3-1YDv; Wed, 15 Apr 2026 15:23:38 +0000 Date: Wed, 15 Apr 2026 16:23:35 +0100 From: Daniel Golle To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Jaroslav Kysela , Takashi Iwai , Cyril Chao , Arnd Bergmann , Kuninori Morimoto , Daniel Golle , =?iso-8859-1?Q?N=EDcolas_F=2E_R=2E_A=2E?= Prado , Eugen Hristev , linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 2/9] dt-bindings: sound: add mediatek,mt2701-hdmi-audio machine binding Message-ID: <1fe31edbdf045f87f4cfa7ae6fa53196e8b67b96.1776265610.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Describe the ASoC machine compatible used to wire the MT2701/MT7623N AFE HDMI playback path to the on-chip HDMI transmitter acting as the generic HDMI audio codec. MT7623N boards carry the same IP and use the mt7623n- compatible as a fallback to mt2701-. Signed-off-by: Daniel Golle --- .../sound/mediatek,mt2701-hdmi-audio.yaml | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/mediatek,mt2701= -hdmi-audio.yaml diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt2701-hdmi-a= udio.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt2701-hdmi-au= dio.yaml new file mode 100644 index 0000000000000..d08aee447b471 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/mediatek,mt2701-hdmi-audio.ya= ml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/mediatek,mt2701-hdmi-audio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek MT2701 HDMI audio machine driver + +maintainers: + - Daniel Golle + +description: + ASoC machine driver binding the MT2701 AFE HDMI playback path to + the on-chip HDMI transmitter via the generic HDMI audio codec. + The same HDMI audio IP is present on MT7623N. + +properties: + compatible: + oneOf: + - const: mediatek,mt2701-hdmi-audio + - items: + - const: mediatek,mt7623n-hdmi-audio + - const: mediatek,mt2701-hdmi-audio + + mediatek,platform: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle of the MT2701/MT7623N AFE platform node. + + mediatek,audio-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle of the HDMI transmitter acting as audio codec. + +required: + - compatible + - mediatek,platform + - mediatek,audio-codec + +additionalProperties: false + +examples: + - | + sound-hdmi { + compatible =3D "mediatek,mt7623n-hdmi-audio", + "mediatek,mt2701-hdmi-audio"; + mediatek,platform =3D <&afe>; + mediatek,audio-codec =3D <&hdmi0>; + }; --=20 2.53.0 From nobody Tue Jun 16 02:34:27 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3274A3B389E; Wed, 15 Apr 2026 15:23:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266632; cv=none; b=LNheJNCeqH9bo4mjL+l2SGqbj3fHzUxRzwRJxOazf9cbLT1na2BKqCi1RnNs4FbU/UhJVPct9+e6e82mu1ty1TznhsqYEqar8oyyjupF2nTIsJ0x0Cnof4Q80DCvpnMZYz/rtYjXnvqdNlxWwl1M8hb9c6GlKEM0j/RG6UBIYB8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266632; c=relaxed/simple; bh=W9v46vVyfu5BToKSjzZrAS/oMmUuIJUnVhWeKGD20fk=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=gGUitrBm82v365E6x9BxPbAVbCOvKWIRtRD0anlVDxUKAPq2YtsshJjqSqVMOVaQ+ziJJmWMtxUvkVVagqKJu1qiiZkMRCg1ZPmeqMBOv4k7dIpkwXvn0FqSHEi1tfnWbTTTPrUUURuRYmOc3N8F9VPXMfRt03QW5pSc/RgOPwA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wD25h-000000002ek-0OOp; Wed, 15 Apr 2026 15:23:45 +0000 Date: Wed, 15 Apr 2026 16:23:42 +0100 From: Daniel Golle To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Jaroslav Kysela , Takashi Iwai , Cyril Chao , Arnd Bergmann , Kuninori Morimoto , Daniel Golle , =?iso-8859-1?Q?N=EDcolas_F=2E_R=2E_A=2E?= Prado , Eugen Hristev , linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 3/9] ASoC: mediatek: mt2701: add AFE HDMI register definitions Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add register offsets and bit defines for the MT2701/MT7623N AFE HDMI audio output path: the HDMI BCK divider in AUDIO_TOP_CON3, the HDMI output memif control and descriptor registers, the 8-bit AFE_HDMI_CONN0 interconnect, and the AFE_8CH_I2S_OUT_CON engine that drives the HDMI TX serial link. These are a prerequisite for adding an HDMI playback path to the mt2701 AFE driver and have no behavioural effect on their own. Signed-off-by: Daniel Golle --- sound/soc/mediatek/mt2701/mt2701-reg.h | 35 ++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/sound/soc/mediatek/mt2701/mt2701-reg.h b/sound/soc/mediatek/mt= 2701/mt2701-reg.h index c84d14cdd7ae8..b7a25bfb58662 100644 --- a/sound/soc/mediatek/mt2701/mt2701-reg.h +++ b/sound/soc/mediatek/mt2701/mt2701-reg.h @@ -10,10 +10,17 @@ #define _MT2701_REG_H_ =20 #define AUDIO_TOP_CON0 0x0000 +#define AUDIO_TOP_CON3 0x000c #define AUDIO_TOP_CON4 0x0010 #define AUDIO_TOP_CON5 0x0014 #define AFE_DAIBT_CON0 0x001c #define AFE_MRGIF_CON 0x003c +#define AFE_HDMI_OUT_CON0 0x0370 +#define AFE_HDMI_OUT_BASE 0x0374 +#define AFE_HDMI_OUT_CUR 0x0378 +#define AFE_HDMI_OUT_END 0x037c +#define AFE_HDMI_CONN0 0x0390 +#define AFE_8CH_I2S_OUT_CON 0x0394 #define ASMI_TIMING_CON1 0x0100 #define ASMO_TIMING_CON1 0x0104 #define PWR1_ASM_CON1 0x0108 @@ -125,6 +132,34 @@ #define AFE_MEMIF_PBUF_SIZE_DLM_BYTE_MASK (0x3 << 12) #define AFE_MEMIF_PBUF_SIZE_DLM_32BYTES (0x1 << 12) =20 +/* AUDIO_TOP_CON0 (0x0000) -- HDMI audio clock gating */ +#define AUDIO_TOP_CON0_PDN_HDMI_CK (0x1 << 20) +#define AUDIO_TOP_CON0_PDN_SPDIF_CK (0x1 << 21) +#define AUDIO_TOP_CON0_PDN_SPDIF2_CK (0x1 << 22) +#define AUDIO_TOP_CON0_PDN_APLL_CK (0x1 << 23) + +/* AUDIO_TOP_CON3 (0x000c) -- HDMI BCK divider */ +#define AUDIO_TOP_CON3_HDMI_BCK_DIV_MASK (0x3f << 8) +#define AUDIO_TOP_CON3_HDMI_BCK_DIV(x) (((x) & 0x3f) << 8) + +/* AFE_HDMI_OUT_CON0 (0x0370) */ +#define AFE_HDMI_OUT_CON0_OUT_ON (0x1 << 0) +#define AFE_HDMI_OUT_CON0_BIT_WIDTH_MASK (0x1 << 1) +#define AFE_HDMI_OUT_CON0_BIT_WIDTH_16 (0x0 << 1) +#define AFE_HDMI_OUT_CON0_BIT_WIDTH_32 (0x1 << 1) +#define AFE_HDMI_OUT_CON0_CH_NUM_MASK (0xf << 4) +#define AFE_HDMI_OUT_CON0_CH_NUM(x) (((x) & 0xf) << 4) + +/* AFE_8CH_I2S_OUT_CON (0x0394) -- on-SoC 8-channel I2S that feeds HDMI TX= */ +#define AFE_8CH_I2S_OUT_CON_EN (0x1 << 0) +#define AFE_8CH_I2S_OUT_CON_BCK_INV (0x1 << 1) +#define AFE_8CH_I2S_OUT_CON_LRCK_INV (0x1 << 2) +#define AFE_8CH_I2S_OUT_CON_I2S_DELAY (0x1 << 3) +#define AFE_8CH_I2S_OUT_CON_WLEN_MASK (0x3 << 4) +#define AFE_8CH_I2S_OUT_CON_WLEN_16BIT (0x1 << 4) +#define AFE_8CH_I2S_OUT_CON_WLEN_24BIT (0x2 << 4) +#define AFE_8CH_I2S_OUT_CON_WLEN_32BIT (0x3 << 4) + /* I2S in/out register bit control */ #define ASYS_I2S_CON_FS (0x1f << 8) #define ASYS_I2S_CON_FS_SET(x) ((x) << 8) --=20 2.53.0 From nobody Tue Jun 16 02:34:27 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1326639022B; 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dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wD25o-000000002f8-11Fl; Wed, 15 Apr 2026 15:23:52 +0000 Date: Wed, 15 Apr 2026 16:23:49 +0100 From: Daniel Golle To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Jaroslav Kysela , Takashi Iwai , Cyril Chao , Arnd Bergmann , Kuninori Morimoto , Daniel Golle , =?iso-8859-1?Q?N=EDcolas_F=2E_R=2E_A=2E?= Prado , Eugen Hristev , linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 4/9] ASoC: mediatek: mt2701: add optional HDMI audio path clocks Message-ID: <4b703c4954996a21d8881b018516dbd5c402cef1.1776265610.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The HDMI audio output path on MT2701/MT7623N is rooted in HADDS2PLL and gated by the audio_hdmi, audio_spdf and audio_apll power gates. Acquire these four clocks from device tree using devm_clk_get_optional so that existing platforms which do not wire up HDMI audio keep probing unchanged. Actual clock enable/prepare is deferred to the upcoming HDMI DAI startup path. Signed-off-by: Daniel Golle --- .../mediatek/mt2701/mt2701-afe-clock-ctrl.c | 22 +++++++++++++++++++ sound/soc/mediatek/mt2701/mt2701-afe-common.h | 4 ++++ 2 files changed, 26 insertions(+) diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c b/sound/soc/= mediatek/mt2701/mt2701-afe-clock-ctrl.c index ae620890bb3ac..5a2bcf027b4fb 100644 --- a/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c +++ b/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c @@ -95,6 +95,28 @@ int mt2701_init_clock(struct mtk_base_afe *afe) afe_priv->mrgif_ck =3D NULL; } =20 + /* + * Optional HDMI audio clocks. Platforms that do not wire up the + * HDMI output (e.g. MT2701 devkits using only the I2S BE DAIs) + * may omit these; in that case the HDMI BE DAI simply cannot be + * enabled, but the rest of the AFE still probes. + */ + afe_priv->hadds2pll_ck =3D devm_clk_get_optional(afe->dev, "hadds2pll_294= m"); + if (IS_ERR(afe_priv->hadds2pll_ck)) + return PTR_ERR(afe_priv->hadds2pll_ck); + + afe_priv->audio_hdmi_ck =3D devm_clk_get_optional(afe->dev, "audio_hdmi_p= d"); + if (IS_ERR(afe_priv->audio_hdmi_ck)) + return PTR_ERR(afe_priv->audio_hdmi_ck); + + afe_priv->audio_spdf_ck =3D devm_clk_get_optional(afe->dev, "audio_spdf_p= d"); + if (IS_ERR(afe_priv->audio_spdf_ck)) + return PTR_ERR(afe_priv->audio_spdf_ck); + + afe_priv->audio_apll_ck =3D devm_clk_get_optional(afe->dev, "audio_apll_p= d"); + if (IS_ERR(afe_priv->audio_apll_ck)) + return PTR_ERR(afe_priv->audio_apll_ck); + return 0; } =20 diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-common.h b/sound/soc/medi= atek/mt2701/mt2701-afe-common.h index 32bef5e2a56d9..7b15283d6351e 100644 --- a/sound/soc/mediatek/mt2701/mt2701-afe-common.h +++ b/sound/soc/mediatek/mt2701/mt2701-afe-common.h @@ -90,6 +90,10 @@ struct mt2701_afe_private { struct mt2701_i2s_path *i2s_path; struct clk *base_ck[MT2701_BASE_CLK_NUM]; struct clk *mrgif_ck; + struct clk *hadds2pll_ck; + struct clk *audio_hdmi_ck; + struct clk *audio_spdf_ck; + struct clk *audio_apll_ck; bool mrg_enable[MTK_STREAM_NUM]; =20 const struct mt2701_soc_variants *soc; --=20 2.53.0 From nobody Tue Jun 16 02:34:27 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 225CA3D9029; Wed, 15 Apr 2026 15:24:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266651; cv=none; b=APGu1U4aY/7d8Sn/uKrQHFYfQG4zzs4SZpUcAAInaUwinD4hCRGOzHNK2I5aQY/ePqlvFA5d051G5gWplYyn/zx2MigEy6fSkcxcdmSEkD6iIOV4tBwRjkpV0kFeI9ojWm6ubSH9raMJyNhk3VYnIU2BY0I7ELG2YrQulmaiSL0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266651; c=relaxed/simple; bh=yKCvTe9HM+PLUYGp1UOCr/GGLTtsFH6y3cNN7uP0aok=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=lyxupOo5m5ANL3r1DqXr8lNZ155tfpnTGd3U2/jGV/FBUp8ZuWMDvW5f3VPYztWazGsLFBdT8nokSTuD55V9Mukgln6qTxDd9sN1WGp8W7D1nUT1aea89iyvr889CxZK+/OmSAvoHEpJ75iLbkASA9u6TEgArK2ugXZbj3BYvLI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wD25y-000000002fq-36Ho; Wed, 15 Apr 2026 15:24:02 +0000 Date: Wed, 15 Apr 2026 16:23:59 +0100 From: Daniel Golle To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Jaroslav Kysela , Takashi Iwai , Cyril Chao , Arnd Bergmann , Kuninori Morimoto , Daniel Golle , =?iso-8859-1?Q?N=EDcolas_F=2E_R=2E_A=2E?= Prado , Eugen Hristev , linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 5/9] ASoC: mediatek: mt2701: add HDMI audio memif, FE and BE DAIs Message-ID: <975f39291cffc5d3f201d2ec7fdc2cfdd1fed6aa.1776265610.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extend the MT2701/MT7623N AFE driver with the HDMI playback path: - a new HDMI DMA memif (MT2701_MEMIF_HDMI) mapped to the AFE_HDMI_OUT_{CON0,BASE,CUR,END} registers; - a PCM_HDMI front-end DAI (S16_LE only, 44.1k/48k) which feeds the memif via DPCM; - an HDMI BE DAI wrapping the AFE_8CH_I2S_OUT_CON engine that serialises L/R samples towards the on-chip HDMI transmitter. Sample-rate programming uses the empirically determined HDMI_BCK_DIV =3D 45 * 48000 / rate - 1 formula in AUDIO_TOP_CON3, which covers 44.1 kHz and 48 kHz within the 6-bit divider range. The AFE_HDMI_CONN0 interconnect is programmed to route memif output pairs to the serializer inputs with L/R in the right order for hdmi-audio-codec. The existing I2S engine helpers (mt2701_mclk_configuration, mt2701_i2s_path_enable, mt2701_afe_i2s_path_disable) are reused for the HDMI BE so that MCLK at 128*fs and the ASYS I2S3 FS field are programmed and cleanly released across open/close cycles. Only S16_LE and 44.1k/48k are exposed to userspace. Other rates fall outside the 6-bit BCK divider range, and wider sample formats require DMA BIT_WIDTH programming that the current memif setup does not handle. These limits match what the MT8173 AFE driver exposes for its HDMI path. Signed-off-by: Daniel Golle --- sound/soc/mediatek/mt2701/mt2701-afe-common.h | 2 + sound/soc/mediatek/mt2701/mt2701-afe-pcm.c | 281 +++++++++++++++++- 2 files changed, 282 insertions(+), 1 deletion(-) diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-common.h b/sound/soc/medi= atek/mt2701/mt2701-afe-common.h index 7b15283d6351e..8b6f3a200048a 100644 --- a/sound/soc/mediatek/mt2701/mt2701-afe-common.h +++ b/sound/soc/mediatek/mt2701/mt2701-afe-common.h @@ -33,6 +33,7 @@ enum { MT2701_MEMIF_UL5, MT2701_MEMIF_DLBT, MT2701_MEMIF_ULBT, + MT2701_MEMIF_HDMI, MT2701_MEMIF_NUM, MT2701_IO_I2S =3D MT2701_MEMIF_NUM, MT2701_IO_2ND_I2S, @@ -41,6 +42,7 @@ enum { MT2701_IO_5TH_I2S, MT2701_IO_6TH_I2S, MT2701_IO_MRG, + MT2701_IO_HDMI, }; =20 enum { diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c b/sound/soc/mediate= k/mt2701/mt2701-afe-pcm.c index fcae38135d93f..61b4fb512be35 100644 --- a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c +++ b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c @@ -13,6 +13,7 @@ #include #include #include +#include =20 #include "mt2701-afe-common.h" #include "mt2701-afe-clock-ctrl.h" @@ -542,6 +543,221 @@ static const struct snd_soc_dai_ops mt2701_btmrg_ops = =3D { .hw_params =3D mt2701_btmrg_hw_params, }; =20 +/* + * HDMI BE DAI -- drives the on-SoC 8-channel I2S engine whose output + * feeds the HDMI transmitter audio port. + * + * The HDMI audio hardware path is: + * HDMI memif DMA (AFE_HDMI_OUT_*) -> interconnect mux (AFE_HDMI_CONN0) + * -> 8-channel I2S engine (AFE_8CH_I2S_OUT_CON) -> HDMI TX audio port + * + * The I2S3 clock tree provides the bit/master clocks; we set its + * mclk_rate to 128*fs (matching HDMI_AUD_MCLK_128FS) and let + * mt2701_mclk_configuration program the PLL/divider path. + */ +#define MT2701_HDMI_I2S_PATH 3 + +static int mt2701_afe_hdmi_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe =3D snd_soc_dai_get_drvdata(dai); + struct mt2701_afe_private *afe_priv =3D afe->platform_priv; + int ret; + + if (!afe_priv->hadds2pll_ck || !afe_priv->audio_hdmi_ck) { + dev_err(afe->dev, "HDMI audio clocks not available\n"); + return -ENODEV; + } + + ret =3D clk_prepare_enable(afe_priv->hadds2pll_ck); + if (ret) + return ret; + + ret =3D clk_prepare_enable(afe_priv->audio_hdmi_ck); + if (ret) + goto err_hdmi; + + if (afe_priv->audio_spdf_ck) { + ret =3D clk_prepare_enable(afe_priv->audio_spdf_ck); + if (ret) + goto err_spdf; + } + + if (afe_priv->audio_apll_ck) { + ret =3D clk_prepare_enable(afe_priv->audio_apll_ck); + if (ret) + goto err_apll; + } + + ret =3D mt2701_afe_enable_mclk(afe, MT2701_HDMI_I2S_PATH); + if (ret) + goto err_mclk; + + return 0; + +err_mclk: + if (afe_priv->audio_apll_ck) + clk_disable_unprepare(afe_priv->audio_apll_ck); +err_apll: + if (afe_priv->audio_spdf_ck) + clk_disable_unprepare(afe_priv->audio_spdf_ck); +err_spdf: + clk_disable_unprepare(afe_priv->audio_hdmi_ck); +err_hdmi: + clk_disable_unprepare(afe_priv->hadds2pll_ck); + return ret; +} + +static void mt2701_afe_hdmi_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe =3D snd_soc_dai_get_drvdata(dai); + struct mt2701_afe_private *afe_priv =3D afe->platform_priv; + + mt2701_afe_disable_mclk(afe, MT2701_HDMI_I2S_PATH); + if (afe_priv->audio_apll_ck) + clk_disable_unprepare(afe_priv->audio_apll_ck); + if (afe_priv->audio_spdf_ck) + clk_disable_unprepare(afe_priv->audio_spdf_ck); + clk_disable_unprepare(afe_priv->audio_hdmi_ck); + clk_disable_unprepare(afe_priv->hadds2pll_ck); +} + +static int mt2701_afe_hdmi_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe =3D snd_soc_dai_get_drvdata(dai); + struct mt2701_afe_private *afe_priv =3D afe->platform_priv; + unsigned int channels =3D params_channels(params); + unsigned int rate =3D params_rate(params); + unsigned int divp1; + unsigned int val; + unsigned int i; + int ret; + + /* + * Compute AUDIO_TOP_CON3.HDMI_BCK_DIV up front. The divider + * drives an internal reference for the HDMI transmitter's + * audio packet engine; it must scale with the sample rate so + * that the packet engine's timing matches the data flowing in + * from the AFE memif/I2S3 side. Empirically, with audpll_sel + * parented to hadds2pll_98m (98.304 MHz), the correct value at + * 48 kHz is div =3D 44 (i.e. (div+1) =3D 45), giving 1.0923 MHz. + * Scaling inversely with rate: (div + 1) =3D 45 * 48000 / rate. + * Integer rounding introduces small (<1%) errors at 32 kHz; + * 44.1 kHz is nearly exact via round-to-nearest. Reject rates + * that fall outside the 6-bit divider range before touching + * any hardware so no side effects are left behind on error. + */ + divp1 =3D (45U * 48000U + rate / 2) / rate; + if (divp1 =3D=3D 0 || divp1 > 64) + return -EINVAL; + + /* + * Park the I2S3 clock tree at 128*fs -- this is the MCLK that + * the ASYS I2S3 engine uses to derive its BCK/LRCK. The engine + * outputs BCK =3D 64*fs (stereo, 32-bit word length). + */ + afe_priv->i2s_path[MT2701_HDMI_I2S_PATH].mclk_rate =3D rate * 128; + ret =3D mt2701_mclk_configuration(afe, MT2701_HDMI_I2S_PATH); + if (ret) + return ret; + + /* Program and start the ASYS I2S3 engine (FS, I2S mode, enable). */ + mt2701_i2s_path_enable(afe, + &afe_priv->i2s_path[MT2701_HDMI_I2S_PATH], + SNDRV_PCM_STREAM_PLAYBACK, rate); + + regmap_update_bits(afe->regmap, AUDIO_TOP_CON3, + AUDIO_TOP_CON3_HDMI_BCK_DIV_MASK, + AUDIO_TOP_CON3_HDMI_BCK_DIV(divp1 - 1)); + + /* Channel count into the HDMI output memif (bits [7:4]). */ + regmap_update_bits(afe->regmap, AFE_HDMI_OUT_CON0, + 0x000000f0, channels << 4); + + /* + * Interconnect mux -- map DMA input slots to HDMI output slots. + * Each output takes a 3-bit field at shift (i*3). Swap the first + * two inputs so that the DMA's interleaved L/R pair lands on the + * correct HDMI L/R output slots. Remaining slots are identity. + */ + val =3D (1 << 0) | (0 << 3); /* O20 <- I21, O21 <- I20 */ + for (i =3D 2; i < 8; i++) + val |=3D ((i & 0x7) << (i * 3)); + regmap_write(afe->regmap, AFE_HDMI_CONN0, val); + + /* + * 8-channel I2S framing: standard I2S, 32-bit slots, + * LRCK/BCK inverted. The wire protocol is fixed. + */ + regmap_update_bits(afe->regmap, AFE_8CH_I2S_OUT_CON, + AFE_8CH_I2S_OUT_CON_WLEN_MASK | + AFE_8CH_I2S_OUT_CON_I2S_DELAY | + AFE_8CH_I2S_OUT_CON_LRCK_INV | + AFE_8CH_I2S_OUT_CON_BCK_INV, + AFE_8CH_I2S_OUT_CON_WLEN_32BIT | + AFE_8CH_I2S_OUT_CON_I2S_DELAY | + AFE_8CH_I2S_OUT_CON_LRCK_INV | + AFE_8CH_I2S_OUT_CON_BCK_INV); + return 0; +} + +static int mt2701_afe_hdmi_trigger(struct snd_pcm_substream *substream, in= t cmd, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe =3D snd_soc_dai_get_drvdata(dai); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + /* Ungate HDMI and SPDIF power islands. */ + regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, + AUDIO_TOP_CON0_PDN_HDMI_CK | + AUDIO_TOP_CON0_PDN_SPDIF_CK, 0); + /* Enable HDMI output memif. */ + regmap_update_bits(afe->regmap, AFE_HDMI_OUT_CON0, 0x1, 0x1); + /* Enable 8-channel I2S engine. */ + regmap_update_bits(afe->regmap, AFE_8CH_I2S_OUT_CON, + AFE_8CH_I2S_OUT_CON_EN, + AFE_8CH_I2S_OUT_CON_EN); + return 0; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + regmap_update_bits(afe->regmap, AFE_8CH_I2S_OUT_CON, + AFE_8CH_I2S_OUT_CON_EN, 0); + regmap_update_bits(afe->regmap, AFE_HDMI_OUT_CON0, 0x1, 0); + regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, + AUDIO_TOP_CON0_PDN_HDMI_CK | + AUDIO_TOP_CON0_PDN_SPDIF_CK, + AUDIO_TOP_CON0_PDN_HDMI_CK | + AUDIO_TOP_CON0_PDN_SPDIF_CK); + return 0; + } + return -EINVAL; +} + +static int mt2701_afe_hdmi_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe =3D snd_soc_dai_get_drvdata(dai); + struct mt2701_afe_private *afe_priv =3D afe->platform_priv; + + mt2701_afe_i2s_path_disable(afe, + &afe_priv->i2s_path[MT2701_HDMI_I2S_PATH], + SNDRV_PCM_STREAM_PLAYBACK); + return 0; +} + +static const struct snd_soc_dai_ops mt2701_afe_hdmi_ops =3D { + .startup =3D mt2701_afe_hdmi_startup, + .shutdown =3D mt2701_afe_hdmi_shutdown, + .hw_params =3D mt2701_afe_hdmi_hw_params, + .hw_free =3D mt2701_afe_hdmi_hw_free, + .trigger =3D mt2701_afe_hdmi_trigger, +}; + static struct snd_soc_dai_driver mt2701_afe_pcm_dais[] =3D { /* FE DAIs: memory intefaces to CPU */ { @@ -628,6 +844,19 @@ static struct snd_soc_dai_driver mt2701_afe_pcm_dais[]= =3D { }, .ops =3D &mt2701_single_memif_dai_ops, }, + { + .name =3D "PCM_HDMI", + .id =3D MT2701_MEMIF_HDMI, + .playback =3D { + .stream_name =3D "HDMI Multich", + .channels_min =3D 2, + .channels_max =3D 8, + .rates =3D (SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000), + .formats =3D SNDRV_PCM_FMTBIT_S16_LE, + }, + .ops =3D &mt2701_single_memif_dai_ops, + }, /* BE DAIs */ { .name =3D "I2S0", @@ -748,7 +977,20 @@ static struct snd_soc_dai_driver mt2701_afe_pcm_dais[]= =3D { }, .ops =3D &mt2701_btmrg_ops, .symmetric_rate =3D 1, - } + }, + { + .name =3D "HDMI I2S", + .id =3D MT2701_IO_HDMI, + .playback =3D { + .stream_name =3D "HDMI 8CH I2S Playback", + .channels_min =3D 2, + .channels_max =3D 8, + .rates =3D (SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000), + .formats =3D SNDRV_PCM_FMTBIT_S16_LE, + }, + .ops =3D &mt2701_afe_hdmi_ops, + }, }; =20 static const struct snd_kcontrol_new mt2701_afe_o00_mix[] =3D { @@ -927,6 +1169,14 @@ static const struct snd_soc_dapm_route mt2701_afe_pcm= _routes[] =3D { {"I16I17", "Multich I2S2 Out Switch", "DLM"}, {"I18I19", "Multich I2S3 Out Switch", "DLM"}, =20 + /* + * HDMI FE -> BE direct route. The HDMI memif has its own DMA + * path that feeds the 8-channel internal I2S straight into the + * HDMI transmitter; no mixer/interconnect selection is exposed + * to the user. + */ + {"HDMI 8CH I2S Playback", NULL, "HDMI Multich"}, + { "I12", NULL, "I12I13" }, { "I13", NULL, "I12I13" }, { "I14", NULL, "I14I15" }, @@ -1207,6 +1457,35 @@ static const struct mtk_base_memif_data memif_data_a= rray[MT2701_MEMIF_NUM] =3D { .agent_disable_shift =3D 16, .msb_reg =3D -1, }, + { + /* + * HDMI memif feeds the on-SoC 8-channel internal I2S that + * drives the HDMI transmitter audio port. Unlike the + * standard memifs, the enable bit, channel count and bit + * width all live in AFE_HDMI_OUT_CON0, so mono/fs/hd/agent + * fields are left at -1 and programmed from the BE DAI ops + * instead. + */ + .name =3D "HDMI", + .id =3D MT2701_MEMIF_HDMI, + .reg_ofs_base =3D AFE_HDMI_OUT_BASE, + .reg_ofs_cur =3D AFE_HDMI_OUT_CUR, + .reg_ofs_end =3D AFE_HDMI_OUT_END, + .fs_reg =3D -1, + .fs_shift =3D -1, + .fs_maskbit =3D 0, + .mono_reg =3D -1, + .mono_shift =3D -1, + .enable_reg =3D AFE_HDMI_OUT_CON0, + .enable_shift =3D 0, + .hd_reg =3D -1, + .hd_shift =3D -1, + .hd_align_reg =3D -1, + .hd_align_mshift =3D 0, + .agent_disable_reg =3D -1, + .agent_disable_shift =3D 0, + .msb_reg =3D -1, + }, }; =20 static const struct mtk_base_irq_data irq_data[MT2701_IRQ_ASYS_END] =3D { --=20 2.53.0 From nobody Tue Jun 16 02:34:27 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B310318B9C; Wed, 15 Apr 2026 15:24:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266657; cv=none; b=j2AM1dqD+G6uyAePFhJTkQudxVi9SxBntKggxUHis7icTCpIlpQ3BzZwTVCQXtY1DQ6rIf/rE3+hOHTxXGDSyFNzeX+YkKlMuLqV3SBHfei0Ax2MS14R/ReRS4IMG2Fx8cdat3PEuq4Ap6XkIWh1avAAyErlzGr+TI/aBD0peHE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266657; c=relaxed/simple; bh=Fg+5kAOahkeggPDSk/iTwJuatRCvLKcr6RwbGUeWDUA=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=N+DWVilBuqBdOT+oJddr8QeS1yv9NAkf3GQGPZimEhuemY3TMLrvErnKiAmXPNidPS5TnWIjU6RXSdJPLxmwa5A2D7xEkLXPZDh+vgeO260WxwSc8H9ebseL5EsIOWLjsgwq6Y2cbsN88fWbyO/czxyc8fn1aUyYh5tVa5AwGNk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wD265-000000002gK-31Kq; Wed, 15 Apr 2026 15:24:09 +0000 Date: Wed, 15 Apr 2026 16:24:06 +0100 From: Daniel Golle To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Jaroslav Kysela , Takashi Iwai , Cyril Chao , Arnd Bergmann , Kuninori Morimoto , Daniel Golle , =?iso-8859-1?Q?N=EDcolas_F=2E_R=2E_A=2E?= Prado , Eugen Hristev , linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 6/9] ASoC: mediatek: mt2701: add machine driver for on-chip HDMI codec Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a simple ASoC machine driver that wires the MT2701/MT7623N AFE HDMI playback path to the on-chip HDMI transmitter exposed as a generic hdmi-audio-codec "i2s-hifi" DAI. The driver binds to "mediatek,mt2701-hdmi-audio". MT7623N device trees carry "mediatek,mt7623n-hdmi-audio" as a board-specific fallback, matching the dt-binding. Signed-off-by: Daniel Golle --- sound/soc/mediatek/Kconfig | 10 +++ sound/soc/mediatek/mt2701/Makefile | 1 + sound/soc/mediatek/mt2701/mt2701-hdmi.c | 114 ++++++++++++++++++++++++ 3 files changed, 125 insertions(+) create mode 100644 sound/soc/mediatek/mt2701/mt2701-hdmi.c diff --git a/sound/soc/mediatek/Kconfig b/sound/soc/mediatek/Kconfig index 3a1e1fa3fe5cc..fa076e7854adc 100644 --- a/sound/soc/mediatek/Kconfig +++ b/sound/soc/mediatek/Kconfig @@ -26,6 +26,16 @@ config SND_SOC_MT2701_CS42448 Select Y if you have such device. If unsure select "N". =20 +config SND_SOC_MT2701_HDMI + tristate "ASoC Audio driver for MT2701 with on-chip HDMI codec" + depends on SND_SOC_MT2701 + select SND_SOC_HDMI_CODEC + help + This adds the ASoC machine driver for MediaTek MT2701 and + MT7623N boards routing the AFE I2S back-end to the on-chip + HDMI transmitter via the generic HDMI codec. + If unsure select "N". + config SND_SOC_MT2701_WM8960 tristate "ASoc Audio driver for MT2701 with WM8960 codec" depends on SND_SOC_MT2701 && I2C diff --git a/sound/soc/mediatek/mt2701/Makefile b/sound/soc/mediatek/mt2701= /Makefile index 507fa26c39452..59623d3d3a038 100644 --- a/sound/soc/mediatek/mt2701/Makefile +++ b/sound/soc/mediatek/mt2701/Makefile @@ -5,4 +5,5 @@ obj-$(CONFIG_SND_SOC_MT2701) +=3D snd-soc-mt2701-afe.o =20 # machine driver obj-$(CONFIG_SND_SOC_MT2701_CS42448) +=3D mt2701-cs42448.o +obj-$(CONFIG_SND_SOC_MT2701_HDMI) +=3D mt2701-hdmi.o obj-$(CONFIG_SND_SOC_MT2701_WM8960) +=3D mt2701-wm8960.o diff --git a/sound/soc/mediatek/mt2701/mt2701-hdmi.c b/sound/soc/mediatek/m= t2701/mt2701-hdmi.c new file mode 100644 index 0000000000000..a84907879c04e --- /dev/null +++ b/sound/soc/mediatek/mt2701/mt2701-hdmi.c @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * mt2701-hdmi.c -- MT2701 HDMI ALSA SoC machine driver + * + * Copyright (c) 2026 Daniel Golle + * + * Based on mt2701-cs42448.c + */ + +#include +#include +#include +#include + +enum { + DAI_LINK_FE_HDMI_OUT, + DAI_LINK_BE_HDMI_I2S, +}; + +SND_SOC_DAILINK_DEFS(fe_hdmi_out, + DAILINK_COMP_ARRAY(COMP_CPU("PCM_HDMI")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(be_hdmi_i2s, + DAILINK_COMP_ARRAY(COMP_CPU("HDMI I2S")), + DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "i2s-hifi")), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +static struct snd_soc_dai_link mt2701_hdmi_dai_links[] =3D { + [DAI_LINK_FE_HDMI_OUT] =3D { + .name =3D "HDMI Playback", + .stream_name =3D "HDMI Playback", + .trigger =3D { SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST }, + .dynamic =3D 1, + .playback_only =3D 1, + SND_SOC_DAILINK_REG(fe_hdmi_out), + }, + [DAI_LINK_BE_HDMI_I2S] =3D { + .name =3D "HDMI BE", + .no_pcm =3D 1, + .playback_only =3D 1, + .dai_fmt =3D SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBC_CFC, + SND_SOC_DAILINK_REG(be_hdmi_i2s), + }, +}; + +static struct snd_soc_card mt2701_hdmi_soc_card =3D { + .name =3D "mt2701-hdmi", + .owner =3D THIS_MODULE, + .dai_link =3D mt2701_hdmi_dai_links, + .num_links =3D ARRAY_SIZE(mt2701_hdmi_dai_links), +}; + +static int mt2701_hdmi_machine_probe(struct platform_device *pdev) +{ + struct snd_soc_card *card =3D &mt2701_hdmi_soc_card; + struct device *dev =3D &pdev->dev; + struct device_node *platform_node; + struct device_node *codec_node; + struct snd_soc_dai_link *dai_link; + int ret; + int i; + + platform_node =3D of_parse_phandle(dev->of_node, "mediatek,platform", 0); + if (!platform_node) + return dev_err_probe(dev, -EINVAL, + "Property 'mediatek,platform' missing\n"); + + for_each_card_prelinks(card, i, dai_link) { + if (dai_link->platforms->name) + continue; + dai_link->platforms->of_node =3D platform_node; + } + + codec_node =3D of_parse_phandle(dev->of_node, "mediatek,audio-codec", 0); + if (!codec_node) { + of_node_put(platform_node); + return dev_err_probe(dev, -EINVAL, + "Property 'mediatek,audio-codec' missing\n"); + } + mt2701_hdmi_dai_links[DAI_LINK_BE_HDMI_I2S].codecs->of_node =3D codec_nod= e; + + card->dev =3D dev; + + ret =3D devm_snd_soc_register_card(dev, card); + + of_node_put(platform_node); + of_node_put(codec_node); + return ret; +} + +static const struct of_device_id mt2701_hdmi_machine_dt_match[] =3D { + { .compatible =3D "mediatek,mt2701-hdmi-audio" }, + { .compatible =3D "mediatek,mt7623n-hdmi-audio" }, + {} +}; +MODULE_DEVICE_TABLE(of, mt2701_hdmi_machine_dt_match); + +static struct platform_driver mt2701_hdmi_machine =3D { + .driver =3D { + .name =3D "mt2701-hdmi", + .of_match_table =3D mt2701_hdmi_machine_dt_match, + }, + .probe =3D mt2701_hdmi_machine_probe, +}; +module_platform_driver(mt2701_hdmi_machine); + +MODULE_DESCRIPTION("MT2701 HDMI ALSA SoC machine driver"); +MODULE_AUTHOR("Daniel Golle "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:mt2701-hdmi"); --=20 2.53.0 From nobody Tue Jun 16 02:34:27 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0257B3DA5AF; Wed, 15 Apr 2026 15:24:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wD26D-000000002gj-1grm; Wed, 15 Apr 2026 15:24:17 +0000 Date: Wed, 15 Apr 2026 16:24:14 +0100 From: Daniel Golle To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Jaroslav Kysela , Takashi Iwai , Cyril Chao , Arnd Bergmann , Kuninori Morimoto , Daniel Golle , =?iso-8859-1?Q?N=EDcolas_F=2E_R=2E_A=2E?= Prado , Eugen Hristev , linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 7/9] ARM: dts: mediatek: mt2701: wire HDMI audio path clocks into AFE Message-ID: <9dd80eb5fce5e62e2ce9e006cf5225261b1b984e.1776265610.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the HADDS2 PLL 294 MHz root, the audio_hdmi and audio_spdf interface gates and the audio_apll gate to the MT2701 AFE node, and reparent the AUDPLL mux to HADDS2PLL_98M so the HDMI audio serial clock path has a stable 294.912 MHz source. The clock names match the updated mediatek,mt2701-audio binding. Signed-off-by: Daniel Golle --- arch/arm/boot/dts/mediatek/mt2701.dtsi | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/mediatek/mt2701.dtsi b/arch/arm/boot/dts/med= iatek/mt2701.dtsi index 128b87229f3d5..80c8c7e6a422a 100644 --- a/arch/arm/boot/dts/mediatek/mt2701.dtsi +++ b/arch/arm/boot/dts/mediatek/mt2701.dtsi @@ -464,7 +464,11 @@ afe: audio-controller { <&audsys CLK_AUD_AFE_CONN>, <&audsys CLK_AUD_A1SYS>, <&audsys CLK_AUD_A2SYS>, - <&audsys CLK_AUD_AFE_MRGIF>; + <&audsys CLK_AUD_AFE_MRGIF>, + <&topckgen CLK_TOP_HADDS2PLL_294M>, + <&audsys CLK_AUD_HDMI>, + <&audsys CLK_AUD_SPDF>, + <&audsys CLK_AUD_APLL>; =20 clock-names =3D "infra_sys_audio_clk", "top_audio_mux1_sel", @@ -499,15 +503,22 @@ afe: audio-controller { "audio_afe_conn_pd", "audio_a1sys_pd", "audio_a2sys_pd", - "audio_mrgif_pd"; + "audio_mrgif_pd", + "hadds2pll_294m", + "audio_hdmi_pd", + "audio_spdf_pd", + "audio_apll_pd"; =20 assigned-clocks =3D <&topckgen CLK_TOP_AUD_MUX1_SEL>, <&topckgen CLK_TOP_AUD_MUX2_SEL>, <&topckgen CLK_TOP_AUD_MUX1_DIV>, - <&topckgen CLK_TOP_AUD_MUX2_DIV>; + <&topckgen CLK_TOP_AUD_MUX2_DIV>, + <&topckgen CLK_TOP_AUDPLL_MUX_SEL>; assigned-clock-parents =3D <&topckgen CLK_TOP_AUD1PLL_98M>, - <&topckgen CLK_TOP_AUD2PLL_90M>; - assigned-clock-rates =3D <0>, <0>, <49152000>, <45158400>; + <&topckgen CLK_TOP_AUD2PLL_90M>, + <0>, <0>, + <&topckgen CLK_TOP_HADDS2PLL_98M>; + assigned-clock-rates =3D <0>, <0>, <49152000>, <45158400>, <0>; }; }; =20 --=20 2.53.0 From nobody Tue Jun 16 02:34:27 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26ADE3D8901; Wed, 15 Apr 2026 15:24:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266671; cv=none; b=l5Qqp4vA9BoayiPgDwUFnZMQAlBYEPofr/Jk6qn534c/PwOS9ZEYVVvE3us/NMWAQXWqswZgO/YNjDjmbWvuAUQVxopSyyZRi6etsL0BSQ5RZ1o7dFXnxkZ9cFO8NDiu4FP7Gd+mwlL4rhjMKOAr1ohRaKOEXP/Gw683/2qR4mo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266671; c=relaxed/simple; bh=Yp8d9bAAd7hfcPYNmoWMJgcrn1PT/r7aRhQaCXmGFSg=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=PJciQKR4hAFe+Zd4/9xcWoVOdVHafWK3yV/PeCQMTm4K01fG70Elff504L2V6nZY9+S+CZKyK9kLkvOheXjmsJiEXz+DE9KZc876q9tp1pLfM+Ubvr6UBX4/OXWdJRbWXrNWEpzsvrfb6EqUmbzwolcW9TFUGwspsbL8pRUwrV4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wD26J-000000002hE-4Aaj; Wed, 15 Apr 2026 15:24:24 +0000 Date: Wed, 15 Apr 2026 16:24:20 +0100 From: Daniel Golle To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Jaroslav Kysela , Takashi Iwai , Cyril Chao , Arnd Bergmann , Kuninori Morimoto , Daniel Golle , =?iso-8859-1?Q?N=EDcolas_F=2E_R=2E_A=2E?= Prado , Eugen Hristev , linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 8/9] ARM: dts: mediatek: mt7623: wire HDMI audio path clocks into AFE Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Mirror the MT2701 change for the MT7623 SoC dtsi: add HADDS2PLL, audio_hdmi, audio_spdf and audio_apll to the AFE clocks list and reparent the AUDPLL mux to HADDS2PLL_98M. Required for HDMI audio on MT7623N boards via the shared mt2701 AFE driver. Signed-off-by: Daniel Golle --- arch/arm/boot/dts/mediatek/mt7623.dtsi | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/mediatek/mt7623.dtsi b/arch/arm/boot/dts/med= iatek/mt7623.dtsi index 71ac2b94c6ba3..4eb028ffee6f5 100644 --- a/arch/arm/boot/dts/mediatek/mt7623.dtsi +++ b/arch/arm/boot/dts/mediatek/mt7623.dtsi @@ -665,7 +665,11 @@ afe: audio-controller { <&audsys CLK_AUD_AFE_CONN>, <&audsys CLK_AUD_A1SYS>, <&audsys CLK_AUD_A2SYS>, - <&audsys CLK_AUD_AFE_MRGIF>; + <&audsys CLK_AUD_AFE_MRGIF>, + <&topckgen CLK_TOP_HADDS2PLL_294M>, + <&audsys CLK_AUD_HDMI>, + <&audsys CLK_AUD_SPDF>, + <&audsys CLK_AUD_APLL>; =20 clock-names =3D "infra_sys_audio_clk", "top_audio_mux1_sel", @@ -700,15 +704,22 @@ afe: audio-controller { "audio_afe_conn_pd", "audio_a1sys_pd", "audio_a2sys_pd", - "audio_mrgif_pd"; + "audio_mrgif_pd", + "hadds2pll_294m", + "audio_hdmi_pd", + "audio_spdf_pd", + "audio_apll_pd"; =20 assigned-clocks =3D <&topckgen CLK_TOP_AUD_MUX1_SEL>, <&topckgen CLK_TOP_AUD_MUX2_SEL>, <&topckgen CLK_TOP_AUD_MUX1_DIV>, - <&topckgen CLK_TOP_AUD_MUX2_DIV>; + <&topckgen CLK_TOP_AUD_MUX2_DIV>, + <&topckgen CLK_TOP_AUDPLL_MUX_SEL>; assigned-clock-parents =3D <&topckgen CLK_TOP_AUD1PLL_98M>, - <&topckgen CLK_TOP_AUD2PLL_90M>; - assigned-clock-rates =3D <0>, <0>, <49152000>, <45158400>; + <&topckgen CLK_TOP_AUD2PLL_90M>, + <0>, <0>, + <&topckgen CLK_TOP_HADDS2PLL_98M>; + assigned-clock-rates =3D <0>, <0>, <49152000>, <45158400>, <0>; }; }; =20 --=20 2.53.0 From nobody Tue Jun 16 02:34:27 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65CF73DA5A0; Wed, 15 Apr 2026 15:24:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266679; cv=none; b=ZPHLIYYDTDgkhIJFSUnBZTBmEH3RavtNss3KdLuuX2XDhKgROk+m2uxDQdiXD3KaS7EHKTeARqFkxjiF6BE8ReubrBFVj9637iuJ46h2lx3YuT+1qQut8sXMybmbChgKWbIza0jATwFzcs49l1GS/uRaJuOND02lcNAe3+i6K3s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776266679; c=relaxed/simple; bh=PjsonlxnL8KVDX9mfyk47EFIPTvDl/MuWP3UkY8zvCM=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=mEyeegO78SFqeMDOZbqTd7l/hoUMego0bks89pzuqX7T++i8aJLvKMxETFkyP4PSx9+sOIvr1MzDMmMOiRSQ1Q9Tr/2/s+aRMhbN5/c07ckNUYiJn26tuDvv9AuR3EBJZ2hjmdjs5+f1kjANr1qoaMPqhKWth1bGUFZzGOShGFo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1wD26Q-000000002hi-28Wl; Wed, 15 Apr 2026 15:24:30 +0000 Date: Wed, 15 Apr 2026 16:24:27 +0100 From: Daniel Golle To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Jaroslav Kysela , Takashi Iwai , Cyril Chao , Arnd Bergmann , Kuninori Morimoto , Daniel Golle , =?iso-8859-1?Q?N=EDcolas_F=2E_R=2E_A=2E?= Prado , Eugen Hristev , linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 9/9] ARM: dts: mediatek: mt7623n-bananapi-bpi-r2: add HDMI audio machine node Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Instantiate the mediatek,mt2701-hdmi-audio machine on the BananaPi BPI-R2, binding the AFE HDMI playback path to the on-chip HDMI transmitter acting as the generic HDMI codec. Signed-off-by: Daniel Golle --- arch/arm/boot/dts/mediatek/mt7623n-bananapi-bpi-r2.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/mediatek/mt7623n-bananapi-bpi-r2.dts b/arch/= arm/boot/dts/mediatek/mt7623n-bananapi-bpi-r2.dts index a37f3fa223c72..139a76764faa0 100644 --- a/arch/arm/boot/dts/mediatek/mt7623n-bananapi-bpi-r2.dts +++ b/arch/arm/boot/dts/mediatek/mt7623n-bananapi-bpi-r2.dts @@ -132,6 +132,13 @@ memory@80000000 { device_type =3D "memory"; reg =3D <0 0x80000000 0 0x80000000>; }; + + sound-hdmi { + compatible =3D "mediatek,mt7623n-hdmi-audio", + "mediatek,mt2701-hdmi-audio"; + mediatek,platform =3D <&afe>; + mediatek,audio-codec =3D <&hdmi0>; + }; }; =20 &bls { --=20 2.53.0