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Thu, 9 Apr 2026 12:47:09 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , Subject: [PATCH rc v1 1/4] iommu/arm-smmu-v3: Add arm_smmu_adopt_strtab() for kdump Date: Thu, 9 Apr 2026 12:46:50 -0700 Message-ID: <30c7c51c8771722813a9cf54dae7a1b5d0aeb65d.1775763475.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF00000203:EE_|IA1PR12MB7613:EE_ X-MS-Office365-Filtering-Correlation-Id: 5ec4d40f-4795-4b99-50d8-08de9670d410 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|36860700016|1800799024|82310400026|22082099003|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: UQmwfwn4EVP8rAfyrJhGQFJlSn5r3NAVFgf/iwRJxmmL1oiirWmcHuALkUtLdjhjV+YOqkMZfnltDgGHxt5Qf+SqESVKjhKjWpMelCU7JpI5uS0WwjgthJAdIeoBRnmFwCsmixOamXf96ET9WApUzXUkpPkBsIsoDgSv8AJ6QOnt5OB9yVh880aCcviV6U8M/Dqzp2/rrdIGBY3DILn9ijN98xoVySbZx3rx36mlfxNrZ29TnE1xWYg1OHLBL3G8uN+HRayrDxXSqbXI5cyxHZl6qhvJ+bOWgOZVV3uL9FVf/lKphoVBd0pHNS00JXWtmUsh0tOtviPEprJutQVAWybA7VcYCRxwqx/NLDgQLCTP8nQU8hubzQ6lfBErPywSF6ymAoysdYJoEEvk+1lU/Qpqb6EGRmk2I8Wc+tPg+QSAIMaKI++PNSnVy070Ujjd3LqJkmgA1F4Y12q7lvZQGYuUw9AeiM0kEYF+2J7qzkPlFnUrt828zhWucgN97ty6eAsDesSWJzJCiCLcku4sUt3nD5hskao3o7MRTUAdbi6s+tD8cwWcenb9YZKVEy3ig7hRnHIQIiTm8sV20f+nsPpbRx5VjrLC9FuHK9pvxqY7jwXz5sm8rSZ59YHo92E3SMrl87w0+L9I9hWwZlYUnFJQykcD99wDxR00Se5lFCjsos+F3V7lY0G1zpukkkZIiQjyXjhMzlf9xaNXkGKOD2rGEV0BIoTS42wf+YN6Lfb1mNC7CiFjQB0TzdyAmXLEJeA+97SrL6Md5Q0BrWMfqQ== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(36860700016)(1800799024)(82310400026)(22082099003)(18002099003)(56012099003);DIR:OUT;SFP:1101; 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charset="utf-8" When transitioning to a kdump kernel, the primary kernel might have crashed while endpoint devices were actively bus-mastering DMA. Currently, the SMMU driver aggressively resets the hardware during probe by clearing CR0_SMMUEN and setting the Global Bypass Attribute (GBPA) to ABORT. In a kdump scenario, this aggressive reset is highly destructive: a) If GBPA is set to ABORT, in-flight DMA will be aborted, generating fatal PCIe AER or SErrors that may panic the kdump kernel b) If GBPA is set to BYPASS, in-flight DMA targeting some IOVAs will bypass the SMMU and corrupt the physical memory at those 1:1 mapped IOVAs. To safely absorb in-flight DMA, the kdump kernel must leave SMMUEN=3D1 inta= ct and avoid modifying STRTAB_BASE. This allows HW to continue translating in- flight DMA using the crashed kernel's page tables until the endpoint device drivers probe and quiesce their respective hardware. However, the ARM SMMUv3 architecture specification states that updating the SMMU_STRTAB_BASE register while SMMUEN =3D=3D 1 is UNPREDICTABLE or ignored. This leaves a kdump kernel no choice but to adopt the stream table from the crashed kernel. Introduce ARM_SMMU_OPT_KDUMP and arm_smmu_adopt_strtab() that does memremap on all the stream tables extracted from STRTAB_BASE and STRTAB_BASE_CFG. The option will be set in arm_smmu_device_hw_probe(). Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 99 ++++++++++++++++++++- 2 files changed, 99 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index ef42df4753ec4..74950d98ba09f 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -861,6 +861,7 @@ struct arm_smmu_device { #define ARM_SMMU_OPT_MSIPOLL (1 << 2) #define ARM_SMMU_OPT_CMDQ_FORCE_SYNC (1 << 3) #define ARM_SMMU_OPT_TEGRA241_CMDQV (1 << 4) +#define ARM_SMMU_OPT_KDUMP (1 << 5) u32 options; =20 struct arm_smmu_cmdq cmdq; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index f6901c5437edc..8a1de3a67f78c 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -4553,11 +4553,108 @@ static int arm_smmu_init_strtab_linear(struct arm_= smmu_device *smmu) return 0; } =20 +static int arm_smmu_adopt_strtab_2lvl(struct arm_smmu_device *smmu, u32 cf= g_reg, + dma_addr_t dma) +{ + u32 log2size =3D FIELD_GET(STRTAB_BASE_CFG_LOG2SIZE, cfg_reg); + u32 split =3D FIELD_GET(STRTAB_BASE_CFG_SPLIT, cfg_reg); + struct arm_smmu_strtab_cfg *cfg =3D &smmu->strtab_cfg; + u32 num_l1_ents; + int i; + + if (log2size < split) { + dev_err(smmu->dev, "kdump: invalid log2size %u < split %u\n", + log2size, split); + return -EINVAL; + } + + if (split !=3D STRTAB_SPLIT) { + dev_err(smmu->dev, + "kdump: unsupported STRTAB_SPLIT %u (expected %u)\n", + split, STRTAB_SPLIT); + return -EINVAL; + } + + num_l1_ents =3D 1 << (log2size - split); + cfg->l2.l1_dma =3D dma; + cfg->l2.num_l1_ents =3D num_l1_ents; + cfg->l2.l1tab =3D devm_memremap( + smmu->dev, dma, num_l1_ents * sizeof(struct arm_smmu_strtab_l1), + MEMREMAP_WB); + if (!cfg->l2.l1tab) + return -ENOMEM; + + cfg->l2.l2ptrs =3D devm_kcalloc(smmu->dev, num_l1_ents, + sizeof(*cfg->l2.l2ptrs), GFP_KERNEL); + if (!cfg->l2.l2ptrs) + return -ENOMEM; + + for (i =3D 0; i < num_l1_ents; i++) { + u64 l2ptr =3D le64_to_cpu(cfg->l2.l1tab[i].l2ptr); + u32 span =3D FIELD_GET(STRTAB_L1_DESC_SPAN, l2ptr); + dma_addr_t l2_dma =3D l2ptr & STRTAB_L1_DESC_L2PTR_MASK; + + if (span && l2_dma) { + cfg->l2.l2ptrs[i] =3D devm_memremap( + smmu->dev, l2_dma, + sizeof(struct arm_smmu_strtab_l2), MEMREMAP_WB); + if (!cfg->l2.l2ptrs[i]) + return -ENOMEM; + } + } + + return 0; +} + +static int arm_smmu_adopt_strtab_linear(struct arm_smmu_device *smmu, + u32 cfg_reg, dma_addr_t dma) +{ + u32 log2size =3D FIELD_GET(STRTAB_BASE_CFG_LOG2SIZE, cfg_reg); + struct arm_smmu_strtab_cfg *cfg =3D &smmu->strtab_cfg; + + cfg->linear.ste_dma =3D dma; + cfg->linear.num_ents =3D 1 << log2size; + cfg->linear.table =3D devm_memremap(smmu->dev, dma, + cfg->linear.num_ents * + sizeof(struct arm_smmu_ste), + MEMREMAP_WB); + if (!cfg->linear.table) + return -ENOMEM; + return 0; +} + +static int arm_smmu_adopt_strtab(struct arm_smmu_device *smmu) +{ + u32 cfg_reg =3D readl_relaxed(smmu->base + ARM_SMMU_STRTAB_BASE_CFG); + u64 base_reg =3D readq_relaxed(smmu->base + ARM_SMMU_STRTAB_BASE); + u32 fmt =3D FIELD_GET(STRTAB_BASE_CFG_FMT, cfg_reg); + dma_addr_t dma =3D base_reg & STRTAB_BASE_ADDR_MASK; + int ret; + + dev_info(smmu->dev, "kdump: adopting crashed kernel's stream table\n"); + + if (fmt =3D=3D STRTAB_BASE_CFG_FMT_2LVL) { + /* Enforce 2-level feature flag to match the adopted table */ + smmu->features |=3D ARM_SMMU_FEAT_2_LVL_STRTAB; + ret =3D arm_smmu_adopt_strtab_2lvl(smmu, cfg_reg, dma); + } else if (fmt =3D=3D STRTAB_BASE_CFG_FMT_LINEAR) { + /* Force linear feature flag to match the adopted table */ + smmu->features &=3D ~ARM_SMMU_FEAT_2_LVL_STRTAB; + ret =3D arm_smmu_adopt_strtab_linear(smmu, cfg_reg, dma); + } else { + dev_err(smmu->dev, "kdump: invalid STRTAB format %u\n", fmt); + ret =3D -EINVAL; + } + return ret; +} + static int arm_smmu_init_strtab(struct arm_smmu_device *smmu) { int ret; =20 - if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) + if (smmu->options & ARM_SMMU_OPT_KDUMP) + ret =3D arm_smmu_adopt_strtab(smmu); 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charset="utf-8" Though the kdump kernel adopts the crashed kernel's stream table, the iommu core will still try to attach each probed device to a default domain, which overwrites the adopted STE and breaks in-flight DMA from that device. Implement an is_attach_deferred() callback to prevent this. For each device that has STE.V=3D1 in the adopted table, defer the default domain attachmen= t, until the device driver explicitly requests it. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 28 +++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 8a1de3a67f78c..ff3c1beb3739e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -4212,6 +4212,33 @@ static void arm_smmu_remove_master(struct arm_smmu_m= aster *master) kfree(master->build_invs); } =20 +static bool arm_smmu_is_attach_deferred(struct device *dev) +{ + struct arm_smmu_master *master =3D dev_iommu_priv_get(dev); + struct arm_smmu_device *smmu =3D master->smmu; + int i; + + if (!(smmu->options & ARM_SMMU_OPT_KDUMP)) + return false; + + for (i =3D 0; i < master->num_streams; i++) { + u32 sid =3D master->streams[i].id; + struct arm_smmu_ste *step; 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charset="utf-8" When ARM_SMMU_OPT_KDUMP is set, skip the GBPA/disable/CR1/CR2/STRTAB_BASE update sequence in arm_smmu_device_reset(). Those register writes are all CONSTRAINED UNPREDICTABLE while SMMUEN=3D=3D1, so leaving them untouched le= ts in-flight DMA continue to be translated by the adopted stream table. Initialize 'enables' to 0 so it can carry CR0_SMMUEN in kdump case. Then, preserve that when enabling the command queue. Also add a comment explaining why EVTQ/PRIQ are disabled in kdump cases. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 35 +++++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index ff3c1beb3739e..d0ef8fb876978 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -4931,13 +4931,28 @@ static void arm_smmu_write_strtab(struct arm_smmu_d= evice *smmu) static int arm_smmu_device_reset(struct arm_smmu_device *smmu) { int ret; - u32 reg, enables; + u32 reg, enables =3D 0; struct arm_smmu_cmdq_ent cmd; =20 /* Clear CR0 and sync (disables SMMU and queue processing) */ reg =3D readl_relaxed(smmu->base + ARM_SMMU_CR0); if (reg & CR0_SMMUEN) { dev_warn(smmu->dev, "SMMU currently enabled! Resetting...\n"); + + /* + * In a kdump case, retain SMMUEN to avoid transiently aborting + * in-flight DMA. According to spec, updating STRTAB_BASE, CR1, + * or CR2 while SMMUEN=3D=3D1 is CONSTRAINED UNPREDICTABLE. So skip + * those register updates and rely on the adopted stream table + * from the crashed kernel. + */ + if (smmu->options & ARM_SMMU_OPT_KDUMP) { + dev_info(smmu->dev, + "kdump: retaining SMMUEN for in-flight DMA\n"); + enables =3D CR0_SMMUEN; + goto reset_queues; + } + arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); } =20 @@ -4965,12 +4980,23 @@ static int arm_smmu_device_reset(struct arm_smmu_de= vice *smmu) /* Stream table */ arm_smmu_write_strtab(smmu); =20 +reset_queues: + if (smmu->options & ARM_SMMU_OPT_KDUMP) { + /* Disable queues since arm_smmu_device_disable() was skipped */ + ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, + ARM_SMMU_CR0ACK); + if (ret) { + dev_err(smmu->dev, "failed to disable queues\n"); + return ret; + } + } + /* Command queue */ writeq_relaxed(smmu->cmdq.q.q_base, smmu->base + ARM_SMMU_CMDQ_BASE); writel_relaxed(smmu->cmdq.q.llq.prod, smmu->base + ARM_SMMU_CMDQ_PROD); writel_relaxed(smmu->cmdq.q.llq.cons, smmu->base + ARM_SMMU_CMDQ_CONS); =20 - enables =3D CR0_CMDQEN; + enables |=3D CR0_CMDQEN; ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, ARM_SMMU_CR0ACK); if (ret) { @@ -5038,6 +5064,11 @@ static int arm_smmu_device_reset(struct arm_smmu_dev= ice *smmu) return ret; } =20 + /* + * Disable EVTQ and PRIQ in kdump kernel. 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Thu, 9 Apr 2026 12:47:13 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , Subject: [PATCH rc v1 4/4] iommu/arm-smmu-v3: Detect ARM_SMMU_OPT_KDUMP in arm_smmu_device_hw_probe() Date: Thu, 9 Apr 2026 12:46:53 -0700 Message-ID: <2572aa7fdd3b32eefe48693668c146f4a68ce50c.1775763475.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF00000203:EE_|IA0PPF80FB91A80:EE_ X-MS-Office365-Filtering-Correlation-Id: bc1fa18b-42cb-43e1-338f-08de9670d532 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|7416014|376014|36860700016|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: +Ul9oX0RW+aZ2xTASnIzEDIJIoTOAy0oKiLioOmEkEvQYR9aLs6gRB2vu3USoRXXDmOTaPKfZzTtE8D059TxGQ2jt7UrNKb5Qe6jZfmhCT2pZmcfsMAF6UlgpOdnYJX3YsrcmH0cAUhMFTQ3uOpyA9lHNCO2X8h+jFs91kxFCoEzNVSxJNj/0jXn9890TxtY0C/6Br6p7YC2SduYfs9vHRnhNC4KJcHFIFQZ/AUR1Hx8u3dNJiAtS1xMYzcOwfJZki7Kd0q/06kx/cXQgo7WquTRQ7150BvTf/P67JZeXUON/XsaLeqPa29Wyd/cQaDA+0oR/yk5P5SnU6k5+Cbm8OBCiQt/XERQz+4Im67QyEd5EKMEFTYT5RGqJPZDQNBqkGc4EYQhuX43QgW8c19min88XliW/u6GWBZWkIcOSDlHR6JzEhGjMQP3N4ALcQo6Fim7PPc6Wm6AZuftEJ/iwFdAdaENj4GJZCPaUSsYfUJYP9YJ7lycoxef5uoQS+fCHei2OACU24fnuAfoDySoO2LI/2ri1enF/42wWVmvlHA5/pnR94w98kJ978iyW2z4KpyAhqbSKCgJHChQkg2lebEL/jPKk5rPAd0KQCFOw+8S6+jJD+WUQvooZMDyFM9P+TVYvM2RYUE/6BIVYL8LMZZwqasy9u9dDZAZHo+aapfbmWqDZnv7a9YQPesT0pmesm1zl4LJP2L3HmDTfDxdD15mwea/WmpDbiJRMMgzm1zGn+D9LEnZr9ciU2nAE4cQQj/PvJR1000jdjfXn75Z+w== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(7416014)(376014)(36860700016)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; 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charset="utf-8" arm_smmu_device_hw_probe() runs before arm_smmu_init_structures(), so it's natural to decide whether the kdump kernel must adopt the crashed kernel's stream table. Given that memremap is used to adopt the old stream table, set this option only on a coherent SMMU. Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is = enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index d0ef8fb876978..d92b5fa4bac17 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -5376,6 +5376,20 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_= device *smmu) =20 dev_info(smmu->dev, "oas %lu-bit (features 0x%08x)\n", smmu->oas, smmu->features); + + /* + * If SMMU is already active in kdump case, there could be in-flight DMA + * from devices initiated by the crashed kernel. Mark ARM_SMMU_OPT_KDUMP + * to let the init functions adopt the crashed kernel's stream table. + * + * Note that arm_smmu_adopt_strtab() uses memremap that can only work on + * a coherent SMMU. A non-coherent SMMU has no choice but to continue to + * abort any in-flight DMA. + */ + if (is_kdump_kernel() && coherent && + (readl_relaxed(smmu->base + ARM_SMMU_CR0) & CR0_SMMUEN)) + smmu->options |=3D ARM_SMMU_OPT_KDUMP; + return 0; } =20 --=20 2.43.0