From nobody Fri Apr 3 04:37:59 2026 Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB4A630EF82 for ; Thu, 19 Mar 2026 18:41:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945714; cv=none; b=E448qJuMK2kwq9M20JRhKHzNOZXaxrSfshlJ89QYZlhM0nAzxQGGYNygM6oRicI7N6c9Hk9dPvvTaPO9NUrDBNjq9hr7IMOWSSiWuTu6unoJm6H8j3orieewtcoMZaEOxQaG4nrkF/dJb1fRB9TZjhcffyNzekinMXiRUZgOGyg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945714; c=relaxed/simple; bh=3jne8HIksbKA7WNAVpfua4BMiAl+n2r+dvdWoOSNPI4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qmOqIYB45ZnnrpAz+Y4VcqEv0sVnZVvYd1LD565xfLSb2eam67zDTX2FfOgzCrknj2MOEV1MCJlcjRTHTMYtWJB+80tarDB6wR4/waMcOsCcU3mRV9X7Yj/+Ry6ycWNBvhj8dgUxxc+86//ZPusQYPTDQX4/y5aW+dSl0j5lo3w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=XhAURv+v; arc=none smtp.client-ip=209.85.128.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="XhAURv+v" Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-485392de558so8362925e9.1 for ; Thu, 19 Mar 2026 11:41:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773945711; x=1774550511; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Kt+R8rdhnMH0JxLkvpX/7AhCeFXaCuhgwgruVNrcyX4=; b=XhAURv+vtHtoX93HTKG7dchlohjqxfPxCsD95N1TZVuEUepXaIGqu9h8oEEhLkGYRW T1Vd1O5n+zO4cgkCj4Ei8GwWhxv0rRis9SzPo5G3JtHaS3MztNziwS5y8qOWNAe/aRZf 6YdTCY4BvtESPFTpjqdRRK/Gi+16NoGPQFjUr9wBSiAldg7FiyY1tstnUA+PgC86RY7V slTCkEYZKJe9zbSni50oKeTq1eoC7C93yl+HLO3P4IOPQ+ZjY1qD3KeO07gOwP0lYrMU 0Ipoco4FRdpH9wsVZv2/fPAbhYtDTPbDEkD5nXvYnHzQLaRAFVIxt5wOZXHq74ujZJxV G6iA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773945711; x=1774550511; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Kt+R8rdhnMH0JxLkvpX/7AhCeFXaCuhgwgruVNrcyX4=; b=isq0bStoIH/c5jnAht+lqjOXAzEnt/3RpcOOLJ5w8BvtykIdVgfqLSXnaIWBpJj/K0 WKMHWkXUB2OhCjeJ1zGgSFcm24t/OWli3BGn5n4Ef2iohssmTag2xlDVeNyCu0CX7qIC nqGgfKjyq2NWb9DGnc1Mm2Z2ojcxH5SE9xmu6G2D4vw/7sOzS5pmZA/zcRyELQsdd6/n tvngH94chmvDslpYec6lUIg4OznN17RqXdytxNjRyp0Rhf2+9L04bZ1yM5I38JRw3znR CmilvHbl9xhex35CrARmBsR0gf4JuFcIxQEzcj1WDjAIoA9dJYyqvOHULX/kdJTmZv/I npEA== X-Gm-Message-State: AOJu0YwWOuU51+m7GbpS0b9c3WdLAvOtE5xgiKxxo1BtNJPw/aNjC6p6 /Bjrvjy5KD6vmRJ9+mAebeHVmDKnBd/ItbcojNjplBjWq16zMNBuHugL5hAXNA== X-Gm-Gg: ATEYQzxmhoww2TdcqsCxhM6Q0tnBmt+eHvSwHZWsLngsmFrzLSRcEmkhtOUjHI/HNZT w9qsghhnzaRSFmTS4yrSD/2igW4gJNN5G3kOjPpj45Iwc8MQsweCRmm1PqUfbcJxaA9H+rGcm41 Sv4kG7h6bAVa9mD8FZtRKoVnycalOnH0/tIb9Z/fpLy+M8F+KWY9WnQqTEQQGBbrEfrOiCN+y1R rYwvIMWjUcrA7pMntt+eHwFOG6CiOjgICytV6J+L6WZSTUPmYugCjs71xVddf7IR+1TuShofJJe vr5ECjBEaQWyrkFhbBVET7qN7v0oLNnWjg6tmNgrwvyv0pIh3oiwkoFTMYOutFCzvhkWkbPNe2k Af+HghKF0dWhxHmt8a1TltH95MA0LA8anTgPWIDgIpO3rc6D/k7/A5hS1ux1nd9bQxCSWcljwUo oOQaLWHWgPwGHrpuF9xoCZBcVk0mcGTeE0E9tLKgBok4ikgtvV7vWCnQcFBJ90dYFO/tkAx+Skc Sn4alZtgJdns0WIbBkZ/ZZ1W2+w3JBn9jERaTk4TjI1oBj9Gg== X-Received: by 2002:a05:600c:3b07:b0:47e:e2eb:bc22 with SMTP id 5b1f17b1804b1-486febb59acmr2852815e9.5.1773945710872; Thu, 19 Mar 2026 11:41:50 -0700 (PDT) Received: from Lord-Beerus.station (net-188-152-100-94.cust.dsl.teletu.it. [188.152.100.94]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f8b1fe65sm77289195e9.5.2026.03.19.11.41.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 11:41:50 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 01/11] arm64: dts: freescale: imx8mm-var-som: Move UART4 description to Symphony Date: Thu, 19 Mar 2026 19:40:21 +0100 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli The VAR-SOM-MX8MM module does not provide an onboard debug console. UART4 is routed and exposed only on the Symphony carrier board, while custom carrier designs may choose to expose a different UART. Move the UART4 node from the SOM device tree to the imx8mm-var-som-symphony.dts, keeping the SOM dtsi limited to hardware present on the module itself. Signed-off-by: Stefano Radaelli --- v3->v4: -=20 v2->v3: -=20 v1->v2: -=20 .../dts/freescale/imx8mm-var-som-symphony.dts | 18 ++++++++++++++++++ .../boot/dts/freescale/imx8mm-var-som.dtsi | 18 ------------------ 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/ar= ch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts index affbc67c2ef6..819707e6f3bf 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts @@ -11,6 +11,10 @@ / { model =3D "Variscite VAR-SOM-MX8MM Symphony evaluation board"; compatible =3D "variscite,var-som-mx8mm-symphony", "variscite,var-som-mx8= mm", "fsl,imx8mm"; =20 + chosen { + stdout-path =3D &uart4; + }; + reg_usdhc2_vmmc: regulator-usdhc2-vmmc { compatible =3D "regulator-fixed"; pinctrl-names =3D "default"; @@ -156,6 +160,13 @@ &uart3 { status =3D "okay"; }; =20 +/* Console */ +&uart4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart4>; + status =3D "okay"; +}; + &usbotg1 { disable-over-current; extcon =3D <&extcon_usbotg1>, <&extcon_usbotg1>; @@ -251,4 +262,11 @@ MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 >; }; + + pinctrl_uart4: uart4grp { + fsl,pins =3D < + MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 + MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 + >; + }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64= /boot/dts/freescale/imx8mm-var-som.dtsi index 190bde4edcd7..b6560c03639e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi @@ -9,10 +9,6 @@ / { model =3D "Variscite VAR-SOM-MX8MM module"; =20 - chosen { - stdout-path =3D &uart4; - }; - memory@40000000 { device_type =3D "memory"; reg =3D <0x0 0x40000000 0 0x80000000>; @@ -274,13 +270,6 @@ &uart2 { status =3D "okay"; }; =20 -/* Console */ -&uart4 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_uart4>; - status =3D "okay"; -}; - &usbotg1 { dr_mode =3D "otg"; usb-role-switch; @@ -418,13 +407,6 @@ MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140 >; }; =20 - pinctrl_uart4: uart4grp { - fsl,pins =3D < - MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 - MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 - >; - }; - pinctrl_usdhc1: usdhc1grp { fsl,pins =3D < MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 --=20 2.47.3 From nobody Fri Apr 3 04:37:59 2026 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB273392819 for ; Thu, 19 Mar 2026 18:41:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945716; cv=none; b=aS/K8um+FGpVucEJj0TToiIVSS27zCtO9tuWjUXhtR0Kq6vcVnSdi9uj4xdoDSww0yuz08XZLUZV/rbTW6dVd0/fiwkFEVvzzmSS5oNfpnBLmF4IeDAvANXp1JUtBCbVyDwlIluwnvN7k7/6hyXNBmXI8A7iIFWRaGNnuhNbkK8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945716; c=relaxed/simple; bh=jYkS1XsobzMkfn635H2V8zYs2HVoN+kamG1f0MbZ3hw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=k+x9WgUFTC5C+clyKqyntTrhA2477cXZyaybOSOgVpQjKODKbalA5orfDRNtRQHamCB9OIwZHNhg9oi2nbr576ieDdNSs29fXmb+qzMpYn1xlFU6al4qb0qhm3jF1kQotbDez5X6PrX4mFBaRKuz44LHoDSELesoYiqYuxZeMA4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ak9FrZcS; arc=none smtp.client-ip=209.85.128.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ak9FrZcS" Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-486507134e4so15315685e9.0 for ; Thu, 19 Mar 2026 11:41:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773945712; x=1774550512; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=G+83XzgDieAPhEX5V9IN75u6fjFMd/nb+xECP6VLNnI=; b=ak9FrZcSns55mujJEzgTjSPIIAYQBhmslM/g+g1vfgFU/0iY+/vLsezDmnaHMNF1kG UouOYhb48BLbT8xHG6+ln2eAJRJDLfZNg0ytZGDqItonWvlwcrJzi8SM+M6Dte5dD3qa iD5dd/OHlBnagIIJTEUK8Yre737xQ6f53lEJpZrVEX7fJa6qS2JVhRzWrm3rTH/1feBe JuX5vomNzIPhe/CiqVxLODi43x25AAKGXO2BSyrpmfv5bnjachNzpCfORLShjV+7rM5L FL/lCuzxRqv5f5oK+L/8gjXSt8AMosZw8sPRcrkiGlVc0gu0NmSAceXW8pPY565dymmH f5xQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773945712; x=1774550512; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=G+83XzgDieAPhEX5V9IN75u6fjFMd/nb+xECP6VLNnI=; b=JMlS7UzIFvHxIINxlgQ7gVr+cGJBk25Qw0r4U0x3SExFLbG7klyB6pUD5bvZjE59AZ 7uBE/Ld9NR8WWaOaP1F7C7jViqVto0A5RjKuM/NWrUEr5Wftyki1rUT3haWC5mYY3gEi VkQ+eSO7tMsAP55F2ewcP9Wm4DG3iLET+j6+QEvgiXDpQkOcP6ntrSenzlt5pE5cRGA2 g5gWZdT8gqBPC3yloJCr45LeEDEVmKGZdUk4ARKJOy9pC1XN4z0ShB57Y+zfPuTJ5t7P VtXC5yPRVpfS4NTch1TvMjZjFNpzFy+jhyve/E1zrjKS1oxrrohVHLrBbMAMcYmUyxCz oMhg== X-Gm-Message-State: AOJu0YyohrVK4B4q1DsdFllhLRwAdFlkJovzhTOInMpJi8T/f65yiuEc lm2XNcHwLIE0BtZV4OlSJk5+V8QDTqrA0JSZJgNwJG9hQhz/SQmFllzyF1gdHQ== X-Gm-Gg: ATEYQzzQU5khY3h/hZ1z9XQaYcYCXj2v6juuT+3VmKGkLQ88yMEfeyUQfLgfxl/kRQ6 mSx/4XDuvowEXTuuD438KX1T7B7Q0CTA6Qv0MM6wpt/hcTHqbIiGBcYTxoMtX9TD6wRImU9xZn6 EUntfP0q0FuvF5dF4ci1dVZ028Uk1EbmAYGQzJuLdGVl566LKeP0PKZNoHzkYftRMlluiF8eFiN aYDgno6LV21hrsNYbq80EJO8KLDDs/xIxi0SpXAjVVK33Ty5Ey+1+udnCTsIamvgMfbEYbv8z7+ Kgspkf50zvfGiwLoIikqUR/KvStF2Q+zkIqWyAlz1QhI8iChK/qWuFRTRL4w42UrV0K/Kqpa/Ru xMzQhLMb2nFcWTJceGoVpJptd228HIEn5FCvZZ8TORlN2OfqP5NhJoZd5EkevIp0EKR/+s/adbA 9drsUXs+zOt4EkThKZh/xXJRgzN1pmuzykNcLoD+avPX2c5BUuxhLFhr1En7LrP2vGdM7qcy0MN FGF30XyrFqeGvRKI8ttLRiSFh+stSxcIMZt5So= X-Received: by 2002:a05:600c:8215:b0:485:4388:348b with SMTP id 5b1f17b1804b1-486feb5a3camr3504685e9.0.1773945712072; Thu, 19 Mar 2026 11:41:52 -0700 (PDT) Received: from Lord-Beerus.station (net-188-152-100-94.cust.dsl.teletu.it. [188.152.100.94]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f8b1fe65sm77289195e9.5.2026.03.19.11.41.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 11:41:51 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 02/11] arm64: dts: freescale: imx8mm-var-som: Align fsl,pins tables Date: Thu, 19 Mar 2026 19:40:22 +0100 Message-ID: <1bca84b1aea73bb7f542d48e1db9acf7d6cffaa4.1773944896.git.stefano.r@variscite.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli Reformat the fsl,pins tables in the i.MX8MM VAR-SOM device tree to use consistent column alignment across all pinctrl groups. Align the entries to match the formatting already used in the pinctrl_fec1 group, which contains the longest pin definitions, for improved readability and consistency. No functional changes intended. Signed-off-by: Stefano Radaelli --- v3->v4: -=20 v2->v3: -=20 v1->v2: -=20 .../boot/dts/freescale/imx8mm-var-som.dtsi | 170 +++++++++--------- 1 file changed, 85 insertions(+), 85 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64= /boot/dts/freescale/imx8mm-var-som.dtsi index b6560c03639e..da3c7332ec34 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi @@ -368,171 +368,171 @@ MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 =20 pinctrl_i2c1: i2c1grp { fsl,pins =3D < - MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 - MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 >; }; =20 pinctrl_i2c3: i2c3grp { fsl,pins =3D < - MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 - MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 + MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 + MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 >; }; =20 pinctrl_pmic: pmicirqgrp { fsl,pins =3D < - MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141 + MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141 >; }; =20 pinctrl_reg_eth_phy: regethphygrp { fsl,pins =3D < - MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x41 + MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x41 >; }; =20 pinctrl_restouch: restouchgrp { fsl,pins =3D < - MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x1c0 + MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x1c0 >; }; =20 pinctrl_uart2: uart2grp { fsl,pins =3D < - MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 - MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140 - MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140 - MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140 + MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 + MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140 + MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140 + MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140 >; }; =20 pinctrl_usdhc1: usdhc1grp { fsl,pins =3D < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 - MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 - MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 - MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 - MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190 + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0 + MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0 + MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0 + MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0 + MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0 >; }; =20 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins =3D < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 - MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4 - MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4 - MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4 - MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4 + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194 + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4 + MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4 + MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4 + MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4 + MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4 >; }; =20 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins =3D < - MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 - MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 - MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6 - MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6 - MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6 - MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6 + MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196 + MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6 + MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6 + MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6 + MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6 + MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6 >; }; =20 pinctrl_usdhc2_gpio: usdhc2gpiogrp { fsl,pins =3D < - MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xc1 + MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xc1 >; }; =20 pinctrl_usdhc2: usdhc2grp { fsl,pins =3D < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 >; }; =20 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins =3D < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 >; }; =20 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins =3D < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 - MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 - MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 - MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 - MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 - MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 >; }; =20 pinctrl_usdhc3: usdhc3grp { fsl,pins =3D < - MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 - MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 - MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 - MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 - MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 - MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 - MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 - MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 - MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 - MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 - MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 >; }; =20 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { fsl,pins =3D < - MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 - MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 - MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 - MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 - MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 - MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 - MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 - MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 - MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 - MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 - MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 >; }; =20 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { fsl,pins =3D < - MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 - MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 - MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 - MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 - MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 - MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 - MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 - MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 - MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 - MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 - MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 >; }; =20 pinctrl_wdog: wdoggrp { fsl,pins =3D < - MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166 + MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166 >; }; }; --=20 2.47.3 From nobody Fri Apr 3 04:37:59 2026 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1B923CD8BA for ; Thu, 19 Mar 2026 18:41:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945716; cv=none; b=YszuOfmU7P1VOge84ULlASThiMDVquEkQRDpVyUjGWrB6r7GItDFlccXNFpR5qPkgAhemiKKAR90MFWdkdX8cibQUTEpuV++T67dHOGhXclEP8eiJ7CBHsAoZB2vYx5n1aPs87SrUICj/E5EKFxF+Y1wMJiJriqcI/LJmuvYteQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945716; c=relaxed/simple; bh=hLLpvx4fWfaISY1k8IjnB/a57kf/mIgsX/Z73kiBW4I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lOoabxVflzpm2BnPcwP7152xt9A7SIfUcZyCJIMfDSP/qB4wORTrpVE99dQEbLitSCEhG9T2S5Oo/HPAVlqLdmhUkmDVVqmzc8ZdXgshK2OcHP+ps+Ed1Z0iBP1nHSo9+o731UmMxaOMFKq/PgBDTwYj7l9tZGxJaTTi1kgU/Vo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=b/vgmuuH; arc=none smtp.client-ip=209.85.128.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="b/vgmuuH" Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-486fd27754bso5099205e9.3 for ; Thu, 19 Mar 2026 11:41:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773945713; x=1774550513; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hsRjlpj8112gDvVfzgcWIwNrv5kQelDCvuBWHshniGY=; b=b/vgmuuH9uZ7O32u0GV2vESgICSow37OJsMaRFtEU8e/ATHT522FJA6cHLpiTBHO7b 1Q3DHpWymLzlndBr1xC8rHDFqOPzfD2ykwCv1PV+7sj2ZF58Msh9HOeg/f58SJlkl3eG PnTNOiWcuy8ICyT13DeLSO1oDHTakTh4E4onsHqN/6mzwak4i0xFD4mXjXqScJoL9vwN 2JmKHn8z/sjOtn/lTl1n/g4fR56KytE+LqwXBOstvkpV5nvojGHlBNo/XgBFRfD7PhI7 7e05CEeX4SCww/7aaM2mYspBt9i0fcanwqJTnhzWnxeRIuOua5PwhqImGyr3NCflI2Bk OOQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773945713; x=1774550513; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=hsRjlpj8112gDvVfzgcWIwNrv5kQelDCvuBWHshniGY=; b=IsqzzgavPJY+6UREcxdo1gaVZpopRS6LaPKklN+X+VzGVPsdW9+bH5ErPOfqckzorN qKrNdOr9LFI+31AaKWD17cgPSw1kzg1QI/pT3MuCOB1oQ6sQP3mJCTTk19gEfIEu1mtM rVxdGPHYB5XEU+YdZG4pSx6GfvrYZBPFmhXli4C8JsKMbGwfTRXSVYw+qCmqKUkVxyK6 VMk9y61/27wtR3C1dDElN1nLGwOo6yGwW6O7lsO7LxSsoIYtqidX38v3aDezVzJ3G7kr cGiWVkF91zODjk23Xc0ZeGLjLvdq99vli6QTMOYtbwQc830DJC01zXLlYL/nVEeQcDTn Sqiw== X-Gm-Message-State: AOJu0YyALLZrx+JVia0tfQ7C5TcQY/NFZJEQNpdmmQsBOukX3vwjyY/q YSkjNrSTa2o5H5iKqu/07JGwBD2v/kcjzm/f3vj8p2L/0rSVHpZLZWxucvW7Ow== X-Gm-Gg: ATEYQzzy83Fx0OnWp3k23ktAiFQNzNMvVGKTiOvhkC+i7Eoa6LTTGTJLEbDL73fWG6o 3RXIVOIFKQC2a8g0r3z/h5HeqRRr3DU9a/6QomWJ7IsHNmk1ZdllIrMwxvjIDB4O8mhILxJ/fnK 12CidvSck91/f+QuYV+S9w/FBUUUeP+kbqeYoAZUFpDEjAO0eOf9+BES8M42GvW9/OcnP2ABbYe G0H3b8ENhaG2navrDSb7Q4xtZXxrOfVPL7uiMcp7CPnQ5pgrNeHWEXPhC1bvgmFsVuuKGsJz6YU 8nUsPVyZHxrjUzciafdiFPzym4aVal9zMFiH8YTxz72NYUb0U2QJJVVwysq2sBsMCzZ8dQjSdOR PizX1mvra0LJixX3YzeIA66Qtv2p/qsLFitZz8IsTBw2XT3ZyH5kjrcRI4mV9fMZMHNIuVzmeKX eTKoU03ZsngJlhwDgvl0cgKSS/Ju3KXKZMthkQKDByRr8uxk8m68WKzWT4+LUAodl3P2i26D7lE jCcRX2e4en3ioeuj9bgA+tJDIBfu1+lZyy6SRo= X-Received: by 2002:a05:600c:4750:b0:485:3812:36dc with SMTP id 5b1f17b1804b1-486fedbd0bbmr2722735e9.9.1773945713116; Thu, 19 Mar 2026 11:41:53 -0700 (PDT) Received: from Lord-Beerus.station (net-188-152-100-94.cust.dsl.teletu.it. [188.152.100.94]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f8b1fe65sm77289195e9.5.2026.03.19.11.41.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 11:41:52 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 03/11] arm64: dts: freescale: imx8mm-var-som: Update FEC support with MaxLinear PHY Date: Thu, 19 Mar 2026 19:40:23 +0100 Message-ID: <7f26d7a437b76a60475fa5373803eeb2bea125b0.1773944896.git.stefano.r@variscite.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli Update the FEC Ethernet controller on the i.MX8MM VAR-SOM to match the latest SOM hardware revision using the integrated MaxLinear MXL86110 PHY. Add the PHY VDDIO supply regulator, adjust reset timings and add a pinctrl sleep state for low-power operation. The PHY LED signals originate on the SOM, but the actual LEDs are part of the carrier implementation (RJ45 connector). Move the LED configuration to the Symphony carrier device tree, matching the evaluation board LED wiring. Wake-on-LAN via magic packet is not supported at the VAR-SOM level and is therefore not enabled in the SOM device tree nor in the official evaluation carrier board configuration (symphony). Designs requiring WoL support may enable it in their own carrier-specific device trees if properly integrated at the hardware level. Signed-off-by: Stefano Radaelli --- v3->v4: - Remove wrong enet reset gpio hog v2->v3: -=20 v1->v2: - Moved phy LED configurations to symphony dts .../dts/freescale/imx8mm-var-som-symphony.dts | 20 +++++++++- .../boot/dts/freescale/imx8mm-var-som.dtsi | 39 +++++++++++++++++-- 2 files changed, 55 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/ar= ch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts index 819707e6f3bf..9f4e004f0a37 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts @@ -5,6 +5,7 @@ =20 /dts-v1/; =20 +#include #include "imx8mm-var-som.dtsi" =20 / { @@ -71,7 +72,24 @@ led { }; =20 ðphy { - reset-gpios =3D <&pca9534 5 GPIO_ACTIVE_HIGH>; + leds { + #address-cells =3D <1>; + #size-cells =3D <0>; + + led@0 { + reg =3D <0>; + color =3D ; + function =3D LED_FUNCTION_LAN; + linux,default-trigger =3D "netdev"; + }; + + led@1 { + reg =3D <1>; + color =3D ; + function =3D LED_FUNCTION_LAN; + linux,default-trigger =3D "netdev"; + }; + }; }; =20 &i2c2 { diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64= /boot/dts/freescale/imx8mm-var-som.dtsi index da3c7332ec34..24924ee1e8c7 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi @@ -24,6 +24,13 @@ reg_eth_phy: regulator-eth-phy { gpio =3D <&gpio2 9 GPIO_ACTIVE_HIGH>; enable-active-high; }; + + reg_phy_vddio: regulator-phy-vddio { + compatible =3D "regulator-fixed"; + regulator-name =3D "vddio-1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; }; =20 &A53_0 { @@ -99,12 +106,17 @@ touchscreen@0 { }; =20 &fec1 { - pinctrl-names =3D "default"; + pinctrl-names =3D "default", "sleep"; pinctrl-0 =3D <&pinctrl_fec1>; + pinctrl-1 =3D <&pinctrl_fec1_sleep>; + /* + * The required RGMII TX and RX 2ns delays are implemented directly + * in hardware via passive delay elements on the SOM PCB. + * No delay configuration is needed in software via PHY driver. + */ phy-mode =3D "rgmii"; phy-handle =3D <ðphy>; phy-supply =3D <®_eth_phy>; - fsl,magic-packet; status =3D "okay"; =20 mdio { @@ -116,7 +128,8 @@ ethphy: ethernet-phy@4 { reg =3D <4>; reset-gpios =3D <&gpio1 9 GPIO_ACTIVE_LOW>; reset-assert-us =3D <10000>; - reset-deassert-us =3D <10000>; + reset-deassert-us =3D <100000>; + vddio-supply =3D <®_phy_vddio>; }; }; }; @@ -366,6 +379,26 @@ MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 >; }; =20 + pinctrl_fec1_sleep: fec1sleepgrp { + fsl,pins =3D < + MX8MM_IOMUXC_ENET_MDC_GPIO1_IO16 0x120 + MX8MM_IOMUXC_ENET_MDIO_GPIO1_IO17 0x120 + MX8MM_IOMUXC_ENET_TD3_GPIO1_IO18 0x120 + MX8MM_IOMUXC_ENET_TD2_GPIO1_IO19 0x120 + MX8MM_IOMUXC_ENET_TD1_GPIO1_IO20 0x120 + MX8MM_IOMUXC_ENET_TD0_GPIO1_IO21 0x120 + MX8MM_IOMUXC_ENET_RD3_GPIO1_IO29 0x120 + MX8MM_IOMUXC_ENET_RD2_GPIO1_IO28 0x120 + MX8MM_IOMUXC_ENET_RD1_GPIO1_IO27 0x120 + MX8MM_IOMUXC_ENET_RD0_GPIO1_IO26 0x120 + MX8MM_IOMUXC_ENET_TXC_GPIO1_IO23 0x120 + MX8MM_IOMUXC_ENET_RXC_GPIO1_IO25 0x120 + MX8MM_IOMUXC_ENET_RX_CTL_GPIO1_IO24 0x120 + MX8MM_IOMUXC_ENET_TX_CTL_GPIO1_IO22 0x120 + MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x100 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins =3D < MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 --=20 2.47.3 From nobody Fri Apr 3 04:37:59 2026 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D21313E717C for ; Thu, 19 Mar 2026 18:41:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945718; cv=none; b=aadA3RBo/kVlWgAfefUXMddquKP7EBHKpmJ3KBykkj+9uMlcJNNI9HCvG1r/JV6BysJUcy9NY9K2y2aLzlHiKT/Y3g+RnFVmQDEa3ejQJVZPv6B7aha0M3s2cowqiFWmOU+W48rthCU3KNZCQx2D+Fxn0H9TKmfBAPFTplXEtew= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945718; c=relaxed/simple; bh=Twq8/Sdp1QWeKkMjyKbb+cbboPx1ZLUsDa9RZZ6o99I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=b8/ZS84GntdSqMQ7WbKQQIztAhz76yf5OB5zp8HUU34/lxbOKyiofjX7qmCLAAW1nn8sHyesLqVbpwSwqRUPTQ7s15eswlKl+iToYed2eKBjptAq01ZcKvOJYh+EURNWagzt07OZU7YX4JUT99yZCGNKVwPp9SjbtXlQGP8QzfA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=FHcxQzmy; arc=none smtp.client-ip=209.85.128.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="FHcxQzmy" Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-486fd5360d4so6862425e9.1 for ; Thu, 19 Mar 2026 11:41:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773945714; x=1774550514; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jRuhOxXG+BRUmsxT9+NWnppBH4O76RAmFQCZtJj6nds=; b=FHcxQzmy4dES9Ocbx95Wx+qcGcbhbQAeMmOan1h+eihkYIqxiylVOY5WL9i2DwxtfN 87XADYcNHN5ik0URrO49oHiJjb90+vDNXzyd+5gSsQdm/S5EWc4NgKHe+AFrQ3A6kxT8 tF/u8ROWHyRMC0iUlO0w1C4p5ePRMubqqSB0EbBmWO8jx3ONhYCsRarGgjtL9NKEzP/2 ipetvvviwNMVTxsW8WlsxKd6eGZ+qObewDibuL4sYrgUb5aRwtu/QL92+1u4FwyCIu2z 0ptDqCwLo9PveBlrgeBzmsSIFJ8dMn+XWk7XY4evKjS8dMNKot5yrBTowll5hju/hUcc 3hAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773945714; x=1774550514; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=jRuhOxXG+BRUmsxT9+NWnppBH4O76RAmFQCZtJj6nds=; b=DTZ1pzOiwcSRI9Bi9+8v7fV9Fhqwu2jx4n7U8XhJqo4zHoQ7gCdWhcmLsNwNvPF6fv jqKEvcR1RVNXY/KEhoTBMs+NCbyKVPAV+hFKHhXtwkgEZvo60p8ZZR/l6YTFFAlEUYne 4a07qiX2XT6g1HsBcuQfQiC2bOAgDIFk+dYfMieNol2G2LZRb9VVnt5beXAfGBCeme5F rFyezqfyhb+zI4POoJQfGdIcPTK4I5sbwROGEbpH+dzWCiUulR08/R8nDpqG+LwvYC3v 4/QRi71Q0clmLN2pCwIioSjyeOa6++YtexzYht+H+dNb+FrjNZUoGW4MTd+3nwmWa589 ygyQ== X-Gm-Message-State: AOJu0YznXuUH5DufjtzksCivse/qNKK4z38dP+NcUIUFp92hA82jgCG/ jOoHhGCLN4J+jMwH4G55GONtqkpHj3DhFZw7OjZBxfCTvsWS5QMrLm26+4dCPw== X-Gm-Gg: ATEYQzzVBVXWub4jg7aBO12Sdbh3e+OC0Pf+jWognfQKLNtE3ByIbM3a9cMdqaJ+Lbl IKM72KJNG7qEV24kX5PSMd9abEMvmAs2ZoL7PQ5rNWChvMxnEXjGdX5mNTMRn0/lxY59Cx0rd+S x1Jg9bSmJyi1wKt426kvDDGaSRdEDoLKyvxvultMPLmBJm1S/frf8z4unAsA6Fr1eB3N1jx+kAq IYeXTZMbDoyNSDz3vs41Va017AiNq8VGONbqyCARUdN7lPvMM/N4c8PtkAEnEbUSx46TBoHebfI /L87nPqPEBdSOZ+9UxYvnYaT0PoQ8A17oI21VgJc2iNEqdSqau6dEVflcFjiZqAExF6ou4vtnPL 4iKkHTYEPI2ZDQK/ys0wkN75tXrQcysnrbODwJ+tCatYDy4KnFgrAoJ/uBDVsRoCopX1IJ/zxvV 0BDr62DHR7zzTJMdVbodMhlWUGtS4lGHDNoFPo4HnspgjiWINuyGPTW5bH7K8lZKWz5fyFVRsVX SNp9wioFv6gfz+kqlC0lSi3v2xZpfZgXYAS8aY= X-Received: by 2002:a05:600c:c16e:b0:485:4eaf:eb53 with SMTP id 5b1f17b1804b1-486fee0f975mr2351435e9.19.1773945714065; Thu, 19 Mar 2026 11:41:54 -0700 (PDT) Received: from Lord-Beerus.station (net-188-152-100-94.cust.dsl.teletu.it. [188.152.100.94]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f8b1fe65sm77289195e9.5.2026.03.19.11.41.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 11:41:53 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 04/11] arm64: dts: freescale: imx8mm-var-som: Add support for WM8904 audio codec Date: Thu, 19 Mar 2026 19:40:24 +0100 Message-ID: <71a37de0ca214ac4ed1200479dadc25eb7820ffd.1773944896.git.stefano.r@variscite.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli The VAR-SOM-MX8MM can integrate the WM8904, a high-performance ultra-low-power stereo codec optimized for portable audio applications. Add the WM8904 device to the appropriate I2C bus, enable the SAI peripheral, and introduce the sound node to expose the sound card to the system. Signed-off-by: Stefano Radaelli --- v3->v4: - Remove "This patch" from commit messages v2->v3: -=20 v1->v2: -=20 .../boot/dts/freescale/imx8mm-var-som.dtsi | 100 +++++++++++++++++- 1 file changed, 97 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64= /boot/dts/freescale/imx8mm-var-som.dtsi index 24924ee1e8c7..7cedef8add32 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi @@ -14,6 +14,14 @@ memory@40000000 { reg =3D <0x0 0x40000000 0 0x80000000>; }; =20 + reg_audio_supply: regulator-3p3v { + compatible =3D "regulator-fixed"; + regulator-name =3D "wm8904-supply"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + }; + reg_eth_phy: regulator-eth-phy { compatible =3D "regulator-fixed"; pinctrl-names =3D "default"; @@ -31,6 +39,34 @@ reg_phy_vddio: regulator-phy-vddio { regulator-min-microvolt =3D <1800000>; regulator-max-microvolt =3D <1800000>; }; + + sound { + compatible =3D "simple-audio-card"; + simple-audio-card,bitclock-master =3D <&codec_dai>; + simple-audio-card,format =3D "i2s"; + simple-audio-card,frame-master =3D <&codec_dai>; + simple-audio-card,mclk-fs =3D <256>; + simple-audio-card,name =3D "wm8904-audio"; + simple-audio-card,routing =3D + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "IN1L", "Microphone Jack", + "IN1R", "Microphone Jack"; + simple-audio-card,widgets =3D + "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + codec_dai: simple-audio-card,codec { + sound-dai =3D <&wm8904>; + }; + + simple-audio-card,cpu { + sound-dai =3D <&sai5>; + }; + }; }; =20 &A53_0 { @@ -257,18 +293,57 @@ ldo6_reg: LDO6 { =20 &i2c3 { clock-frequency =3D <400000>; - pinctrl-names =3D "default"; + pinctrl-names =3D "default", "gpio"; pinctrl-0 =3D <&pinctrl_i2c3>; + pinctrl-1 =3D <&pinctrl_i2c3_gpio>; + scl-gpios =3D <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status =3D "okay"; =20 - /* TODO: configure audio, as of now just put a placeholder */ wm8904: codec@1a { compatible =3D "wlf,wm8904"; reg =3D <0x1a>; - status =3D "disabled"; + #sound-dai-cells =3D <0>; + clocks =3D <&clk IMX8MM_CLK_SAI5_ROOT>; + clock-names =3D "mclk"; + AVDD-supply =3D <&ldo5_reg>; + CPVDD-supply =3D <&ldo5_reg>; + DBVDD-supply =3D <®_audio_supply>; + DCVDD-supply =3D <&ldo5_reg>; + MICVDD-supply =3D <&ldo5_reg>; + wlf,drc-cfg-names =3D "default", "peaklimiter", "tradition", + "soft", "music"; + /* + * Config registers per name, respectively: + * KNEE_IP =3D 0, KNEE_OP =3D 0, HI_COMP =3D 1, LO_COMP =3D 1 + * KNEE_IP =3D -24, KNEE_OP =3D -6, HI_COMP =3D 1/4, LO_COMP =3D 1 + * KNEE_IP =3D -42, KNEE_OP =3D -3, HI_COMP =3D 0, LO_COMP =3D 1 + * KNEE_IP =3D -45, KNEE_OP =3D -9, HI_COMP =3D 1/8, LO_COMP =3D 1 + * KNEE_IP =3D -30, KNEE_OP =3D -10.5, HI_COMP =3D 1/4, LO_COMP =3D 1 + */ + wlf,drc-cfg-regs =3D /bits/ 16 <0x01af 0x3248 0x0000 0x0000>, + /bits/ 16 <0x04af 0x324b 0x0010 0x0408>, + /bits/ 16 <0x04af 0x324b 0x0028 0x0704>, + /bits/ 16 <0x04af 0x324b 0x0018 0x078c>, + /bits/ 16 <0x04af 0x324b 0x0010 0x050e>; + /* GPIO1 =3D DMIC_CLK, don't touch others */ + wlf,gpio-cfg =3D <0x0018>, <0xffff>, <0xffff>, <0xffff>; }; }; =20 +&sai5 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_sai5>; + assigned-clocks =3D <&clk IMX8MM_CLK_SAI5>; + assigned-clock-parents =3D <&clk IMX8MM_AUDIO_PLL1_OUT>; + assigned-clock-rates =3D <1536000>; + #sound-dai-cells =3D <0>; + dmas =3D <&sdma2 8 25 0>, <&sdma2 9 25 0>; + dma-names =3D "rx", "tx"; + fsl,sai-mclk-direction-output; + status =3D "okay"; +}; + &snvs_pwrkey { status =3D "okay"; }; @@ -413,6 +488,13 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 >; }; =20 + pinctrl_i2c3_gpio: i2c3gpiogrp { + fsl,pins =3D < + MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x1c3 + MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x1c3 + >; + }; + pinctrl_pmic: pmicirqgrp { fsl,pins =3D < MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141 @@ -431,6 +513,18 @@ MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x1c0 >; }; =20 + pinctrl_sai5: sai5grp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0xd6 + MX8MM_IOMUXC_SAI5_RXFS_SAI5_RX_SYNC 0xd6 + MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0xd6 + MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 0xd6 + MX8MM_IOMUXC_SAI5_RXC_SAI5_RX_BCLK 0xd6 + MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0xd6 + MX8MM_IOMUXC_SAI5_MCLK_SAI5_MCLK 0xd6 + >; + }; + pinctrl_uart2: uart2grp { fsl,pins =3D < MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 --=20 2.47.3 From nobody Fri Apr 3 04:37:59 2026 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 108A739A064 for ; Thu, 19 Mar 2026 18:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945719; cv=none; b=CoyqVwmadT8yaWjGQXS4g2F1s0SQmTVMohhhHIHm5OxUnZec3K99TFK+Bwk0n3mxY80UQQfRsRWl/VMqyrEGLYj6AzdyhwLWk8Gz6c19YMhSg6wz4cUK/tKylvuPCh3Z7uuvIm2fJ3BxklhunMtyZQ0vPLYGwqzqjOu4O17xnFk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945719; c=relaxed/simple; bh=fXWd+8nqbS8G10mImlkOZb66wJSrWdKLh/J3OueEbeY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kcaxTelu9H76dybG8K27rx4eijfT0ASglRq7tlgPlUOVcsvgtGkdJkn64I5H7i2GGzAYpA1WDchWqDQwjKegtYXdTF4cLVJlUAfQ9KRCZtoej3z1oSAQDNZEnLDzC3hBg+tQzpET6rtAtHRv3ASlDaI53N2oAt//Y/pg5uVmrmY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=UGXI/K/z; arc=none smtp.client-ip=209.85.221.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="UGXI/K/z" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-439bc14dcf4so1656606f8f.1 for ; Thu, 19 Mar 2026 11:41:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773945715; x=1774550515; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ym91XLgRLRXjLiChYg+mfli7NOG6LGBLaybiV2T541s=; b=UGXI/K/z9/42hOzqT7ryfQ2QeP5iuO4vxT88ndjLkc4htvkIthDtgJn34eZSNwIjQK m2rqukaheyIIA4XKD05980kSQ1T8PFhYG2Xa8CsxB6WdC9Cpn4WQ2XIGyWoUn1OLPWXn 3LwsAPOrrbOHnT27l5EnFfjIiWzDhqKv3MZg7Sz0d/4dxCUmi+GLT2C9ntZPIzc8u6ON 0gNapWfGgDd42QtPgZyvBFjaGLrMm4atNXF/D5U1c9wWnhPO2zsxUfAijVRNsz6P+LsU c/4V+0Fm7zxoeZjrM5IB8P07GUoDEEeRZZakxSOhVDd1pXIV8teJJeCRlK9+JgMUQUNz 574A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773945715; x=1774550515; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ym91XLgRLRXjLiChYg+mfli7NOG6LGBLaybiV2T541s=; b=GdQpNZfxDTA65TpuSN0F6Deqjh9iLQrpOsDqR0KSk/WaTlIF/Hxjk8m8QrRCtPnn5C OGITXbhg39Md73KeY5L9QnRsHr7fCfVgEIxjJbELX55eOT6Uk31Ntc5h5WrqoZ2DUdLq 61lx8m8z0akrCRzk94yMpTtIv+CpkXYozNV/8QFcYDAerWo2zWxAbF6G3mUIWnvOHniD CsO0A3SiTtx5G36XFbCHXvv6fRA+pB5U6xdJfvOBUKELioqUMj1fmufcS8foUMMQz+A0 HAAGEbAV6VXK5MMryI/KNpwDktdzlu7Kjkn6DI5m1ttmUuJvlsjxITE/SzWKnYzUUc7Z T5+Q== X-Gm-Message-State: AOJu0YztgtXj2bakh4S3zeEO2ej2N9/pi3R/ITlkkXzD1Wdg9JtZeAR3 xHYOfSnyz6L1lvZ3otP54R1Yy3PkORwZ32Mu7Xc1qUYo11ISEBFVPxeMRCChbg== X-Gm-Gg: ATEYQzxPEmTlNb0jF1OlDsTov0aEf92PnqghaDnP9hvbkHJGyLqjmWh4x+jb0LqD6ra JkV5IT7Bm4jY3Jf11IUI0rP3BRFcQS++FtzdzPiVedTeKbtG4GHJepWWoF4Ww1mWJx3NK9GRcAP Wp7TOjkKwv7tKP6HLcQh1upcTvU1BqQKsraEKTvszGBSQ6FLfI9JVPPXUiAuc4anULmrU70hXz5 andPArCorbTDcbDV0Y8/8qvrCxwPGe0QX52zNJdK00WGl7LxF7FjwmIby/2Dzn7wA76rPFjlzq5 qUer/ktcfn5uJAdQlUXmaTXH52RVya3IjHb0wrXNUffXAZgx2RXUM78NsKFZbcbesOLfF4Q+Vtd lr9J/nHgvo4Va6F/L41qVpO/3oScsm7J5lh0EBRcvHI/STZPkiPSnbmdaJKkfm8a0MQu5Y6Kk84 YgZyCQzG/w0rg/3nIWYIoZRD2DfCqrAuk4OFKYyzbwpXPArrvd2iVV5Bc8BVFARStDivOJD2fW8 RtxldJeSPrSiEWoN+QAlSbOiyqM/fmVBf4gqGPnRg5RzvOeMQ== X-Received: by 2002:a05:600c:1e0d:b0:485:3cef:d6ea with SMTP id 5b1f17b1804b1-486fe8efb0amr6997545e9.13.1773945715151; Thu, 19 Mar 2026 11:41:55 -0700 (PDT) Received: from Lord-Beerus.station (net-188-152-100-94.cust.dsl.teletu.it. [188.152.100.94]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f8b1fe65sm77289195e9.5.2026.03.19.11.41.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 11:41:54 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 05/11] arm64: dts: freescale: imx8mm-var-som: Add MCP251xFD CAN controller Date: Thu, 19 Mar 2026 19:40:25 +0100 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli Add support for the Microchip MCP251xFD CAN-FD controller connected to the SPI bus on the i.MX8MM VAR-SOM. The controller uses a 40 MHz external oscillator and requires an interrupt line and a dedicated RX interrupt GPIO. Add the fixed clock, the MCP251xFD device node with the required properties, and the corresponding pinctrl configuration. Signed-off-by: Stefano Radaelli --- v3->v4: - Remove "This patch" from commit messages v2->v3: -=20 v1->v2: -=20 .../boot/dts/freescale/imx8mm-var-som.dtsi | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64= /boot/dts/freescale/imx8mm-var-som.dtsi index 7cedef8add32..21a4d87c0e26 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi @@ -14,6 +14,13 @@ memory@40000000 { reg =3D <0x0 0x40000000 0 0x80000000>; }; =20 + clk40m: oscillator { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <40000000>; + clock-output-names =3D "can_osc"; + }; + reg_audio_supply: regulator-3p3v { compatible =3D "regulator-fixed"; regulator-name =3D "wm8904-supply"; @@ -139,6 +146,19 @@ touchscreen@0 { ti,keep-vref-on; wakeup-source; }; + + /* CAN controller */ + can0: can@1 { + compatible =3D "microchip,mcp251xfd"; + reg =3D <1>; + clocks =3D <&clk40m>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_can>; + interrupt-parent =3D <&gpio1>; + interrupts =3D <5 IRQ_TYPE_LEVEL_LOW>; + microchip,rx-int-gpios =3D <&gpio2 12 GPIO_ACTIVE_LOW>; + spi-max-frequency =3D <20000000>; + }; }; =20 &fec1 { @@ -424,6 +444,13 @@ &wdog1 { }; =20 &iomuxc { + pinctrl_can: cangrp { + fsl,pins =3D < + MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x16 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x16 + >; + }; + pinctrl_ecspi1: ecspi1grp { fsl,pins =3D < MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x13 --=20 2.47.3 From nobody Fri Apr 3 04:37:59 2026 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12BED3F54BB for ; Thu, 19 Mar 2026 18:41:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945720; cv=none; b=g1Vu3/Oc3my8e6+SqlqS1CYRV0fKlaoAfzx3HbxO0ajLADwE2awTcSMdlp19ZTBL34i62G0+rOH9igzQy6LW/S3V0irPl+mSrnk7UNFln2eWDfRpd3C67yDJSvvUKNgnQ1DHFhkP/bCvGYEhWQYsy/ui5c3z4XoAggmm4Ue1B5w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945720; c=relaxed/simple; bh=j3OTduS6qdtjozm1GQe+8s0DcoESfABCWaPJ2XsNvtY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CIUThhG1M/QuCPh24P7E/J1uYRgLeNgrUqewqAFjJ5z2kyk6kR6/ULUUMmsJfIU2GaUcwnxPrQQZWobtOJXGVemw1cCdMiVurt9r73G5xE9i/PjUD1qgEzn+158j/0HIImkP80GSbPKb4t82Y3xNHl+S2fJ5mDQ7lVzgowirv9Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=StMokU0Q; arc=none smtp.client-ip=209.85.128.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="StMokU0Q" Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-4852a9c6309so13042105e9.0 for ; Thu, 19 Mar 2026 11:41:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773945716; x=1774550516; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OUP3CmmT0cKyjmjrALm9nCkOSIQbk/SYoJc7MZ/IyOw=; b=StMokU0QvND6rX6WAh4zcC3/2IOJ4vSrS84p2j3nYm2enxG7/j8xPme1yxXOiliZ2W 28vIYJn45KiVKpyP5ku8R5X7G1diljMnHfBVFAwEhxJM3LHWOhDIYQ61mx4r2KErlXRy /fzRz5ZA3b17GdruY9zJJY8b2Y/HDify+Lbi/Ezdj8TkquoeI7V1rbQR5LZDNw3K8Rwz TqrX0BFN4zzDey0bjB+c4Sctnj3J4wTOqWXO0UqfsUVLKhETenEiphGhAr/5zpV1y5NI jiW/5A4ER32whRWeASH8MHkc2BXveUdTWF2gBOlsIRXLOafOH0NAyzVTZRfxva3RRa3+ LGPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773945716; x=1774550516; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=OUP3CmmT0cKyjmjrALm9nCkOSIQbk/SYoJc7MZ/IyOw=; b=ZT5hanplPORZi2rMSGyLl7tzVs/wEdDwrZVwB/x7UOIhjiSj+WLOFjZOBRUAHddi2p g9b5lHZZCjhMDmwHxKOhpWo7DQvT0awNOQsaWf6VMFHlVFEH78y+dR3kpHQaTEe3DMvY QuyOMa6Qf6FYOYlUKLAZrNtbt8bc0HnNlNVPulRryhFJ7VRWnILR08bIEpmBgLi8LZ9X UKLSy7VJCaiuwyqRS3X+b817tk6m8C3yku8qBhKGdupkXkK46aTGFqLKMXXD1Cw+NgTv PfXlM+k4mykCtFScAN7dWQBakPhsrFkWmxtg+1V8597XWUA+c8uE4GZhq94Rb0VM+F0A eFQw== X-Gm-Message-State: AOJu0YwzB7c8iDCNph9AnjRmaI9Xm1Rm0V2bnQBxkpRUeGfcabvZPHLl djsStDlF/7g/7ZMQGZxCzvI8CJi0dFzjN3HSfRSEvQMYenmNEQjHZB/3bGk8oQ== X-Gm-Gg: ATEYQzyeik9El0IPM6h0EV5f1cePurGXja443cz4ImAlw5wqSoPHhgtLUsikubyjO12 OWEm+z+Eleml8I+3XbaEU7jaGC+iLAUnJAYXsbsAScXC8ibqx6y9S38NAqFFw0oupIEyqpqMph7 T7K3wf+MeV6Pm7FJ0OmzPgdhIPCT/UmyhFFDwfKOupG0PNw/x6IRzng00ralL5szOoQVahwgC21 xTp97z9Gyk2jwpvNkn8H8wRLg7G7HW5NCofEQCZVXcPdu4FEgRvn7qzfJYuHlOsx8hN2nBisVTK AVb3a/yvNkJNPHMUffE5m3bKvrACIAE6k24dppaXncVqbVUFSOBPj2RN5jYT2T9ZhAfP6EAnY+3 D/gx4YnRwnFFOXQNlp/CaKToYj/dury5VPqKONA+X79WBzmcevj6tpk7N6aF9KbwByuBif/n2Jk 4gce4j79CQCt6+1Ux4RyMcNldiwDKXNm0x4YwNz4LXAFFi4qUmq22tfraUshA3mgQB/o2qaVk6W 2lLm/pw0PryYj4nqTYsN7id5r2JtJufJv52EMU= X-Received: by 2002:a05:600c:8b0a:b0:485:4136:99a8 with SMTP id 5b1f17b1804b1-486fee0fb9emr2226175e9.22.1773945716215; Thu, 19 Mar 2026 11:41:56 -0700 (PDT) Received: from Lord-Beerus.station (net-188-152-100-94.cust.dsl.teletu.it. [188.152.100.94]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f8b1fe65sm77289195e9.5.2026.03.19.11.41.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 11:41:55 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 06/11] arm64: dts: freescale: imx8mm-var-som: Rework WiFi/BT and add legacy dts Date: Thu, 19 Mar 2026 19:40:26 +0100 Message-ID: <9dfc7925f0acf5a655793eada5b1302b99d1407b.1773944896.git.stefano.r@variscite.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli The VAR-SOM-MX8MM currently integrates the NXP IW61x wireless module, providing WiFi over SDIO and Bluetooth over UART. Move the wireless module configuration out of the base imx8mm-var-som.dtsi and provide dedicated variant includes. The IW61x configuration is moved to imx8mm-var-som-wifi-bt-iw61x.dtsi and used by the Symphony evaluation board device tree. A separate imx8mm-var-som-wifi-brcm-legacy.dtsi include is added to keep the configuration for the legacy Broadcom SDIO WiFi module used on earlier SOM revisions. To preserve compatibility with older SOM revisions, add a separate imx8mm-var-som-symphony-legacy.dtb, which disables the IW61x setup and applies the Broadcom-specific configuration. The Broadcom-based SOM revision is no longer in production, but support is kept for existing users. Signed-off-by: Stefano Radaelli --- v3->v4: - Add symphony legacy dtb to use old brcm wifi module v2->v3: -=20 v1->v2: - Added Wifi/BT dtsi variants for both iw61x and brcm legacy modules arch/arm64/boot/dts/freescale/Makefile | 1 + .../imx8mm-var-som-symphony-legacy.dts | 19 ++++++++ .../dts/freescale/imx8mm-var-som-symphony.dts | 1 + .../imx8mm-var-som-wifi-brcm-legacy.dtsi | 12 +++++ .../imx8mm-var-som-wifi-bt-iw61x.dtsi | 45 +++++++++++++++++++ .../boot/dts/freescale/imx8mm-var-som.dtsi | 6 --- 6 files changed, 78 insertions(+), 6 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony-l= egacy.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-var-som-wifi-brcm-= legacy.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-var-som-wifi-bt-iw= 61x.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index bae24b53bce6..420b434bcd3a 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -161,6 +161,7 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-tqma8mqml-mba8mx.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-tx8m-1610-moduline-iv-306-d.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-tx8m-1610-moduline-mini-111.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-var-som-symphony.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-var-som-symphony-legacy.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-venice-gw71xx-0x.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-venice-gw72xx-0x.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-venice-gw73xx-0x.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony-legacy.d= ts b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony-legacy.dts new file mode 100644 index 000000000000..faa707402de9 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony-legacy.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2026 Variscite Ltd. + */ + +#include "imx8mm-var-som-symphony.dts" +#include "imx8mm-var-som-wifi-brcm-legacy.dtsi" + +&bluetooth_iw61x { + status =3D "disabled"; +}; + +&iw61x_pwrseq { + status =3D "disabled"; +}; + +&usdhc1 { + /delete-property/ mmc-pwrseq; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/ar= ch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts index 9f4e004f0a37..2b608470da8e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts @@ -7,6 +7,7 @@ =20 #include #include "imx8mm-var-som.dtsi" +#include "imx8mm-var-som-wifi-bt-iw61x.dtsi" =20 / { model =3D "Variscite VAR-SOM-MX8MM Symphony evaluation board"; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-wifi-brcm-legacy.= dtsi b/arch/arm64/boot/dts/freescale/imx8mm-var-som-wifi-brcm-legacy.dtsi new file mode 100644 index 000000000000..f44a846ea6f9 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-wifi-brcm-legacy.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2026 Variscite Ltd. + */ + +/* WIFI */ +&usdhc1 { + brcmf: wifi@1 { + reg =3D <1>; + compatible =3D "brcm,bcm4329-fmac"; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-wifi-bt-iw61x.dts= i b/arch/arm64/boot/dts/freescale/imx8mm-var-som-wifi-bt-iw61x.dtsi new file mode 100644 index 000000000000..15990d141d2a --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-wifi-bt-iw61x.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2026 Variscite Ltd. + */ + +/ { + iw61x_pwrseq: wifi-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + post-power-on-delay-ms =3D <100>; + power-off-delay-us =3D <10000>; + reset-gpios =3D <&gpio2 10 GPIO_ACTIVE_LOW>, /* WIFI_RESET */ + <&gpio2 20 GPIO_ACTIVE_LOW>; /* WIFI_PWR_EN */ + }; +}; + +&uart2 { + pinctrl-0 =3D <&pinctrl_uart2>, <&pinctrl_bt>; + + bluetooth_iw61x: bluetooth { + compatible =3D "nxp,88w8987-bt"; + }; +}; + +/* WIFI */ +&usdhc1 { + pinctrl-0 =3D <&pinctrl_usdhc1>, <&pinctrl_wifi>; + pinctrl-1 =3D <&pinctrl_usdhc1_100mhz>, <&pinctrl_wifi>; + pinctrl-2 =3D <&pinctrl_usdhc1_200mhz>, <&pinctrl_wifi>; + mmc-pwrseq =3D <&iw61x_pwrseq>; +}; + +&iomuxc { + pinctrl_bt: bluetoothgrp { + fsl,pins =3D < + MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0xc1 + >; + }; + + pinctrl_wifi: wifigrp { + fsl,pins =3D < + MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 0x140 + MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0xc1 + >; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64= /boot/dts/freescale/imx8mm-var-som.dtsi index 21a4d87c0e26..c37badc4cf27 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi @@ -390,7 +390,6 @@ &usbotg2 { status =3D "okay"; }; =20 -/* WIFI */ &usdhc1 { #address-cells =3D <1>; #size-cells =3D <0>; @@ -402,11 +401,6 @@ &usdhc1 { non-removable; keep-power-in-suspend; status =3D "okay"; - - brcmf: wifi@1 { - reg =3D <1>; - compatible =3D "brcm,bcm4329-fmac"; - }; }; =20 /* SD */ --=20 2.47.3 From nobody Fri Apr 3 04:37:59 2026 Received: from mail-wm1-f45.google.com (mail-wm1-f45.google.com [209.85.128.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FA0E3F7870 for ; Thu, 19 Mar 2026 18:41:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945721; cv=none; b=it6/1yHfRPJ33OsSUQzDSiL8bstB5ElolNPTq4oVEThYa3RUJJvZSFi1KrIdOuWlqqwqR1SUDkecOwSfhrb5ZXPiAH2pOwkUw3j46rlPqukGaySl2i1qV4MqYHRGbY47yz79VH+WcC4RC4iE5O2mSLe2cIOi88d2QH6c4/n8lwQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945721; c=relaxed/simple; bh=BM2gvpse60F5Afr+VPCPLl+VC+QrAszo9XAnzuXymqQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=arXuDp8YhZH3ueXCT8GsdlmErGm70sBOy0GnkRKQevnA7uUBhYNborR9jM3ZkgfjiV0sjX1rbcx+Y+zaRPBPdQq7wQJZ3d0ATjJiF/BgtnlcuqTHWTAtnQ+uINQlXkvkKheQ4Klyn9bHTIO5Ezw+dY1HB9yBQJL+ICXjs4FxU0g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=DJMKCRyQ; arc=none smtp.client-ip=209.85.128.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="DJMKCRyQ" Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48374014a77so10512785e9.3 for ; Thu, 19 Mar 2026 11:41:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773945718; x=1774550518; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=s8vxnjwZOXE7HlXyNRQ9zVADAHm3YyuOJfN0fYbFcx0=; b=DJMKCRyQd/zWRRqeH52d8jmdEUVVhXlUFFM39tXiopoliWTzowbbSDnhNpvI9XsCWe BIAOkJCuVaslHCUqVThXoZonBwQU2zIvvxVMqYjdDnFKjOUlrR6dGwbpyglV/KUiCsjI 5pBdDXbfX3vLptqsXyTZvOLRsKpkifBpWFhznd3aI/5iooFKo7snopmdL+9vs6NeIBFg JDEE7f4kpZpqPbNcG5YkD8s5vss2sDpdTwoQOC3YuiJyZJ1xIDkqS/DO+qRi8jtmnJNu y8q2om8EsQC+EvAvk0dRkHUkv0ZoPnGak5Ja8Vu7b5Bv6gCEuqUr5WJv7comEQUwTpAo WO/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773945718; x=1774550518; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=s8vxnjwZOXE7HlXyNRQ9zVADAHm3YyuOJfN0fYbFcx0=; b=DcowVvXzJVusLVQA36y8+F/Q7NaswNbqIr9vHnUY9lpbyMZkV9GFDjBI2+dTTGxNbl vuKzjV0U2K807FZ6loHcWjDjkDeOINSyt0XAny+R9UwaZYugjlzd5k/7xznCbybSHg4r 4YQyGwx9q5S461p9ikU3YD9Uq62KMejSipaTWjlOQtn1VPQnDGmf7UWpRtkbyWLpyGP0 xLyA+rFJrGzNbBbxqZAAPMWJuzc1kRhNIJSVxaaJc/LO4LOWG5QnK4FMV9SHbbbnjgXc PyFdsmPEnU86T/b6DH2fvJSv8e2PJPjNFPaMKk1XGZtOfMwTBTqflHyWtR5PrnblNhzl zQcA== X-Gm-Message-State: AOJu0Yx2JNDLRDgadayMbnlZkxajS4uClTp6qglAMxxWOdnEj1qoVzHR sHJEf7WpamE+yUj1Os3het2LB+GHPyrpT60XIg3JxkjK4LTYaoPfjoqbRXf4Ig== X-Gm-Gg: ATEYQzz8LQkyrARYH3KPqFG+5eYJLIYne6KtpsQFufTRRcQOuQF5tih78Uu7ivoxMUs LjGejb2opupChUHsKtjz9HOz2IxPhIWzLCshqWf36Cu+Jb0RRA2MH3+PWRljNabLt+VbnIbHIJP pKeAEOxdJSYhDGG+7hmXQ8g62o7NqlRIzj9MRLHe9NrbQ6g8iWQlxu4Usnzgo6viW4QQRP9ICfc 0XzTxeH1LPZFIZn6DF66uKSRYRFqD1FzJgkU5bEb+s0upJnryOLzaqa34vTwkP6wAFBsoDNeHZ9 WNRdu7XmHUS/mlZMUhTBUGU7ipc0xbBcqBaggdNLy3N5SrReguKjUyFW2+usXjMvT2VOIlJ/qM7 JX//Z+0RX62AF3HS6CDqZp/yeTn60wA0+Em3SkvaYYIVT50SIl0uzEn3Zew+2WrzdKcVYdpUbse hZ//cxhOYosz06f3CR8kJ+3BpvHOhnwLeWieyj8nE32lFFFrPAQuxHdITNysUfalv99TzjZtZ0b 9FNsQIQeFRZXZJlUC6cxbuh74gIbShwM1CZ+SzW/2cqfAsX3w== X-Received: by 2002:a05:600c:8b31:b0:485:40a4:364 with SMTP id 5b1f17b1804b1-486fee1af50mr2335955e9.26.1773945717254; Thu, 19 Mar 2026 11:41:57 -0700 (PDT) Received: from Lord-Beerus.station (net-188-152-100-94.cust.dsl.teletu.it. [188.152.100.94]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f8b1fe65sm77289195e9.5.2026.03.19.11.41.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 11:41:56 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 07/11] arm64: dts: imx8mm-var-som-symphony: Move USB configuration from SOM Date: Thu, 19 Mar 2026 19:40:27 +0100 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli Move the USB controller configuration out of the i.MX8MM VAR-SOM dtsi and into the VAR-SOM Symphony carrier board dts. The SOM does not provide any USB connectors and carrier boards may choose whether and how to route USB, therefore USB should be described in the carrier-specific device tree instead of the SOM include. While moving the nodes, align the Symphony USB description with the carrier design by enabling both USB controllers, wiring USB1 to the PTN5150 Type-C controller for dual-role operation, and updating the PHY tuning and VBUS regulator pinctrl (including a sleep state). Signed-off-by: Stefano Radaelli --- v3->v4: -=20 v2->v3: -=20 v1->v2: -=20 .../dts/freescale/imx8mm-var-som-symphony.dts | 48 ++++++++++++------- .../boot/dts/freescale/imx8mm-var-som.dtsi | 12 ----- 2 files changed, 32 insertions(+), 28 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/ar= ch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts index 2b608470da8e..a425ee0ed8a9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts @@ -32,6 +32,7 @@ reg_usb_otg2_vbus: regulator-usb-otg2-vbus { compatible =3D "regulator-fixed"; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_reg_usb_otg2_vbus>; + pinctrl-1 =3D <&pinctrl_reg_usb_otg2_vbus_sleep>; regulator-name =3D "usb_otg2_vbus"; regulator-min-microvolt =3D <5000000>; regulator-max-microvolt =3D <5000000>; @@ -133,13 +134,20 @@ enet-sel-hog { }; }; =20 - extcon_usbotg1: typec@3d { + /* USB Type-C Controller */ + ptn5150: typec@3d { compatible =3D "nxp,ptn5150"; reg =3D <0x3d>; interrupt-parent =3D <&gpio1>; interrupts =3D <11 IRQ_TYPE_LEVEL_LOW>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_ptn5150>; + + port { + typec1_dr_sw: endpoint { + remote-endpoint =3D <&usb1_drd_sw>; + }; + }; }; }; =20 @@ -187,27 +195,29 @@ &uart4 { }; =20 &usbotg1 { - disable-over-current; - extcon =3D <&extcon_usbotg1>, <&extcon_usbotg1>; + dr_mode =3D "otg"; + hnp-disable; + srp-disable; + adp-disable; + usb-role-switch; + samsung,picophy-pre-emp-curr-control =3D <3>; + samsung,picophy-dc-vol-level-adjust =3D <7>; + status =3D "okay"; + + port { + usb1_drd_sw: endpoint { + remote-endpoint =3D <&typec1_dr_sw>; + }; + }; }; =20 &usbotg2 { dr_mode =3D "host"; vbus-supply =3D <®_usb_otg2_vbus>; - srp-disable; - hnp-disable; - adp-disable; + samsung,picophy-pre-emp-curr-control =3D <3>; + samsung,picophy-dc-vol-level-adjust =3D <7>; disable-over-current; - /delete-property/ usb-role-switch; - /* - * FIXME: having USB2 enabled hangs the boot just after: - * [ 1.943365] ci_hdrc ci_hdrc.1: EHCI Host Controller - * [ 1.948287] ci_hdrc ci_hdrc.1: new USB bus registered, assigned bus= number 1 - * [ 1.971006] ci_hdrc ci_hdrc.1: USB 2.0 started, EHCI 1.00 - * [ 1.977203] hub 1-0:1.0: USB hub found - * [ 1.980987] hub 1-0:1.0: 1 port detected - */ - status =3D "disabled"; + status =3D "okay"; }; =20 &pinctrl_fec1 { @@ -262,6 +272,12 @@ MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x16 >; }; =20 + pinctrl_reg_usb_otg2_vbus_sleep: regusbotg2vbus-sleepgrp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x120 + >; + }; + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins =3D < MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64= /boot/dts/freescale/imx8mm-var-som.dtsi index c37badc4cf27..75f56dc89b8e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi @@ -378,18 +378,6 @@ &uart2 { status =3D "okay"; }; =20 -&usbotg1 { - dr_mode =3D "otg"; - usb-role-switch; - status =3D "okay"; -}; - -&usbotg2 { - dr_mode =3D "otg"; - usb-role-switch; - status =3D "okay"; -}; - &usdhc1 { #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.47.3 From nobody Fri Apr 3 04:37:59 2026 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0AF4C3F7A99 for ; Thu, 19 Mar 2026 18:41:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945723; cv=none; b=IYOPHdKIkMB73F+jIT0ev66V5+/Nr0Xf3CLLIyqxxLvhJRL+ETLNBTvSRbaQBrWCzUvhdebIOtz/TCn0OkFEw60Xzyow77Q+NlG7CGTYKz/mML7yAkUHjX75ROl0D/SepRI9nVpYwzm1O93RBFnOMpqhxtPa4ICqNGp4NGGNxDw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945723; c=relaxed/simple; bh=XchDX/MJGRebsCi/1qOf1usvUugxZNhKwF3lSzC48kU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IW7MGVQ9ZHQ88UpvJH7KKlratD4ianQ6DkGKVzDkAvofjJ1vXVITgE+ZihTTaBDiz66IVoBLL+dNcxH+w/S4AUXMxAgvykLQ2rNTzPYLQBpQ56v3V0r1L9sv5UZYQEIQaQHsl90wOqIkxhLY4fi3faYwsPOah7FODPcr4PcWY0k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=M+eL5IzK; arc=none smtp.client-ip=209.85.128.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="M+eL5IzK" Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-48628ce9ab5so16545605e9.2 for ; Thu, 19 Mar 2026 11:41:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773945718; x=1774550518; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DI1p11Y3NFQSHggE4wU2LNnBCXfD26cQdpGZhKmz8bo=; b=M+eL5IzK2XHsYSLtnOgviaCK6CgLM5oZnMk3WtueaR7MBhlTHkGoDVr6+M5SHjSARf rjKSoKX7cr6FrIYpNuv/ynxWkcSzwf5SYqgCWEU9smf3PY2JMA6Gc0a1PD/Xa+GJu70u ZT6l4zJzuM/TvuOnQysaELTlvXBr/3jKBngSvbZI3RhkNAmL2bB1q3t6jKN8CB7Jq5FS 1Ye/c+HQ8iNgmMXgf1mxs5XrefDJ6YHMFQkRiVWvJTLAAHDBnmqPxPCN0NxBPA9nYpqA rwtoM2a780sePgTJD80751O0PJv0aIegSJ82wvpQJgm/yUqpPaj0rFIB2Y6kEZTuxk7l GPYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773945718; x=1774550518; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=DI1p11Y3NFQSHggE4wU2LNnBCXfD26cQdpGZhKmz8bo=; b=eWIcxwBoso2zN68lHVVd7VvNyaxtaOd0Zo398mrGvxfi0RgCQBB5MdwodCP8kxFtAQ sxjjYxlMjAF+QU4Ad0wipQw/RjRbCBQDBfdFb9KCd26qQDlILelDwp5mvMJb/CAKS6zw 6flau+7ypBa+oJ7Rpcoy6DwMaDr+46aGbwmluqMffQvB7C25LKdKG42VxweiNl/c46Va 26UJ4p6d4/lXLd20MxrQkmesQ4r+w8Zu6+eJLqlsf5sZXiGOWE+gFiTyTlroiKJBPB1X 6epVTs4+le/OZJpdkx6dCgZiMC4w6oBq/HZtmbT2kxdYlFHdUV5HmyIwl2HzotG/8KVh jUBA== X-Gm-Message-State: AOJu0YxDHVCentitniPezxtjr4rJ79628gHKFwx9Iu2qvA/dNZeZOu6I MYGEJUC9QQAiMrvn2jrct8IQMaGedgHNLay8MQjNGYnXzgNlWwLf18b2019UNQ== X-Gm-Gg: ATEYQzx88PoWQZOYiD48pHEr9EC/QBqAWpWFAXLY8THhWpfXXp53t1i5q/JWcXA5GFD UbTBmVsuzgw743IvjQp1w6KFr0wKbvEKGspEanMPyw9/JXl5oXFjWH2BG/lb/EIiM8t/nIP0Zt7 5zhbTduGi0HAzNRgUdAkV+G3bkDsv2QjJ7fQsCCvKgi39CX0S/ZBzsJ027IDs/fyMMyzjlCqHoA /UXiIVafevmY3yu52+1OYRxmb1eUg0BbjC0LomZJsDrcdv9F9v7xswsCnMwPOVopd7IN3ppPAKe z+yA6rfYQ5q8DqrhmlDF/leIDBJYTPlWhW/4bVQX9+JKraGvHH2EB7sGgSefVNCdvtgoWQ9Jdg7 0Q95hg2vXFtaaYLXgeA/QcVnhtRDh7VVPWo+3uP/0Hu20ecUet6trsigAUotNvZ6jPbYDU64QfG 3C3QxE7EA4vYAEikI13smaTeiG0MyOBBiikCQ3E2Kpr8Q78K+gspzXwrR4Nd4hCzPiIYEV7W1+H yoR6J/O+J1PnD0/hsNU/EqEKTkWFAN/uwNc2yU= X-Received: by 2002:a05:600c:c083:b0:485:3f72:324d with SMTP id 5b1f17b1804b1-486fee0481amr1849725e9.14.1773945718217; Thu, 19 Mar 2026 11:41:58 -0700 (PDT) Received: from Lord-Beerus.station (net-188-152-100-94.cust.dsl.teletu.it. [188.152.100.94]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f8b1fe65sm77289195e9.5.2026.03.19.11.41.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 11:41:57 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 08/11] arm64: dts: imx8mm-var-som-symphony: Enable uSD on USDHC2 Date: Thu, 19 Mar 2026 19:40:28 +0100 Message-ID: <2181c11d9b15d7a048e5f881a867ee1f7fa82ca1.1773944896.git.stefano.r@variscite.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli Enable the microSD slot on the VAR-SOM Symphony carrier board. Configure USDHC2 with card-detect GPIO, pinctrl states for the supported bus speeds and the required VMMC supply. Update the VMMC regulator to match the latest carrier revision by moving the enable GPIO to GPIO4_IO22 and adding the required off-on delay. Signed-off-by: Stefano Radaelli --- v3->v4: -=20 v2->v3: -=20 v1->v2: -=20 .../dts/freescale/imx8mm-var-som-symphony.dts | 59 ++++++++++++++++++- 1 file changed, 57 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/ar= ch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts index a425ee0ed8a9..6da29845985f 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts @@ -24,7 +24,8 @@ reg_usdhc2_vmmc: regulator-usdhc2-vmmc { regulator-name =3D "VSD_3V3"; regulator-min-microvolt =3D <3300000>; regulator-max-microvolt =3D <3300000>; - gpio =3D <&gpio2 19 GPIO_ACTIVE_HIGH>; + gpio =3D <&gpio4 22 GPIO_ACTIVE_HIGH>; + off-on-delay-us =3D <20000>; enable-active-high; }; =20 @@ -220,6 +221,18 @@ &usbotg2 { status =3D "okay"; }; =20 +/* SD */ +&usdhc2 { + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-0 =3D <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 =3D <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 =3D <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + cd-gpios =3D <&gpio1 10 GPIO_ACTIVE_LOW>; + vmmc-supply =3D <®_usdhc2_vmmc>; + bus-width =3D <4>; + status =3D "okay"; +}; + &pinctrl_fec1 { fsl,pins =3D < MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 @@ -280,7 +293,7 @@ MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x120 =20 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins =3D < - MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 + MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x41 >; }; =20 @@ -304,4 +317,46 @@ MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 >; }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins =3D < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins =3D < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins =3D < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + >; + }; + + pinctrl_usdhc2_gpio: usdhc2gpiogrp { + fsl,pins =3D < + MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xc1 + >; + }; }; --=20 2.47.3 From nobody Fri Apr 3 04:37:59 2026 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F34073F7E75 for ; Thu, 19 Mar 2026 18:42:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945723; cv=none; b=S587IMgFV4/snB5zhUwn+XvuXKZ8nT8WHLlFeeutvqPw5XK8ne0xZylsLeJDq3uXEZV72jcARF8bD2A7BZ3/XiqyuUVZGRzB+Z6QetwNym2yVGR9oPgYGfnuth9e6dphFNSwoDbEW5sN/WBQniGmyl50sgCMHacjtKZ25diFRNw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945723; c=relaxed/simple; bh=OKQ6ITiXJ1sq9W2uBiwEhtzGC+JhqD9k+TysxbOFCIU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=L1Q27E7XO5hoPMCFQMfdQvyFeeKTsVdLCyjAvhuvEfhdHBgLBbRmjA0j1+W6MoYchD13awEL7BAgxFmIxrNL2uBu0yMFbmi8qNBDR2k2AssBAuAItkap21NoeY8FTAbwG7EJDJ5iI80wEFE8v/obGey/gG7Sd0RxOkhsHutwhm4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=EBAn8lvo; arc=none smtp.client-ip=209.85.128.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EBAn8lvo" Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-4852e9ca034so11546635e9.2 for ; Thu, 19 Mar 2026 11:42:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773945719; x=1774550519; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Fu2Rc4rssQfTFJ5EZaq1oCgNnoY0eCc8f3U0nan/fr4=; b=EBAn8lvouYj/WGtKLZzp0gZER+4jG41938Yt0RbNnOn0Yeu77Mk5La9z+x0ti6/wUe klX/dZj8O9NKw2ToJRQHa85jS+ULnbwheseu/0Co1sM/a5WZq8G0hwcw61bJbzy6bBlk trIyVp6De64S3kOgk0+5+9a22oEjHKxRR3aiLG8VkKmKAW8eZhwyTjkDS4enwpEpqlSq huYCPmw9vrswYJ5SLC5xkUB90Ly7IIkooE1Bn5DBgn9gsNwg9jhPxg3LaAW0beFEj0Du Ko0jXSqW+qZDGg+VMasrXsem0j3A0lo4QJnSfCJFdz34iMSnrUGbkUHRDamQAbP8paKo t5Bg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773945719; x=1774550519; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Fu2Rc4rssQfTFJ5EZaq1oCgNnoY0eCc8f3U0nan/fr4=; b=BjBjSq+o/IgJKBaR7x7Jmt7Lj1wWSR7h4sCCQhqYPratmZNq/gkY1dwFMis5z2T2ZG jzYDxRFNkuMli+4lMZgU0B2E62nyZw/3IMoGUPPKbZeuYH9H+JoxGjGfrzvWMoYVY7db vu20t3JISAokm/LStJv2uvjMmnC/6f5y0kfxTYWrf4nuI5RedFISkQ5wrxj1xF103oJp obfMxwfrSAM0XDIz0Y+rUBXak1B19/BJvIjAv6L/rNCSCfh+SnN0JjN3g9KrBxSRwuYO NuuLCT7IumKrCgKrAK+bOSl3XxfSGWqcn+ZInpB0IaVlaCExDtxn9rTuZKa26PSrqC6O 83dA== X-Gm-Message-State: AOJu0YxLYNZD3t9K/zy5u8vfBWSHvVryiLM1RKyiJK9IL/w8LN5mSXqw kikGS9EhilJTWMK24iDLQlaQ36m21NeP7CUBmXokrp6Vad7Dmc6Y+WMViTKteg== X-Gm-Gg: ATEYQzwiVDxU60MhVnOI44ZNwJG9QM7/gC73z6Z4eAv2ek70CHZVpvFvQcYouTzcLUW lT3tzUiG3JEEQEFHBaBiTk1W5fMQsI9T2PIoi7ez+HITHlMg4fJkt1n3i3NNnocGB6ZJyr3hKev 3/c41k2oOZnIiQ25Th2gVJ0rKTc1F3c/SUrhKr/C1HFTs63Jr8k2MxXeguvIKu2Yf6W02jyEjEo B7O4mBIzUXnWDxzIUFC0iiMnACuQwuj52rzExrqeHF9hZmp9TjFa4ZVQ7ZX+HeSZESOtIe23l3Y 52aAwDZHRz6BcW1tIUOlVEr69co1I5COVc7aRiYNv4X9KbmssPkS/xrj94rNM2OvrttVw0IfJyi /c5ftkGsYyY89p4Rkqq8+wd7BAatHd5EAIxQaPIsP4HtuuJ81DnpwCNJ6Ir474k5KBOThzkEawR tNZCysA3MfFWpJ8xoN4PXp26wwsjo59NFtiVSMQR8iyH0wUJFt3TXqZ8AIz76Gb6c+dbBnKQrhZ nbhdGGHovVHDq8kfoiWmSPR4TKAceO/8axrqMQ= X-Received: by 2002:a05:600c:1da1:b0:485:557d:9fe with SMTP id 5b1f17b1804b1-486fedc9c01mr2720365e9.12.1773945719265; Thu, 19 Mar 2026 11:41:59 -0700 (PDT) Received: from Lord-Beerus.station (net-188-152-100-94.cust.dsl.teletu.it. [188.152.100.94]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f8b1fe65sm77289195e9.5.2026.03.19.11.41.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 11:41:58 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 09/11] arm64: dts: imx8mm-var-som-symphony: Add TPM2 support Date: Thu, 19 Mar 2026 19:40:29 +0100 Message-ID: <570b16455e37e7ce4d2556ed4e21d67ac3a27183.1773944896.git.stefano.r@variscite.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli Add support for the TPM2 device on the VAR-SOM Symphony carrier board. The ST33K TPM2 is connected over I2C, and A PCA6408 GPIO expander is used to control the reset signal required to release the TPM from reset. This patch adds: - The PCA6408 GPIO expander. - The ST33K TPM2 device node. Signed-off-by: Stefano Radaelli --- v3->v4: -=20 v2->v3: -=20 v1->v2: -=20 .../boot/dts/freescale/imx8mm-var-som-symphony.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/ar= ch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts index 6da29845985f..6112e4392c59 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts @@ -153,6 +153,20 @@ typec1_dr_sw: endpoint { }; =20 &i2c3 { + pca6408: gpio@21 { + compatible =3D "nxp,pcal6408"; + reg =3D <0x21>; + gpio-controller; + #gpio-cells =3D <2>; + }; + + st33ktpm2xi2c: tpm@2e { + compatible =3D "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c"; + reg =3D <0x2e>; + label =3D "tpm"; + reset-gpios =3D <&pca6408 4 GPIO_ACTIVE_LOW>; + }; + /* Capacitive touch controller */ ft5x06_ts: touchscreen@38 { compatible =3D "edt,edt-ft5406"; --=20 2.47.3 From nobody Fri Apr 3 04:37:59 2026 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 420283F7E9F for ; Thu, 19 Mar 2026 18:42:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945724; cv=none; b=mqGl+MttOF7rPH6eLpJfV9ym9tDxGOkjgRp9u1GPN96OvRwlTlQOUVySqKcRCsUocsIfuCIj2VQqeFSkruyut8mPmkVC/SGxf7fbVaKZPdShtKEfrtBW2kKCnm80WG+LqebP/w5UwW5dTel4/FbDQxgqzSimWwE672lNz9+IOtw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945724; c=relaxed/simple; bh=IOTtpJojSI3G2ZqY5Hv+ZP40HG0ICyUBjBpabVDI79w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=E61CCCNB36ph0G224+mMoVY6OVnLyppq6kloGPpEfur4Foev7h0OGv1JN8TWc+s878sRc+6CrOc7VuGTS4gsLT6f8HrdAgSs7IVcQThLShPA+LVMPJSxAHnauTk/uC6GMmDkZ55jWVELXQbqDV66aedzNxf0rfrAd372Pcf2PT0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=EM9gSnuL; arc=none smtp.client-ip=209.85.128.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EM9gSnuL" Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-48628ce9ab5so16545835e9.2 for ; Thu, 19 Mar 2026 11:42:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773945720; x=1774550520; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ePp2cj3QsqbKFBEYZr7yHg7hIpe6bh9vkoKNgnuo7Og=; b=EM9gSnuLBV6Rf9hdoPS915VTKQ+ff6DAfwHnqRqWq+tkU81rKEZn0/womy93p7wmrG tZJ4p17hzUdZSD+4jOJ7LmYh2l6Fa1rgi3eO4B8YK3Vtj+c2tQqcHZtAYTpgl76+Prpc f9RkPHihQhb9Sae936g+pCYaOM4Y1EbZ2xbNAvnPCPodkH0XEYNoy57FfjVldvbQpkyp AUS+Ha6cOm09sZnZCqqE3ro8/ybivLDwkCRRaVIpaT5sShj/EkmvXavDGgqY6ORfSlSi soJXOjFD/Rq/rNPYd+INwChXqpICeoofkVbq8VKZfpiBiO9ncnLy6vFbMMYTcG6eWGcw RSkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773945720; x=1774550520; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ePp2cj3QsqbKFBEYZr7yHg7hIpe6bh9vkoKNgnuo7Og=; b=punAmNOenHKD6Qplrx77/KOz2+S4o15xQQfzY4W1MKhX/gwOdaERzb6K4tjiVW+u/d tDQ5EsoSb2umHqf0MxOrCYyzIIQYOiHRzdHZqxYokCpDL0MXTuol/iOX+B5y5EaqqPYv OL772SJSLC9KbJN57SbIEDxYBewoJ3MK9x9cap+VVyzyFTHF09RpUxZsI1uQRNG5uzHO YhKNqW9Pm1zjdE3xC9JLNXGVRNgd0lx9V1YlBHB2bb2z/3v1Fq40H6hwaFuhQzJhqy9N sgOw7+QlADEOXPaFluzDkbMyR6fVxxGwg0hJuZO9nqMCcgcqRVzHNmxZ9HoTBi5h0HKH 6yVw== X-Gm-Message-State: AOJu0Yw8sa+V/gGew4YO2dCkqQNzhQKEOqpBfH/LXZbDc/BhVn+UjQxq pCAcCw58Ied+7KchC/p1tPIwsjv9Ut2KFUyjtqLuI3CjCd5NWWkLoek/Z+0CUA== X-Gm-Gg: ATEYQzwm2q2xv20ndUwVx9PbPQuCs6pIoOdhSD8TKahvARH1nWv3opPfMWawhYqWc0o fdIr1juW9qaJfAQyVI40d1goRiEYj768oLR0ck6bRPaoXDNWVZDrQC0T+Qpoxf6JcnDgKCHeRGF QtkOQ05PL6gP3I3WhMTp7UFx1d3p2vzJWilaoZ7k7Qy0EGF2qxQciam4lA0hFNUM4ZR4GL9DpoM nza+Qibs/fyVTS3mW9U+czPg5hIUG1pxCg560RoW0Zv/3P7LLsrjqR2GAmatnOT7o7gt5BHydQn trJaGRaRb9+apCwRv1HlC2/a6J5kx9bd5neeFI4CAkQI1sDkDfZ9idkrusRSlyEImp1vReTiVsW KnRcnEHdwNj+HA/bWVUUq/D6caCMXQsYEB88IwURkvsU3UmRiRcYzqDsEEhgMWQ2GvJtMVrpwNk PTbX7WXHXc22tYWFMBJADZ4v9ACC1TJv70AD2Le3YKN1P33t+jaiZ/WeMz1Wk5pDIGYNXw1/oNK NdFw4Skl0Zou9EWOsnRGi3nZn1IjUr20MVB5HmacKdXrcv9Mw== X-Received: by 2002:a05:600c:5248:b0:486:fdba:f5db with SMTP id 5b1f17b1804b1-486feb5d82emr3683855e9.0.1773945720197; Thu, 19 Mar 2026 11:42:00 -0700 (PDT) Received: from Lord-Beerus.station (net-188-152-100-94.cust.dsl.teletu.it. [188.152.100.94]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f8b1fe65sm77289195e9.5.2026.03.19.11.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 11:41:59 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 10/11] arm64: dts: imx8mm-var-som-symphony: Enable I2C4 Date: Thu, 19 Mar 2026 19:40:30 +0100 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli Enable I2C4 on the Symphony carrier and add pinctrl configuration, including GPIO-based bus recovery support. Signed-off-by: Stefano Radaelli --- v3->v4: -=20 v2->v3: -=20 v1->v2: -=20 .../dts/freescale/imx8mm-var-som-symphony.dts | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/ar= ch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts index 6112e4392c59..fbad5d2d4a97 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts @@ -188,6 +188,16 @@ rtc@68 { }; }; =20 +&i2c4 { + clock-frequency =3D <100000>; + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_i2c4>; + pinctrl-1 =3D <&pinctrl_i2c4_gpio>; + scl-gpios =3D <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status =3D "okay"; +}; + /* Header */ &uart1 { pinctrl-names =3D "default"; @@ -281,6 +291,20 @@ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 >; }; =20 + pinctrl_i2c4: i2c4grp { + fsl,pins =3D < + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 + >; + }; + + pinctrl_i2c4_gpio: i2c4gpiogrp { + fsl,pins =3D < + MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x1c3 + MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0x1c3 + >; + }; + pinctrl_pca9534: pca9534grp { fsl,pins =3D < MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x16 --=20 2.47.3 From nobody Fri Apr 3 04:37:59 2026 Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 163A3175A64 for ; Thu, 19 Mar 2026 18:42:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945725; cv=none; b=gJg6cBjo0nvIH2QwQj+dw8WS/Gbu7xV+YRDGji4ekvJEklvGcUn2W14c07PijysJhRvSaPjetrLyc6wvoRGlPeA03n3jVsX8+VI/w9MU28TsUuJFhNXa16Zkv1QdjLAWMJFTzoLHlXAUytiU8umO6jNWSDeTxL1Hc3E0W8zFuqc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773945725; c=relaxed/simple; bh=NBG95zW6i90tiCFEeQUOmZfkJk45aW+Rt4XZK3y2dsg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LhOhRJP9DbKgpQElt5X7iQgEDPjmxigXxIzXPTiABHYKTJAHTBro0VLH4kQX3dsQt/1S1MGD9IdY53M7jIowiFRCnavWx9IpvuTqhr/m156o1VnnY6ti+jKRFANGnfnRUthqIxpGoOdxUBxfGScUnfptNi6IKFDD3pIf/VKcL58= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=SQyhhUs2; arc=none smtp.client-ip=209.85.128.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SQyhhUs2" Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-486fba7ce4cso7700935e9.3 for ; Thu, 19 Mar 2026 11:42:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773945721; x=1774550521; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tlCReu0S/csjkL3628OmCFhensI/pGag/I8DUVwMu3g=; b=SQyhhUs2WSYQ0ww70Cdo5mTqUHK93otqzUayCnKaPoH6QYLUj/jWmz+7Bu9+PPdN2h G9cloo18gleQXOo8WHnG6YTeNhDMULAwO4RF6ntomeLqn/WPAuNX6DEsRyv69JD16aeS xT9AGPKCM3tcl4OcP5GPzwLgiaDGTHX4JTNkTEDBuT93DNKgPEITT8kM3Z3X7OhEOPEH pmwMADo/kuhUn2TLeNIySH9QyFfM24PqEuBnXwgNPYPUHL3x9sR93F7U7XfF2JXNKDVb IhRal8e0iMhFG6ERlgWUrhiTPc3uo3+Usd6AIFh47a7H+IN4opd94p1Wg88INpm5Jv+8 D4ug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773945721; x=1774550521; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=tlCReu0S/csjkL3628OmCFhensI/pGag/I8DUVwMu3g=; b=sHNZkMLPNe/DcyG7s1h8phqFxNVOA+xFCkxEoD+lQb+CgQBuzduQvM3rPxM1Haw/ze Kiw7zxk34w5ihiuMT7jdIdD5Z+ZdSHRi+F+JQuryQvtD46b5PscU438A1++4YhnK4Ryp aXUEyuhAr2giNpp6/r1v1hfx9zAvMHWC0mq11zNSuNtP02CJn5WjukZnsUJ+MLjmgwUf gIswY+7r8aTagau/+1+3Ns3jFh4p1Eg4wa/p+L8uHMAZsQkXeVdCM2zMkX1Xzw6YjAYB PLMVfB2wk5hXFz3wf4dDUeZtLps63pFKyEdUBiOax4Yr8DbQ8/Nfto7qFejTRl9VZaJL iyOA== X-Gm-Message-State: AOJu0Yz97C7mgyb84I42GSbAS7uFci39RFZH2P4tlRiRsoHyz0V22jzJ zZfE9L+NUCxECxUhbwZ2PGIE1TiznK1n4MT3ZFmkrBFzawnSa8nhcGHBvmLOSA== X-Gm-Gg: ATEYQzwbzatfE0o8AYLI26F8tcj5HDsHwrVz7A6LHL08sS6pFlMeEvc/X/+VDgzCGWQ nz4s1A6KkkMUfvgqyexxYwH7rMKdVlMvITr59OM7Pw2C60jYhAW8DgZNxFNjeNxOsd/1opq/826 9GsjNuETSTTZJyXpMMPFRHhOpbhzbLDlWoiCDwMkrZ3rFm4PdkaxKW+7J6QV7GiCRlhDHim1FJ4 Y46zCZOEkjz/PaHxMVHIJLemcFYU/8vhiqaqF5+/YLhAptMfdXQD95KGwTHWdT+X/xhEFbyFQMO 5jJWYtPsO6VBBRD1WwqPqLWIPMcawrqZHtuBuN+cp2My+Ur/3q/2NOSrGKM3vyAMbU8nVUC9pdb z0rrzvuGXEvXXGfFnOgXaWDk7cekVqTw5Josl5PF9dtNYhouBSnxKDwVNmr9BBsQezQDneyAl8n +eygbDnpe6U3gffOkl1F+SRPD29WonmEReywuJed5fn1TPk5JgD0HGIct/MgfcCi1CJnsfsPooB YExscc9s6RPxG5JBk8G7DL8Oa8JBe22Dy9drLY= X-Received: by 2002:a05:600c:19d4:b0:485:4278:24f0 with SMTP id 5b1f17b1804b1-486ff03d9d4mr2150745e9.30.1773945721076; Thu, 19 Mar 2026 11:42:01 -0700 (PDT) Received: from Lord-Beerus.station (net-188-152-100-94.cust.dsl.teletu.it. [188.152.100.94]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-486f8b1fe65sm77289195e9.5.2026.03.19.11.42.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2026 11:42:00 -0700 (PDT) From: Stefano Radaelli X-Google-Original-From: Stefano Radaelli To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH v4 11/11] arm64: dts: imx8mm-var-som-symphony: Enable PCIe Date: Thu, 19 Mar 2026 19:40:31 +0100 Message-ID: <6c4f4ee33a3c8cf2c36de57bf4f0a706334c10ed.1773944896.git.stefano.r@variscite.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli Enable PCIe support on the VAR-SOM Symphony carrier board by adding the external reference clock, configuring the PHY and providing the required clock and reset properties. Signed-off-by: Stefano Radaelli --- v3->v4: - Move vendor properties to the bottom v2->v3: -=20 v1->v2: -=20 .../dts/freescale/imx8mm-var-som-symphony.dts | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/ar= ch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts index fbad5d2d4a97..857325ef4461 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts @@ -6,6 +6,7 @@ /dts-v1/; =20 #include +#include #include "imx8mm-var-som.dtsi" #include "imx8mm-var-som-wifi-bt-iw61x.dtsi" =20 @@ -17,6 +18,12 @@ chosen { stdout-path =3D &uart4; }; =20 + pcie0_refclk: pcie0-refclk { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <100000000>; + }; + reg_usdhc2_vmmc: regulator-usdhc2-vmmc { compatible =3D "regulator-fixed"; pinctrl-names =3D "default"; @@ -198,6 +205,29 @@ &i2c4 { status =3D "okay"; }; =20 +&pcie_phy { + clocks =3D <&pcie0_refclk>; + clock-names =3D "ref"; + fsl,refclk-pad-mode =3D ; + fsl,tx-deemph-gen1 =3D <0x2d>; + fsl,tx-deemph-gen2 =3D <0xf>; + fsl,clkreq-unsupported; + status =3D "okay"; +}; + +&pcie0 { + reset-gpio =3D <&pca6408 1 GPIO_ACTIVE_LOW>; + clocks =3D <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>, + <&clk IMX8MM_CLK_PCIE1_AUX>; + clock-names =3D "pcie", "pcie_bus", "pcie_aux"; + assigned-clocks =3D <&clk IMX8MM_CLK_PCIE1_AUX>, + <&clk IMX8MM_CLK_PCIE1_CTRL>; + assigned-clock-rates =3D <10000000>, <250000000>; + assigned-clock-parents =3D <&clk IMX8MM_SYS_PLL2_50M>, + <&clk IMX8MM_SYS_PLL2_250M>; + status =3D "okay"; +}; + /* Header */ &uart1 { pinctrl-names =3D "default"; --=20 2.47.3