From nobody Mon Apr 6 21:32:32 2026 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F63E3446CE for ; Tue, 17 Mar 2026 20:00:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773777623; cv=none; b=MvScEs45a4tsN26yOzOSBBSeEGGLWnyv5KNGuUEpkPXsdWG8pFqbiWLC33xvNsYWw1g8tw7mGNeuHJ8pqcRIOJ+CgJrIrAqQqWVYFngOXxNdbXAJHHtopFGmG8DZK0jPhPJJt+EPdrqJGkxkFMk8ezNrWaD/LjgMWiLtQBUiz3A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773777623; c=relaxed/simple; bh=mEEXKUlmkVBIzNV5wtuGiKeQL7kp/lCT/CJFn9Wdi4I=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=u6bL6+kb1zX54G1XeyOhNHfMo7h9/9+/2YTW1e62vgn+4rDncxSGgrr02ms4E7bndwjivsiQ+23Q9zeL1Nr6KtBY4Dj8QNYDTh2+lx+MTitJMqXwM1HcSBBtiMY9NLqee/Q3W8XQcrX+la6hga0FKAeNF5BelMi+Ekc2IR+oAaA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=LZxTMGFn; arc=none smtp.client-ip=185.70.43.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="LZxTMGFn" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1773777614; x=1774036814; bh=mWI6Ci0OExEN/NmgLmPa48Tm+LQjRqPyhRE3t1Uth/U=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=LZxTMGFnBwi6lFkwTwMVEcxJTnxKNTmrMwxgwSaVh//UoewwGP08bD43vdpjxi7EI 4y/rpcIzqGFj7zj2z9FkV5IBZUo2uSaqnN1IAzs+3jNdoQdDLgA6bRXFfSFCQLt7Cp t3cdgvgQDWvrscanTh7eh8pIKJzlICSutD0WCtPVGEscxHyNgwKMzHXv3zvZK229+p Iver/1fT1K27vR0MhfLdkui4xSMscsQImNk3WCW1GV9I4y5MGpdaLqBU55mAI1pKP2 N8o5PI2zdw7XKz8UNm7I9hThvEWZC8e9VtJWqhpba/2IpIibaf8W5hfEurtY/spGV9 ejZrKhfpJP0Qg== Date: Tue, 17 Mar 2026 20:00:11 +0000 To: tglx@kernel.org, bp@alien8.de, mingo@redhat.com, darwi@linutronix.de, thuth@redhat.com, dave.hansen@linux.intel.com, ak@linux.intel.com, babu.moger@amd.com, chang.seok.bae@intel.com, peterz@infradead.org, nik.borisov@suse.com, jpoimboe@kernel.org, pawan.kumar.gupta@linux.intel.com, hpa@zytor.com, xin@zytor.com, maciej.wieczor-retman@intel.com, sohil.mehta@intel.com From: Maciej Wieczor-Retman Cc: x86@kernel.org, linux-kernel@vger.kernel.org, m.wieczorretman@pm.me, Farrah Chen Subject: [PATCH v10 1/3] x86/cpu: Clear feature bits disabled at compile-time Message-ID: In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: ece260968a7077f72b7b705de409d4f932455d9d Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman If some config options are disabled during compile time, they still are enumerated in macros that use the x86_capability bitmask - cpu_has() or this_cpu_has(). The features are also visible in /proc/cpuinfo even though they are not enabled - which is contrary to what the documentation states about the file. Examples of such feature flags are lam, fred, sgx, user_shstk and enqcmd. Initialize cpu_caps_cleared[] with an autogenerated disabled bitmask. During CPU init, apply_forced_caps() will clear the corresponding bits in struct cpuinfo_x86 for each CPU. Thus features disabled at compile time won't show up in /proc/cpuinfo. No BUGS are defined to be cleared at compile time, therefore only the NCAPINTS part of cpu_caps_cleared[] is initialized using the macro. The NBUGINTS part is set to zero. Reported-by: Farrah Chen Closes: https://bugzilla.kernel.org/show_bug.cgi?id=3D220348 Signed-off-by: Maciej Wieczor-Retman Reviewed-by: Sohil Mehta --- Changelog v10: - Remove examples of feature flags that came from stable kernels. - Redo the patch message a bit with Sohil's suggestions. - Add Sohil's Reviewed-by tag. Changelog v9: - *_MASK_INITIALIZER -> *_MASK_INIT - Remove Cc stable. - Note that the BUGS part of cpu_caps_cleared[] is zeroed. Changelog v6: - Remove patch message portions that are not just describing the diff. arch/x86/kernel/cpu/common.c | 3 ++- arch/x86/tools/cpufeaturemasks.awk | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index a8ff4376c286..76339e988304 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -735,7 +735,8 @@ static const char *table_lookup_model(struct cpuinfo_x8= 6 *c) } =20 /* Aligned to unsigned long to avoid split lock in atomic bitmap ops */ -__u32 cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long= )); +__u32 cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long= )) =3D + DISABLED_MASK_INIT; __u32 cpu_caps_set[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long)); =20 #ifdef CONFIG_X86_32 diff --git a/arch/x86/tools/cpufeaturemasks.awk b/arch/x86/tools/cpufeature= masks.awk index 173d5bf2d999..9382bd15279a 100755 --- a/arch/x86/tools/cpufeaturemasks.awk +++ b/arch/x86/tools/cpufeaturemasks.awk @@ -82,6 +82,12 @@ END { } printf " 0\t\\\n"; printf "\t) & (1U << ((x) & 31)))\n\n"; + + printf "\n#define %s_MASK_INIT\t\t\t\\", s; + printf "\n\t{\t\t\t\t\t\t\\"; + for (i =3D 0; i < ncapints; i++) + printf "\n\t\t%s_MASK%d,\t\t\t\\", s, i; + printf "\n\t}\n\n"; } =20 printf "#endif /* _ASM_X86_CPUFEATUREMASKS_H */\n"; --=20 2.53.0 From nobody Mon Apr 6 21:32:32 2026 Received: from mail-24417.protonmail.ch (mail-24417.protonmail.ch [109.224.244.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5661B346FB0 for ; Tue, 17 Mar 2026 20:00:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773777633; cv=none; b=SfZJ7LfBQNxzkjizHFmIlqi7DxmauzPIfWzEUbPxgheQ0c4mcL+MAHS4SuPQlI2XnfDw7B3LbI4+5xDPqpl9zGs8lv8L0aM4JAp+NAMiUPPXIaUADQfn0k4bAwyDUFMIxRG0eLzeTM1jJPa9d6V4loiQui3nyRSR833rTk5fgoA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773777633; c=relaxed/simple; bh=jfvGHap6yDQUmZDoGW2lNivatqIgUKeRiML/IVLoHvw=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=NUKhy0Vp1b0vYj1lRBYQ9ifVwAb8Ny6S3I3Xx1TO5A85XoLlABEWKHBfMxQFAVvZ+uFEwX9QXQobVr2Z2t82DtRtnBCd9/CmHU83WDe5tiSx1wK0A2c2rPvMAG0iUe47ocxCCcr8AXns7X5FMChH19SMKHu72u14P/mUIH/Vd8w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=h93cnswL; arc=none smtp.client-ip=109.224.244.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="h93cnswL" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1773777622; x=1774036822; bh=xRz8bfgb3odIk76DVycE93Bvoqh7tVZwIgFr8bTuflI=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=h93cnswLQ8LQc0MMysg0BN/mULAhfNGriJBUF2G/My+9vmBr5cku9/zt/3lmhc9tF gFv2iDiKdkHGFMFHkBN8DLBMcbb78ZBdsYNyt0KgpkE9jC1jI+Q8kLO6M22Qq/T58G Vo9Rf0Yj62cxgMQc/V7RPdfer8v2Ew99ncntBAFQY7+2zUHLUAItZHcfFweggLkWqW Ut+p14499Ts4ujsTGA4QeuOWLcFBDi33S0VCmRcR96SDbnRQd26Qlak0lehHBZhuZI N6B7csrKDyi8/VcnxuqG87RuUZ5MZKgxgkXleox98mQNgr5VZE+7yHflPH7dJZ7M5f SNfnNV9c9UJ8Q== Date: Tue, 17 Mar 2026 20:00:16 +0000 To: tglx@kernel.org, bp@alien8.de, mingo@redhat.com, darwi@linutronix.de, thuth@redhat.com, dave.hansen@linux.intel.com, ak@linux.intel.com, babu.moger@amd.com, chang.seok.bae@intel.com, peterz@infradead.org, nik.borisov@suse.com, jpoimboe@kernel.org, pawan.kumar.gupta@linux.intel.com, hpa@zytor.com, xin@zytor.com, maciej.wieczor-retman@intel.com, sohil.mehta@intel.com From: Maciej Wieczor-Retman Cc: x86@kernel.org, linux-kernel@vger.kernel.org, m.wieczorretman@pm.me Subject: [PATCH v10 2/3] x86/cpu: Check if feature string is non-zero Message-ID: <92b57f62940b1972d39ae270b1b1ea497462c9ec.1773771353.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 794c1dc491308edffb5d40ea34082c96ac621205 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman In filter_cpuid_features(), x86_cap_flags[] is read, but it's not verified whether the string is non-zero which could lead to unwanted output. In two more places there are open coded paths that try to retrieve a feature string, and if there isn't one, the feature word and bit are returned instead. Add a common helper to fix filter_cpuid_features() as well as clean up the open coded cases. Signed-off-by: Maciej Wieczor-Retman Reviewed-by: Pawan Gupta Reviewed-by: Sohil Mehta --- Changelog v10: - Reword the patch message a bit. - Move x86_cap_name() declaration and X86_CAP_BUF_SIZE define to asm/cpufeature.h. - Don't include asm/cpu.h in cpuid-deps.c - Extend the comment above x86_cap_name to include information on buffer size that needs to be prepared before calling the function. - Remove the likely(), unlikely() calls since this is not a hot path. Changelog v9: - 16 -> X86_CAP_BUF_SIZE. - Add comment to the x86_cap_name(). Changelog v8: - Move x86_cap_name() declaration from linux/cpu.h to the arch/cpu.h. Include arch/cpu.h in the cpuid-deps.c file instead of linux/cpu.h. Changelog v7: - sizeof(buf) -> 16 - Rebase onto 7.01-rc1. Changelog v6: - Remove parts of the patch message that are redundant and just copy what's visible in the diff. - Redo the helper to use an external char buffer instead of a local static string. arch/x86/include/asm/cpufeature.h | 4 ++++ arch/x86/kernel/cpu/common.c | 32 ++++++++++++++++++++++++++----- arch/x86/kernel/cpu/cpuid-deps.c | 21 +++----------------- 3 files changed, 34 insertions(+), 23 deletions(-) diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufe= ature.h index 3ddc1d33399b..dc1cd44ddd63 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -138,5 +138,9 @@ static __always_inline bool _static_cpu_has(u16 bit) #define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \ boot_cpu_data.x86_model =20 +#define X86_CAP_BUF_SIZE 16 + +const char *x86_cap_name(unsigned int bit, char *buf); + #endif /* defined(__KERNEL__) && !defined(__ASSEMBLER__) */ #endif /* _ASM_X86_CPUFEATURE_H */ diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 76339e988304..0e318f3d56cb 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -678,6 +678,7 @@ cpuid_dependent_features[] =3D { static void filter_cpuid_features(struct cpuinfo_x86 *c, bool warn) { const struct cpuid_dependent_feature *df; + char feature_buf[X86_CAP_BUF_SIZE]; =20 for (df =3D cpuid_dependent_features; df->feature; df++) { =20 @@ -700,7 +701,7 @@ static void filter_cpuid_features(struct cpuinfo_x86 *c= , bool warn) continue; =20 pr_warn("CPU: CPU feature %s disabled, no CPUID level 0x%x\n", - x86_cap_flags[df->feature], df->level); + x86_cap_name(df->feature, feature_buf), df->level); } } =20 @@ -1637,6 +1638,7 @@ static inline bool parse_set_clear_cpuid(char *arg, b= ool set) =20 while (arg) { bool found __maybe_unused =3D false; + char name_buf[X86_CAP_BUF_SIZE]; unsigned int bit; =20 opt =3D strsep(&arg, ","); @@ -1657,10 +1659,7 @@ static inline bool parse_set_clear_cpuid(char *arg, = bool set) setup_clear_cpu_cap(bit); } /* empty-string, i.e., ""-defined feature flags */ - if (!x86_cap_flags[bit]) - pr_cont(" %d:%d\n", bit >> 5, bit & 31); - else - pr_cont(" %s\n", x86_cap_flags[bit]); + pr_cont(" %s\n", x86_cap_name(bit, name_buf)); =20 taint++; } @@ -1983,6 +1982,29 @@ static void generic_identify(struct cpuinfo_x86 *c) #endif } =20 +/* + * Return the feature "name" if available, otherwise return the + * X86_FEATURE_* numerals to make it easier to identify the feature. + * Callers of this function need to pass a char * buffer of size + * X86_CAP_BUF_SIZE. + */ +const char *x86_cap_name(unsigned int bit, char *buf) +{ + unsigned int word =3D bit >> 5; + const char *name =3D NULL; + + if (word < NCAPINTS) + name =3D x86_cap_flags[bit]; + else if (word < NCAPINTS + NBUGINTS) + name =3D x86_bug_flags[bit - 32 * NCAPINTS]; + + if (name) + return name; + + snprintf(buf, X86_CAP_BUF_SIZE, "%u:%u", word, bit & 31); + return buf; +} + /* * This does the hard work of actually picking apart the CPU stuff... */ diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-d= eps.c index 146f6f8b0650..5002f496d095 100644 --- a/arch/x86/kernel/cpu/cpuid-deps.c +++ b/arch/x86/kernel/cpu/cpuid-deps.c @@ -156,24 +156,9 @@ void setup_clear_cpu_cap(unsigned int feature) do_clear_cpu_cap(NULL, feature); } =20 -/* - * Return the feature "name" if available, otherwise return - * the X86_FEATURE_* numerals to make it easier to identify - * the feature. - */ -static const char *x86_feature_name(unsigned int feature, char *buf) -{ - if (x86_cap_flags[feature]) - return x86_cap_flags[feature]; - - snprintf(buf, 16, "%d*32+%2d", feature / 32, feature % 32); - - return buf; -} - void check_cpufeature_deps(struct cpuinfo_x86 *c) { - char feature_buf[16], depends_buf[16]; + char feature_buf[X86_CAP_BUF_SIZE], depends_buf[X86_CAP_BUF_SIZE]; const struct cpuid_dep *d; =20 for (d =3D cpuid_deps; d->feature; d++) { @@ -185,8 +170,8 @@ void check_cpufeature_deps(struct cpuinfo_x86 *c) */ pr_warn_once("x86 CPU feature dependency check failure: CPU%d has '%s' = enabled but '%s' disabled. Kernel might be fine, but no guarantees.\n", smp_processor_id(), - x86_feature_name(d->feature, feature_buf), - x86_feature_name(d->depends, depends_buf)); + x86_cap_name(d->feature, feature_buf), + x86_cap_name(d->depends, depends_buf)); } } } --=20 2.53.0 From nobody Mon Apr 6 21:32:32 2026 Received: from mail-43101.protonmail.ch (mail-43101.protonmail.ch [185.70.43.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C62A14594A for ; Tue, 17 Mar 2026 20:00:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.101 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773777629; cv=none; b=XsjWnL0GZ9dYw64Ob/hlGG5RaqhrJiyETajdsHVSAWlWEt7HMeijhV66SJ0HlGvTKx0MkxK8NSZduPiP6ir5PT4fFGhkIsRFRzDNHKrznY1hm+nDGgOi8uhuvZvfXjPI6CiG4MUmWS76Op+/ZUxr+NyXhNIYECg9Ahz6qEJW9Pw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773777629; c=relaxed/simple; bh=DLJ/wBanpCBGgXiAykEdxvWB6InIx0nVkdPWTMarDsU=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=g3qHwRseArsk7tUIL/tNsIq1zbvIs8hvbRdwxDyEesMm5bX8uzlbNs1Z2wEqBpuN9btVIya6KMkFap7CmMtN3jv0cFT3E9LwmcLxnzmFnjJPOA1WPC68iLwm1D0LEW3RwcRVCCg5SDn8oArYXL03ZlIjvkkytrDtnxRpOOjHUIU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=eLIeBBbO; arc=none smtp.client-ip=185.70.43.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="eLIeBBbO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1773777625; x=1774036825; bh=9euF1L4BnGlm1DIdBR//NKl0H9spKn39cectNzroKqY=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=eLIeBBbOwJbeUhpR1Gel4K2LTuMU8mo19SBbgUtdzNTHzOlE0JX/9GIMvXr9pHmuQ dKYq0ITM+5JFZ2V/6pdVdDvQ7RQpunNo4x80sxYSnNumXiINS+Rk+QkSIGsUNuti54 NHRPHxkBDd3uPwSI7lWDF+PuCEkFoHIQFiFbDIGVtrdMVvjLELAKsGyodfCampj+jL rnck0LvSFMu59ZrEJc/ZoW5skI+FXmKjXDvdzj3xE5ayWTvkV9uosRtVba+USzvKa8 1o3GBLO1U4ISn8krdoOarPJ2lOAcxwSP8PAFF91HdoUDs+e1i9B3OlTYRBdIBdIArA 91S5ljBykdPPw== Date: Tue, 17 Mar 2026 20:00:22 +0000 To: tglx@kernel.org, bp@alien8.de, mingo@redhat.com, darwi@linutronix.de, thuth@redhat.com, dave.hansen@linux.intel.com, ak@linux.intel.com, babu.moger@amd.com, chang.seok.bae@intel.com, peterz@infradead.org, nik.borisov@suse.com, jpoimboe@kernel.org, pawan.kumar.gupta@linux.intel.com, hpa@zytor.com, xin@zytor.com, maciej.wieczor-retman@intel.com, sohil.mehta@intel.com From: Maciej Wieczor-Retman Cc: x86@kernel.org, linux-kernel@vger.kernel.org, m.wieczorretman@pm.me Subject: [PATCH v10 3/3] x86/cpu: Do a sanity check on required feature bits Message-ID: <8180d2f5c3da2737167418d3a28b008a933c6408.1773771353.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: e43f64c2f475846df49dd39dbea0750c87061eae Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman After CPU identification concludes, do a sanity check by comparing the final x86_capability bitmask with the pre-defined required feature bits. Signed-off-by: Maciej Wieczor-Retman Acked-by: H. Peter Anvin (Intel) Reviewed-by: Pawan Gupta Reviewed-by: Sohil Mehta --- Changelog v10: - Shorten the comment before the sanity check. - cpu -> CPU in the warning. - NCAPINTS << 5 -> NCAPINTS * 32 Changelog v9: - REQUIRED_MASK_INITIALIZER -> REQUIRED_MASK_INIT - Redo the comments. - Fix reverse xmas order. - Inside for_each_set_bit: (void *) -> (unsigned long *). - 16 -> X86_CAP_BUF_SIZE. Changelog v6: - Add Peter's acked-by tag. - Rename patch subject to imperative form. - Add a char buffer to the x86_cap_name() call. arch/x86/kernel/cpu/common.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 0e318f3d56cb..badf86a26e24 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -2005,6 +2005,33 @@ const char *x86_cap_name(unsigned int bit, char *buf) return buf; } =20 +/* + * As a sanity check compare the final x86_capability bitmask with the ini= tial + * predefined required feature bits. + */ +static void verify_required_features(const struct cpuinfo_x86 *c) +{ + u32 missing[NCAPINTS] =3D REQUIRED_MASK_INIT; + char cap_buf[X86_CAP_BUF_SIZE]; + unsigned int i; + u32 error =3D 0; + + for (i =3D 0; i < NCAPINTS; i++) { + missing[i] &=3D ~c->x86_capability[i]; + error |=3D missing[i]; + } + + if (!error) + return; + + /* At least one required feature is missing */ + pr_warn("CPU %d: missing required feature(s):", c->cpu_index); + for_each_set_bit(i, (unsigned long *)missing, NCAPINTS * 32) + pr_cont(" %s", x86_cap_name(i, cap_buf)); + pr_cont("\n"); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); +} + /* * This does the hard work of actually picking apart the CPU stuff... */ @@ -2134,6 +2161,8 @@ static void identify_cpu(struct cpuinfo_x86 *c) mcheck_cpu_init(c); =20 numa_add_cpu(smp_processor_id()); + + verify_required_features(c); } =20 /* --=20 2.53.0