From nobody Wed Apr 8 03:08:37 2026 Received: from mail-10630.protonmail.ch (mail-10630.protonmail.ch [79.135.106.30]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 76DEF292B2E for ; Tue, 10 Mar 2026 18:03:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.30 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773165811; cv=none; b=FxyxEQSNNM/OSzjgfJQn5sWwHoudbvaiDlv2B7MfzxcbVJ0Ju0NM2YMYcbkETpROu8yG2G83i1Cx2XpkN8fw7WiBr447k4D0EslyKK3mw0BI6Y0TZ+7tBVQxJ3UVaDjwgpf1lQ9NITnsg/L5w5ndsJst7suyWyl7bA4PHIVXHZY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773165811; c=relaxed/simple; bh=OYrF3nOmXvR+249DPVEEvTLFqKlha5+fX4BJ3zKY6Zk=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ft/nsqUJmGwX7m5YlAwZqf1MPF5cn1MnMa/QvWFVroVsyIxtWU7G587PnP55VZHQe5bYyyxgm5U6T8MbKotxRD6fjVhwTJeIxfxHkdQi+b4DdGuNui6Oig/v1SHuTO2x8H+9j0VuB9JnIXN1EbNslXM0QTuDisZVB0rwml1dXfQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=EqNgJieB; arc=none smtp.client-ip=79.135.106.30 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="EqNgJieB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1773165801; x=1773425001; bh=Haf9VXVnh7S6OwY0cy4yYJkcrMnRbD6Px2IMPMj/Z+0=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=EqNgJieBSDQ9I3eFYcxjE+bIUbz4OP3j47WcBSFdX3BaXHzDD+A/2e4aDDnOwBZoc 9XlGmzHpYb1rsksA5xa8e2Y7ZYlfi0K4mclMQWdQZs53CUgvF+PDQ7pY/bdml40x91 ZlIn1NJytf2wwnhdBqICk0UNHpv8Noj78CJgxD0TfubDPM91BseflNhZX3ghvZmHyt DmUOGPMJUQ+GzGF6PZ/8SepHxOnYK2fBXm1S4bqRWsWE69LnbW9OiSsgl9t625Z3Qc 1aotL1w3Q2hfTqMA3FdKKh/SxvIyfqvNZBXBG0JSzeKpf8T9DVsfto0jDM0YR0Zqg2 hSsCu7QtLZx5Q== Date: Tue, 10 Mar 2026 18:03:16 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: sohil.mehta@intel.com, m.wieczorretman@pm.me, Farrah Chen , Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v9 1/3] x86/cpu: Clear feature bits disabled at compile-time Message-ID: In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 53b839685494ecd2e6df67227c4296d6686e879a Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman If some config options are disabled during compile time, they still are enumerated in macros that use the x86_capability bitmask - cpu_has() or this_cpu_has(). The features are also visible in /proc/cpuinfo even though they are not enabled - which is contrary to what the documentation states about the file. Examples of such feature flags are lam, fred, sgx, ibrs_enhanced, split_lock_detect, user_shstk, avx_vnni and enqcmd. Once the cpu_caps_cleared[] is initialized with the autogenerated disabled bitmask apply_forced_caps() will clear the corresponding bits in boot_cpu_data.x86_capability[] and other secondary CPUs' cpu_data.x86_capability[]. Thus features disabled at compile time won't show up in /proc/cpuinfo. No BUGS are defined to be cleared at compile time, therefore only the NCAPINTS part of cpu_caps_cleared[] is initialized. The NBUGINTS part is set initialized to zero. Reported-by: Farrah Chen Closes: https://bugzilla.kernel.org/show_bug.cgi?id=3D220348 Signed-off-by: Maciej Wieczor-Retman Reviewed-by: Sohil Mehta --- Changelog v9: - *_MASK_INITIALIZER -> *_MASK_INIT - Remove Cc stable. - Note that the BUGS part of cpu_caps_cleared[] is zeroed. Changelog v6: - Remove patch message portions that are not just describing the diff. arch/x86/kernel/cpu/common.c | 3 ++- arch/x86/tools/cpufeaturemasks.awk | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index a8ff4376c286..76339e988304 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -735,7 +735,8 @@ static const char *table_lookup_model(struct cpuinfo_x8= 6 *c) } =20 /* Aligned to unsigned long to avoid split lock in atomic bitmap ops */ -__u32 cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long= )); +__u32 cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long= )) =3D + DISABLED_MASK_INIT; __u32 cpu_caps_set[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long)); =20 #ifdef CONFIG_X86_32 diff --git a/arch/x86/tools/cpufeaturemasks.awk b/arch/x86/tools/cpufeature= masks.awk index 173d5bf2d999..9382bd15279a 100755 --- a/arch/x86/tools/cpufeaturemasks.awk +++ b/arch/x86/tools/cpufeaturemasks.awk @@ -82,6 +82,12 @@ END { } printf " 0\t\\\n"; printf "\t) & (1U << ((x) & 31)))\n\n"; + + printf "\n#define %s_MASK_INIT\t\t\t\\", s; + printf "\n\t{\t\t\t\t\t\t\\"; + for (i =3D 0; i < ncapints; i++) + printf "\n\t\t%s_MASK%d,\t\t\t\\", s, i; + printf "\n\t}\n\n"; } =20 printf "#endif /* _ASM_X86_CPUFEATUREMASKS_H */\n"; --=20 2.53.0 From nobody Wed Apr 8 03:08:37 2026 Received: from mail-244116.protonmail.ch (mail-244116.protonmail.ch [109.224.244.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E08A3C65FE for ; Tue, 10 Mar 2026 18:03:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773165810; cv=none; b=OAOGU7Xx4ZC3MwuiHNvGH4TFq/Jr2RW6vIFgXyXEJ6ej7R9D77o4e0pwykB2nFOCD5IGgF5nw0f9oYiF1zcfst/Oyf97RTnSgXtfhuE/4d9a0pnEimhapbgCkHvmqr0X71/mn6tBBYHJdhx29hW7E8TgBe2OPJk4XF4KOMEmTRo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773165810; c=relaxed/simple; bh=7493yfGHFyplGsqxRWRyEFKkUveZX0XaX+7e8ubZ3F4=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=K0soBZ8JrbvJJdUIS8WdINn2MPiLR7Sbg/35R1tvxW+gP/kAjA0P0uqlpwTmFSrVxMuVexdj4xgz0nlVT+Cgl/ZRHlirLUJmn9e4UU4onerUD9/mUyRMkRNNPLHI3IjlDEcJStlta2i+BIHB48wJ7DKgvVOdkfLqYICE69eIczU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=aXMqVj5w; arc=none smtp.client-ip=109.224.244.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="aXMqVj5w" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1773165807; x=1773425007; bh=N9d3l2i9j8xp5Zk8ZHq5d3FCVTfuOM3D2E8hKPZ+/oQ=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=aXMqVj5wEfUE4KtZK1a8VBe0AlIlHlUoty9G5F1SSKz1XMiJQblsRzP6jrrw/lkFx gVO5me+8vJT0U29EhbfQDyAXcI1OZ9EiEUi0Zf6DFvojHG0ggon1WiCfUvS8SU5Rk2 uIyi7l01xImuoWpnHnTtpv6pTSSGkVr3C2kMssdNTDTjYt0LFgKWC6iQdLyX7wFpx6 n8uRGHtwFrHzHzIE573HemQJxYV3LqkSqMm9wWJVe3GwlOLspWpjOeKrX8iKjAOUBn nzpvkqTRdJV2chfEE7hD1SiZOYuM2gpOobIcO9BGiDEMWoT7giXOd3G047xCuQO+eK 0ByVR/dyCxLyA== Date: Tue, 10 Mar 2026 18:03:22 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: sohil.mehta@intel.com, m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v9 2/3] x86/cpu: Check if feature string is non-zero Message-ID: <6443812f9a8a43986f37341d0db5074a2019e80a.1773165421.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 39f6571751e5f535b86a8c3f82844928eacd07e2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman In filter_cpuid_features, x86_cap_flags[] is read, but it's not verified whether the string is non-zero which could lead to unwanted output. In two more places there are open coded paths that try to retrieve a feature string, and if there isn't one, the feature word and bit are returned instead. While correcting filter_cpuid_features() with a helper it's trivial to also clean up these open coded cases. Signed-off-by: Maciej Wieczor-Retman --- Changelog v9: - 16 -> X86_CAP_BUF_SIZE. - Add comment to the x86_cap_name(). Changelog v8: - Move x86_cap_name() declaration from linux/cpu.h to the arch/cpu.h. Include arch/cpu.h in the cpuid-deps.c file instead of linux/cpu.h. Changelog v7: - sizeof(buf) -> 16 - Rebase onto 7.01-rc1. Changelog v6: - Remove parts of the patch message that are redundant and just copy what's visible in the diff. - Redo the helper to use an external char buffer instead of a local static string. arch/x86/include/asm/cpu.h | 4 ++++ arch/x86/kernel/cpu/common.c | 30 +++++++++++++++++++++++++----- arch/x86/kernel/cpu/cpuid-deps.c | 23 +++++------------------ 3 files changed, 34 insertions(+), 23 deletions(-) diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index ad235dda1ded..93e8ad2786bf 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -9,6 +9,8 @@ #include #include =20 +#define X86_CAP_BUF_SIZE 16 + #ifndef CONFIG_SMP #define cpu_physical_id(cpu) boot_cpu_physical_apicid #define cpu_acpi_id(cpu) 0 @@ -67,4 +69,6 @@ int intel_microcode_sanity_check(void *mc, bool print_err= , int hdr_type); =20 extern struct cpumask cpus_stop_mask; =20 +const char *x86_cap_name(unsigned int bit, char *buf); + #endif /* _ASM_X86_CPU_H */ diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 76339e988304..cfffbbda3d95 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -678,6 +678,7 @@ cpuid_dependent_features[] =3D { static void filter_cpuid_features(struct cpuinfo_x86 *c, bool warn) { const struct cpuid_dependent_feature *df; + char feature_buf[X86_CAP_BUF_SIZE]; =20 for (df =3D cpuid_dependent_features; df->feature; df++) { =20 @@ -700,7 +701,7 @@ static void filter_cpuid_features(struct cpuinfo_x86 *c= , bool warn) continue; =20 pr_warn("CPU: CPU feature %s disabled, no CPUID level 0x%x\n", - x86_cap_flags[df->feature], df->level); + x86_cap_name(df->feature, feature_buf), df->level); } } =20 @@ -1637,6 +1638,7 @@ static inline bool parse_set_clear_cpuid(char *arg, b= ool set) =20 while (arg) { bool found __maybe_unused =3D false; + char name_buf[X86_CAP_BUF_SIZE]; unsigned int bit; =20 opt =3D strsep(&arg, ","); @@ -1657,10 +1659,7 @@ static inline bool parse_set_clear_cpuid(char *arg, = bool set) setup_clear_cpu_cap(bit); } /* empty-string, i.e., ""-defined feature flags */ - if (!x86_cap_flags[bit]) - pr_cont(" %d:%d\n", bit >> 5, bit & 31); - else - pr_cont(" %s\n", x86_cap_flags[bit]); + pr_cont(" %s\n", x86_cap_name(bit, name_buf)); =20 taint++; } @@ -1983,6 +1982,27 @@ static void generic_identify(struct cpuinfo_x86 *c) #endif } =20 +/* + * Return the feature "name" if available, otherwise return the + * X86_FEATURE_* numerals to make it easier to identify the feature. + */ +const char *x86_cap_name(unsigned int bit, char *buf) +{ + unsigned int word =3D bit >> 5; + const char *name =3D NULL; + + if (likely(word < NCAPINTS)) + name =3D x86_cap_flags[bit]; + else if (likely(word < NCAPINTS + NBUGINTS)) + name =3D x86_bug_flags[bit - 32 * NCAPINTS]; + + if (name) + return name; + + snprintf(buf, X86_CAP_BUF_SIZE, "%u:%u", word, bit & 31); + return buf; +} + /* * This does the hard work of actually picking apart the CPU stuff... */ diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-d= eps.c index 146f6f8b0650..49fd45b5fbd6 100644 --- a/arch/x86/kernel/cpu/cpuid-deps.c +++ b/arch/x86/kernel/cpu/cpuid-deps.c @@ -2,6 +2,8 @@ #include #include #include + +#include #include =20 struct cpuid_dep { @@ -156,24 +158,9 @@ void setup_clear_cpu_cap(unsigned int feature) do_clear_cpu_cap(NULL, feature); } =20 -/* - * Return the feature "name" if available, otherwise return - * the X86_FEATURE_* numerals to make it easier to identify - * the feature. - */ -static const char *x86_feature_name(unsigned int feature, char *buf) -{ - if (x86_cap_flags[feature]) - return x86_cap_flags[feature]; - - snprintf(buf, 16, "%d*32+%2d", feature / 32, feature % 32); - - return buf; -} - void check_cpufeature_deps(struct cpuinfo_x86 *c) { - char feature_buf[16], depends_buf[16]; + char feature_buf[X86_CAP_BUF_SIZE], depends_buf[X86_CAP_BUF_SIZE]; const struct cpuid_dep *d; =20 for (d =3D cpuid_deps; d->feature; d++) { @@ -185,8 +172,8 @@ void check_cpufeature_deps(struct cpuinfo_x86 *c) */ pr_warn_once("x86 CPU feature dependency check failure: CPU%d has '%s' = enabled but '%s' disabled. Kernel might be fine, but no guarantees.\n", smp_processor_id(), - x86_feature_name(d->feature, feature_buf), - x86_feature_name(d->depends, depends_buf)); + x86_cap_name(d->feature, feature_buf), + x86_cap_name(d->depends, depends_buf)); } } } --=20 2.53.0 From nobody Wed Apr 8 03:08:37 2026 Received: from mail-244122.protonmail.ch (mail-244122.protonmail.ch [109.224.244.122]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23126292B2E for ; Tue, 10 Mar 2026 18:03:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.122 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773165815; cv=none; b=mRZOZnyzUq4AcKPEvCNPXQKlM4VrGqplu73rvCupljGCBm5/jV7eB4oDTuOFijEY4J1ldN+nGYrUw1lKgpJOZQ6sTKWTkdj1N2dAvUJLBdeof4QZZIR487opkkjPWpQtKDzRMMrlYHmUFf837TAv0Lc7m6mwVx0YrQsL2+CBPCA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773165815; c=relaxed/simple; bh=q2MDgSUhNgUkJWl0OF4q99nNet2JDkWEWmxIE81LWTc=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HRYXrxD7tfcg68gGGM2TQSSHQZHcYGD9fP25DfeA/Jq53PidUhKEhybGERCf/MKPCawIZuhxrsx56oDuoH2hcuqI+To1bENvGFJZCcMnFDjYntWnHyDdnRbrGsvJDDIjaYb4w8U690A2+p8scc9KwhnDj+r6vcmRBZNHaFvCyYE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=mbSTgu4C; arc=none smtp.client-ip=109.224.244.122 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="mbSTgu4C" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1773165811; x=1773425011; bh=4emI8WiqH2G2mud2Mslt0Qs3z6vaRupkYs24oZDMoGw=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=mbSTgu4CCeHpmCq+hp4tRLLFbcr9/eauLcWt8hMt2aM5Dtuo39Edya2is8FTmRYPl BQmTGGpXSmt0aAFrkmVfcksNqdAXUDVd8mPeK2CZQY9TPuR8J25LCAYtaxzJIPzhOI yN65JYEXd2X7Exbh6iknHy6DgFznKasUAUCYlI+E2vWbL2twYQc51oZXDYYHGtBAoq wGjmwJA14RMFmram0Dg4jYQHu1Hm6Sz+pkhiZ81VihabsR2diwfP/GVXG97sN0Nmod W8dzsSMbwF/77A5t+HXMhJyNnAsju72qI32AguPl1Q1p/p9saA4J7O3YbGmsj2SQNR DHjfeKE8N8SFg== Date: Tue, 10 Mar 2026 18:03:28 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: sohil.mehta@intel.com, m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v9 3/3] x86/cpu: Do a sanity check on required feature bits Message-ID: <6e64ffe2aef6d87b0f43835b958566035f99865d.1773165421.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 700adce2e333f08aad844d40e41300b05085ccc1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman After CPU identification concludes, do a sanity check by comparing the final x86_capability bitmask with the pre-defined required feature bits. Signed-off-by: Maciej Wieczor-Retman Acked-by: H. Peter Anvin (Intel) --- Changelog v9: - REQUIRED_MASK_INITIALIZER -> REQUIRED_MASK_INIT - Redo the comments. - Fix reverse xmas order. - Inside for_each_set_bit: (void *) -> (unsigned long *). - 16 -> X86_CAP_BUF_SIZE. Changelog v6: - Add Peter's acked-by tag. - Rename patch subject to imperative form. - Add a char buffer to the x86_cap_name() call. arch/x86/kernel/cpu/common.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index cfffbbda3d95..43ee2d55a708 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -2003,6 +2003,34 @@ const char *x86_cap_name(unsigned int bit, char *buf) return buf; } =20 +/* + * As a sanity check compare the final x86_capability bitmask with the ini= tial + * predefined required feature bits. In case of a mismatch emit a warning = with + * all the missing feature names or X86_FEATURE_* numerals. + */ +static void verify_required_features(const struct cpuinfo_x86 *c) +{ + u32 missing[NCAPINTS] =3D REQUIRED_MASK_INIT; + char cap_buf[X86_CAP_BUF_SIZE]; + unsigned int i; + u32 error =3D 0; + + for (i =3D 0; i < NCAPINTS; i++) { + missing[i] &=3D ~c->x86_capability[i]; + error |=3D missing[i]; + } + + if (!error) + return; + + /* At least one required feature is missing */ + pr_warn("cpu %d: missing required feature(s):", c->cpu_index); + for_each_set_bit(i, (unsigned long *)missing, NCAPINTS << 5) + pr_cont(" %s", x86_cap_name(i, cap_buf)); + pr_cont("\n"); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); +} + /* * This does the hard work of actually picking apart the CPU stuff... */ @@ -2132,6 +2160,8 @@ static void identify_cpu(struct cpuinfo_x86 *c) mcheck_cpu_init(c); =20 numa_add_cpu(smp_processor_id()); + + verify_required_features(c); } =20 /* --=20 2.53.0