From nobody Thu Apr 9 13:31:46 2026 Received: from mail-10629.protonmail.ch (mail-10629.protonmail.ch [79.135.106.29]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C5083FFABF for ; Mon, 2 Mar 2026 15:34:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.29 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465698; cv=none; b=NsSJD7G5hYx+aQBjQ+QhRHmzAStTTAWftVfz0HBgVGdwO4qGb1Ssv2qDZDV13k8jDU3aqCJGgXV1gJVSEczUj9YbrxXUXxiai6GVZ77oUFVu6oMUffeLOo0suFO/XkPAwzie/iSoWXRGdnpf2Cm46LUZJz7C1ocg7ki3jGxZx1M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465698; c=relaxed/simple; bh=/P7eSs/YI9GuU2GxaO6McGC5VGXAwnW6Pa3DHc+GVjM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ef5DZjk+V0QrZfT6ml6vq7zoDPhaG3Cw5q68eX8rDn/C39OD2HhefTrQo1ZPjm76FyCokU1giZpjD3pHUZNaLRURoMEvFtV5sZEwxlOXcZdq91Yn8akUQdVEpcl9UcMcYwjOiEIjCCOxk2FdM0QDVNShjB1AF4k+bbpQEAN3Zbk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=HWlDTa1F; arc=none smtp.client-ip=79.135.106.29 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="HWlDTa1F" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1772465695; x=1772724895; bh=ZlcZz7fdQsm7Q8War/X6oCltG7oGV69i06GCdcnX4cQ=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=HWlDTa1F9pscxhPPkV58if4oWOzs5celCny+Xd3YOiuEAY9W6iX5rDie24SWTJ5Wt RGuyArvZsk6aqLH7N3dl138HcPxqtc/OcKJIWXeJS00QQnJE0U8T6QLeU0AwygGxIP wRwd7ye/NGO/qJ9a05vxR+fjIFc+v9sl7KN2P616F6bB6oErHUfhm4he/IMo8JFDrR Oc1iyam/HMTn/Ob2EGwszFAePaR1I1VHhsgtiez31V+cgUsLEWuui6VDYVViJq6g0Z jUlM/Y+bSSbeWgNRhMT+qOqVSHMJFu9a5dgVkHmkSy9+5C+ehK4WeR8/kCFW8z0KRb UPNJv6/bHr/KA== Date: Mon, 02 Mar 2026 15:34:51 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v3 1/3] x86/process: Shorten the default LAM tag width Message-ID: <324da30e8b32576b9a05b3969f6d6a49a4153ba2.1772465456.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: c438c750f29ca643cdf7b63b7362a62d44628d28 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman With the announcement of ChkTag, it's worth preparing a stable x86 linear address masking (lam) user interface. One important aspect of lam is the tag width, and aligning it with other industry solutions can provide a more popular, generalized interface that other technologies could utilize. ChkTag will use 4-bit tags and since that's the direction other memory tagging implementations seem to be taking too (for example Arm's MTE) it's reasonable to converge lam in linux to the same specification. Even though x86's LAM supports 6-bit tags it is beneficial to default lam to 4 bits as ChkTag will likely be the main user of the interface and such connection should simplify things in the future. Signed-off-by: Maciej Wieczor-Retman --- Changelog v3: - Remove the variability of the lam width after the debugfs part was removed from the patchset. arch/x86/kernel/process_64.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 08e72f429870..1a0e96835bbc 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -797,7 +797,7 @@ static long prctl_map_vdso(const struct vdso_image *ima= ge, unsigned long addr) =20 #ifdef CONFIG_ADDRESS_MASKING =20 -#define LAM_U57_BITS 6 +#define LAM_DEFAULT_BITS 4 =20 static void enable_lam_func(void *__mm) { @@ -814,7 +814,7 @@ static void enable_lam_func(void *__mm) static void mm_enable_lam(struct mm_struct *mm) { mm->context.lam_cr3_mask =3D X86_CR3_LAM_U57; - mm->context.untag_mask =3D ~GENMASK(62, 57); + mm->context.untag_mask =3D ~GENMASK(57 + LAM_DEFAULT_BITS - 1, 57); =20 /* * Even though the process must still be single-threaded at this @@ -850,7 +850,7 @@ static int prctl_enable_tagged_addr(struct mm_struct *m= m, unsigned long nr_bits) return -EBUSY; } =20 - if (!nr_bits || nr_bits > LAM_U57_BITS) { + if (!nr_bits || nr_bits > LAM_DEFAULT_BITS) { mmap_write_unlock(mm); return -EINVAL; } @@ -965,7 +965,7 @@ long do_arch_prctl_64(struct task_struct *task, int opt= ion, unsigned long arg2) if (!cpu_feature_enabled(X86_FEATURE_LAM)) return put_user(0, (unsigned long __user *)arg2); else - return put_user(LAM_U57_BITS, (unsigned long __user *)arg2); + return put_user(LAM_DEFAULT_BITS, (unsigned long __user *)arg2); #endif case ARCH_SHSTK_ENABLE: case ARCH_SHSTK_DISABLE: --=20 2.53.0 From nobody Thu Apr 9 13:31:46 2026 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 909283FD15F for ; Mon, 2 Mar 2026 15:35:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465704; cv=none; b=LS1vRyykKzxGLFpZj5/xbi61bSUg6rp9Xkl58R9sfHk8VLpQYhcBW3g++exZjH7Lll4WwazZdTGSKcYOL0Uhrn7kTVIIcf9ThIKqqLLLlVU910xgrPDd8mHTHLzRdOljwIUiJdIX1AlT4fKt4dPzWZDnBKz2cwtQbxNCbUsBWVY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465704; c=relaxed/simple; bh=m9hKwZPyuEzZ8uN5Kiu7EUVvRypg4VjLdMDA4EOO38M=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Yi4gMw+1JuyI2d82LjzF6mRR90Pp6ewtATzBw+xnBD6ByHRRma+WdIi3+adXnFigb2D55dDQPobP8Gc+tfQckO1HyZI9+BPOq4tlT87vqIlTH00viN5l/it7aa3q/kNabstL13UpT70qjwRdtsQSM+atLMtA9G5OzNidtKNQlbo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=a3MstSuK; arc=none smtp.client-ip=185.70.43.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="a3MstSuK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1772465701; x=1772724901; bh=I52Q+KEeiiDsU8FQqfmtTt6VSyBmS0haSG3uGXRUd04=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=a3MstSuKgKqnbSz5w7rT1m2R9aitU7JnDFwPaeOWXcddo+dvko1gcsFao8oXxNtIN JBhDkef8+iGIILXAmMz69H5DEaRKGIhh6QmxmbGP+t+w5jKmMEzo9XKljcQJJ7OiBo 0np1GFKuSnqrz5LyQ83WuRL1QhvbW4Wjt+BphY8U0f5gXydfG3bQy5pi1u4QbJ6+tO 9xDAtNU28sz3a7oAy8RRMJBzdiPFu+WY4yGnUcEoNdYrIABsECcqyT/mPXz6VlK6Lg 5a5H+/dtC9fPXXPM9K67F/3lM3Yk/4QSQEuketR15B7v8WqUo11f/2I6lGzTN0IKjY Q5u/g9yAGoZAw== Date: Mon, 02 Mar 2026 15:34:56 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v3 2/3] x86/mm: Cleanup comments where LAM_U48 is mentioned Message-ID: <0fb7ee92e073b76fa51960ba94dd3215c7155d51.1772465456.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 369533781bbd62e3cd36edb2c144b1b0db403c91 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman For simplicity only the LAM_U57 mode is implemented in the kernel. No matter whether the enabled paging mode is 5-level or 4-level the masked tag bits are the same as on a 5-level system. Remove two mentions of LAM_U48 which implied that it could be enabled. Signed-off-by: Maciej Wieczor-Retman --- arch/x86/include/asm/mmu.h | 2 +- arch/x86/include/asm/tlbflush.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h index 0fe9c569d171..9dcfce439c19 100644 --- a/arch/x86/include/asm/mmu.h +++ b/arch/x86/include/asm/mmu.h @@ -49,7 +49,7 @@ typedef struct { unsigned long flags; =20 #ifdef CONFIG_ADDRESS_MASKING - /* Active LAM mode: X86_CR3_LAM_U48 or X86_CR3_LAM_U57 or 0 (disabled) */ + /* Active LAM mode: X86_CR3_LAM_U57 or 0 (disabled) */ unsigned long lam_cr3_mask; =20 /* Significant bits of the virtual address. Excludes tag bits. */ diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflus= h.h index 5a3cdc439e38..94c5ca1febaf 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -110,7 +110,7 @@ struct tlb_state { /* * Active LAM mode. * - * X86_CR3_LAM_U57/U48 shifted right by X86_CR3_LAM_U57_BIT or 0 if LAM + * X86_CR3_LAM_U57 shifted right by X86_CR3_LAM_U57_BIT or 0 if LAM * disabled. */ u8 lam; --=20 2.53.0 From nobody Thu Apr 9 13:31:46 2026 Received: from mail-244123.protonmail.ch (mail-244123.protonmail.ch [109.224.244.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B8BD43FB06B; Mon, 2 Mar 2026 15:35:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465715; cv=none; b=uRROnmOMQ32HKgHaBCiS4grTm7VkXVUlVYnDZxNGP5ljatW+EIy8XY3492mh21zeh27lhnqAdH6c6xxC9B5zjH+vZK9tBRrSSvztfSyNtD+OYAkkXiHoZVrFLk6kMq4gvoQFrXSmZ+fF6e1OfLLPFPDA5dZQfPvxcZEqAh1bCmk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465715; c=relaxed/simple; bh=V+LNXsXOHKt3EuWsssm3765WRGWiyJ+ep2LC3/3pV64=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=o4RixDIUkGQDWcCUFsyfwWzFjBhBAJaNbdL7xh1O+RnvdGsh8LE23p/blX6+j37zXgNDqE8ZtHW+/oAqjmWbQsxsTjH/98SBYDZWFiWR96XyOz5YpBMU4ZUEjxUZoWuy6eyeABX0jgp//sB7mm591C4bIYW2MBYCJOAbwecge50= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=JvJxCsc7; arc=none smtp.client-ip=109.224.244.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="JvJxCsc7" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1772465711; x=1772724911; bh=Ls78EiQXIyqbG4RhJ8iCingmqRLVnCcv62L4JbYTdKM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=JvJxCsc7XOhhqtKbRgaAX6ezOKuuBaDGEji41qAuCY6DPgwo9QlFpmj6Lz4otAiVW Ifuavq3yJaOj4ARrDVP65sHhSlyeF2NMNgkdm7odE6YqWfsoTDCkL56RF8duzWCvJk GiD3dFVcCr0gGmLnCbfo4WFiKF4WR0rMvZ6kysNZ+Gk71uiFic4ai7yh3xEk/lsFGK tIQh90HGCeW9lVBnDBtXl705sGtiPP7YSZp1hFo8ppvQcW7PYaVzyBH+O3NKz2RkKA hkVqLXQcA8wPTzHCjRAGb61iTE42xaGubeHR8f+YOmYVxqersfDWHG2Tz32jGe+Csj Sxv17N/WVfydw== Date: Mon, 02 Mar 2026 15:35:05 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Shuah Khan From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: [PATCH v3 3/3] selftests/lam: Add test cases for different LAM tag widths Message-ID: <954217ee970deb94d5e11d1260fc885732f6b1dd.1772465456.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 09891961c6297dc0df6c16095e88f03339a858bb Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman After the default tag width in LAM (Linear Address Masking) is set to 4 bits, the value isn't strictly related to the CPU features like LAM_U57 or LAM_U48. To emphasise this, remove mentions of _U57 from the selftest and update the bit width. Signed-off-by: Maciej Wieczor-Retman --- Changelog v3: - Redo the patch after the removal of the debugfs part. tools/testing/selftests/x86/lam.c | 86 +++++++++++++++---------------- 1 file changed, 43 insertions(+), 43 deletions(-) diff --git a/tools/testing/selftests/x86/lam.c b/tools/testing/selftests/x8= 6/lam.c index 1919fa6daec0..d8f75387b931 100644 --- a/tools/testing/selftests/x86/lam.c +++ b/tools/testing/selftests/x86/lam.c @@ -26,9 +26,9 @@ =20 /* LAM modes, these definitions were copied from kernel code */ #define LAM_NONE 0 -#define LAM_U57_BITS 6 +#define LAM_BITS 4 =20 -#define LAM_U57_MASK (0x3fULL << 57) +#define LAM_MASK (0xfULL << 57) /* arch prctl for LAM */ #define ARCH_GET_UNTAG_MASK 0x4001 #define ARCH_ENABLE_TAGGED_ADDR 0x4002 @@ -175,7 +175,7 @@ static int set_lam(unsigned long lam) int ret =3D 0; uint64_t ptr =3D 0; =20 - if (lam !=3D LAM_U57_BITS && lam !=3D LAM_NONE) + if (lam !=3D LAM_BITS && lam !=3D LAM_NONE) return -1; =20 /* Skip check return */ @@ -185,8 +185,8 @@ static int set_lam(unsigned long lam) syscall(SYS_arch_prctl, ARCH_GET_UNTAG_MASK, &ptr); =20 /* Check mask returned is expected */ - if (lam =3D=3D LAM_U57_BITS) - ret =3D (ptr !=3D ~(LAM_U57_MASK)); + if (lam =3D=3D LAM_BITS) + ret =3D (ptr !=3D ~(LAM_MASK)); else if (lam =3D=3D LAM_NONE) ret =3D (ptr !=3D -1ULL); =20 @@ -204,8 +204,8 @@ static unsigned long get_default_tag_bits(void) perror("Fork failed."); } else if (pid =3D=3D 0) { /* Set LAM mode in child process */ - if (set_lam(LAM_U57_BITS) =3D=3D 0) - lam =3D LAM_U57_BITS; + if (set_lam(LAM_BITS) =3D=3D 0) + lam =3D LAM_BITS; else lam =3D LAM_NONE; exit(lam); @@ -230,8 +230,8 @@ static int get_lam(void) return -1; =20 /* Check mask returned is expected */ - if (ptr =3D=3D ~(LAM_U57_MASK)) - ret =3D LAM_U57_BITS; + if (ptr =3D=3D ~(LAM_MASK)) + ret =3D LAM_BITS; else if (ptr =3D=3D -1ULL) ret =3D LAM_NONE; =20 @@ -247,10 +247,10 @@ static uint64_t set_metadata(uint64_t src, unsigned l= ong lam) srand(time(NULL)); =20 switch (lam) { - case LAM_U57_BITS: /* Set metadata in bits 62:57 */ + case LAM_BITS: /* Set metadata in bits 62:57 */ /* Get a random non-zero value as metadata */ - metadata =3D (rand() % ((1UL << LAM_U57_BITS) - 1) + 1) << 57; - metadata |=3D (src & ~(LAM_U57_MASK)); + metadata =3D (rand() % ((1UL << LAM_BITS) - 1) + 1) << 57; + metadata |=3D (src & ~(LAM_MASK)); break; default: metadata =3D src; @@ -291,7 +291,7 @@ int handle_max_bits(struct testcases *test) unsigned long bits =3D 0; =20 if (exp_bits !=3D LAM_NONE) - exp_bits =3D LAM_U57_BITS; + exp_bits =3D LAM_BITS; =20 /* Get LAM max tag bits */ if (syscall(SYS_arch_prctl, ARCH_GET_MAX_TAG_BITS, &bits) =3D=3D -1) @@ -719,8 +719,8 @@ int do_uring(unsigned long lam) uint64_t addr =3D ((uint64_t)fi->iovecs[i].iov_base); =20 switch (lam) { - case LAM_U57_BITS: /* Clear bits 62:57 */ - addr =3D (addr & ~(LAM_U57_MASK)); + case LAM_BITS: /* Clear bits 62:57 */ + addr =3D (addr & ~(LAM_MASK)); break; } free((void *)addr); @@ -937,14 +937,14 @@ static void run_test(struct testcases *test, int coun= t) static struct testcases uring_cases[] =3D { { .later =3D 0, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D handle_uring, - .msg =3D "URING: LAM_U57. Dereferencing pointer with metadata\n", + .msg =3D "URING: LAM. Dereferencing pointer with metadata\n", }, { .later =3D 1, .expected =3D 1, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D handle_uring, .msg =3D "URING:[Negative] Disable LAM. Dereferencing pointer with metad= ata.\n", }, @@ -953,14 +953,14 @@ static struct testcases uring_cases[] =3D { static struct testcases malloc_cases[] =3D { { .later =3D 0, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D handle_malloc, - .msg =3D "MALLOC: LAM_U57. Dereferencing pointer with metadata\n", + .msg =3D "MALLOC: LAM. Dereferencing pointer with metadata\n", }, { .later =3D 1, .expected =3D 2, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D handle_malloc, .msg =3D "MALLOC:[Negative] Disable LAM. Dereferencing pointer with meta= data.\n", }, @@ -976,41 +976,41 @@ static struct testcases bits_cases[] =3D { static struct testcases syscall_cases[] =3D { { .later =3D 0, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D handle_syscall, - .msg =3D "SYSCALL: LAM_U57. syscall with metadata\n", + .msg =3D "SYSCALL: LAM. syscall with metadata\n", }, { .later =3D 1, .expected =3D 1, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D handle_syscall, .msg =3D "SYSCALL:[Negative] Disable LAM. Dereferencing pointer with met= adata.\n", }, { .later =3D GET_USER_USER, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D get_user_syscall, .msg =3D "GET_USER: get_user() and pass a properly tagged user pointer.\= n", }, { .later =3D GET_USER_KERNEL_TOP, .expected =3D 1, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D get_user_syscall, .msg =3D "GET_USER:[Negative] get_user() with a kernel pointer and the t= op bit cleared.\n", }, { .later =3D GET_USER_KERNEL_BOT, .expected =3D 1, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D get_user_syscall, .msg =3D "GET_USER:[Negative] get_user() with a kernel pointer and the b= ottom sign-extension bit cleared.\n", }, { .later =3D GET_USER_KERNEL, .expected =3D 1, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D get_user_syscall, .msg =3D "GET_USER:[Negative] get_user() and pass a kernel pointer.\n", }, @@ -1020,60 +1020,60 @@ static struct testcases mmap_cases[] =3D { { .later =3D 1, .expected =3D 0, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .addr =3D HIGH_ADDR, .test_func =3D handle_mmap, - .msg =3D "MMAP: First mmap high address, then set LAM_U57.\n", + .msg =3D "MMAP: First mmap high address, then set LAM.\n", }, { .later =3D 0, .expected =3D 0, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .addr =3D HIGH_ADDR, .test_func =3D handle_mmap, - .msg =3D "MMAP: First LAM_U57, then High address.\n", + .msg =3D "MMAP: First LAM, then High address.\n", }, { .later =3D 0, .expected =3D 0, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .addr =3D LOW_ADDR, .test_func =3D handle_mmap, - .msg =3D "MMAP: First LAM_U57, then Low address.\n", + .msg =3D "MMAP: First LAM, then Low address.\n", }, }; =20 static struct testcases inheritance_cases[] =3D { { .expected =3D 0, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D handle_inheritance, - .msg =3D "FORK: LAM_U57, child process should get LAM mode same as paren= t\n", + .msg =3D "FORK: LAM, child process should get LAM mode same as parent\n", }, { .expected =3D 0, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D handle_thread, - .msg =3D "THREAD: LAM_U57, child thread should get LAM mode same as pare= nt\n", + .msg =3D "THREAD: LAM, child thread should get LAM mode same as parent\n= ", }, { .expected =3D 1, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D handle_thread_enable, .msg =3D "THREAD: [NEGATIVE] Enable LAM in child.\n", }, { .expected =3D 1, .later =3D 1, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D handle_thread, .msg =3D "THREAD: [NEGATIVE] Enable LAM in parent after thread created.\= n", }, { .expected =3D 0, - .lam =3D LAM_U57_BITS, + .lam =3D LAM_BITS, .test_func =3D handle_execve, - .msg =3D "EXECVE: LAM_U57, child process should get disabled LAM mode\n", + .msg =3D "EXECVE: LAM, child process should get disabled LAM mode\n", }, }; =20 @@ -1224,7 +1224,7 @@ int handle_pasid(struct testcases *test) if (tmp & 0x1) { /* run set lam mode*/ if ((runed & 0x1) =3D=3D 0) { - err =3D set_lam(LAM_U57_BITS); + err =3D set_lam(LAM_BITS); runed =3D runed | 0x1; } else err =3D 1; --=20 2.53.0