From nobody Thu Apr 9 13:31:47 2026 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 500D9430BB1; Mon, 2 Mar 2026 15:25:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465122; cv=none; b=WlMprsGdOguYM4Qb6JONRPVLZAOjP/Vy65UlKJoaGLdrtdplrE35g5QsYI9680VdsYJcu27+zmURNgOZceIGRgEuc2GccLO1FQ5K59PgrlT7AdwsrIjTXPp1Nbf/+TRI6E391ccaV9XXjmqD8ClrkSzblFWV3AonfW+8DAefejk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465122; c=relaxed/simple; bh=6YiO3aEEMJaPzYYMxUMPBSbOzfWX3uI2ARHdUHzLVj4=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=uBzqIZOfxr6qA1+2yK0bTiq6FAfkxJi8kKqVHusPGW6BfgrWtb74jjMXkKn23Gi4DUSyN98yXef0ZkZ+QfMnmRkMoCvsQ8AChdSTpBIyHk4rVs8W53hfWxIPIbEITbO6l8C0hcI0N/kN/aomg49csCUn1fCPLWOYIMX1QUMi8f8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=gI3wxZtM; arc=none smtp.client-ip=185.70.43.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="gI3wxZtM" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1772465113; x=1772724313; bh=QrkeH5U9fQQelEPd+SKbWGI2+T7gqRMRbmw70mxyA5Q=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=gI3wxZtMJ/YHHlteofLz9tgobEzpL4Cy+Z9E67K/zgs+K4HCuBi9JZu+CAj1VnrFm ZjLozTRCYoee2ap48PIJ6dtnP4lpad17OEzsIbkqSNOE50HB1H0HKoUAi/S5Gm3ddM nvm7yj70l4eLnRl7JUY6+uzyBrb2SyWR7FXYMcq8gI4TW8G9oYACAWIgBce9rNQ7CK IANgjqpJ8abwcF5jznJygyp7bwgZoXEh2MI4uob6hzbt7+uhLUtacM5WpWLxbdIyKP W8gZ8DZhPXwiufkBOrCZT2ZmJxXIfVyiaR6jaGMNytcHUKf125jkZt68qHuRov6Dkc 6CYaUQiELOPDw== Date: Mon, 02 Mar 2026 15:25:10 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Farrah Chen , Maciej Wieczor-Retman , stable@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 1/3] x86/cpu: Clear feature bits disabled at compile-time Message-ID: In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: bec042c3e9c91a789964897fc23067bf2f58798d Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman If some config options are disabled during compile time, they still are enumerated in macros that use the x86_capability bitmask - cpu_has() or this_cpu_has(). The features are also visible in /proc/cpuinfo even though they are not enabled - which is contrary to what the documentation states about the file. Examples of such feature flags are lam, fred, sgx, ibrs_enhanced, split_lock_detect, user_shstk, avx_vnni and enqcmd. Once the cpu_caps_cleared array is initialized with the autogenerated disabled bitmask apply_forced_caps() will clear the corresponding bits in boot_cpu_data.x86_capability[] and other secondary cpus' cpu_data.x86_capability[]. Thus features disabled at compile time won't show up in /proc/cpuinfo. Reported-by: Farrah Chen Closes: https://bugzilla.kernel.org/show_bug.cgi?id=3D220348 Signed-off-by: Maciej Wieczor-Retman Cc: # 6.18.x --- Changelog v6: - Remove patch message portions that are not just describing the diff. arch/x86/kernel/cpu/common.c | 3 ++- arch/x86/tools/cpufeaturemasks.awk | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 1c3261cae40c..9aa11224a038 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -732,7 +732,8 @@ static const char *table_lookup_model(struct cpuinfo_x8= 6 *c) } =20 /* Aligned to unsigned long to avoid split lock in atomic bitmap ops */ -__u32 cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long= )); +__u32 cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long= )) =3D + DISABLED_MASK_INITIALIZER; __u32 cpu_caps_set[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long)); =20 #ifdef CONFIG_X86_32 diff --git a/arch/x86/tools/cpufeaturemasks.awk b/arch/x86/tools/cpufeature= masks.awk index 173d5bf2d999..b7f4e775a365 100755 --- a/arch/x86/tools/cpufeaturemasks.awk +++ b/arch/x86/tools/cpufeaturemasks.awk @@ -82,6 +82,12 @@ END { } printf " 0\t\\\n"; printf "\t) & (1U << ((x) & 31)))\n\n"; + + printf "\n#define %s_MASK_INITIALIZER\t\t\t\\", s; + printf "\n\t{\t\t\t\t\t\t\\"; + for (i =3D 0; i < ncapints; i++) + printf "\n\t\t%s_MASK%d,\t\t\t\\", s, i; + printf "\n\t}\n\n"; } =20 printf "#endif /* _ASM_X86_CPUFEATUREMASKS_H */\n"; --=20 2.53.0 From nobody Thu Apr 9 13:31:47 2026 Received: from mail-43100.protonmail.ch (mail-43100.protonmail.ch [185.70.43.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C280387372 for ; Mon, 2 Mar 2026 15:25:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.100 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465129; cv=none; b=ev3HJJ5QA+y9XMTRZjzPrQeG4CIGdeJruvtJsPH12Jkv9rEhNLl/6qJzXb0CFHf70gdpkcKeDqyZoK7aT+KJwU15IrJus7p307dPYkhGbGm2IVBitNs+6Yh/Y/Zh2vuYTSqE9YPwCJBdHzCJHHQ8MQa5IEYMi9rSIHjEI+Q3+Sw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465129; c=relaxed/simple; bh=R8gs0a9frPg8YHJWzQqNY/KjbcEDx+CjZhcEhtEJwZM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=UgcMeTnpyuxeZrte3+Yb43GBh+ufg2I0AJMbRBWlfKcjtMfFkxfU/v2G2hR9DTXrtMB9Q9W02SUVBRsVrhmS/0MLXz31j3yrotA015qoYrrUMc27hIxXShLIuHgc1Srx+cr12PrV2v1ejCJx6fRIfKjTFkDw0N50e7zJuo0KmoI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=OEsj29Rd; arc=none smtp.client-ip=185.70.43.100 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="OEsj29Rd" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1772465119; x=1772724319; bh=x6NHFw6aMcvxQkYoWAujQcwlfrRRG1PsoIkGue9OucY=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=OEsj29Rdk1rJrv6LPbycqpp4VF1rbzyK57EElNU8kvsXEJcZcg2hCPvi54mnT+tnR odiFfRKXO2VxA0JIoELq52QHnBlMMsBMhyAIM8efCKFgyMQ08ycyX9e1L8dwqbU66P 0JRCuzr49yIkMm9/MZwLlhikCMHH0W0jWsWWn0KjUqiEnwplNLW3RhUa+VqbOMJ4ZS pVQh/MfsNMFpTFs+GkAcDj7u985+L8gZggj8LiTgIMcz0A7NOI9/7QqWiKDILUVNyg hkt1sJ7ojbdzyIOABdjXEGsKatUz9AqApYJa5rgZ/Uij8XEh9UyCQ0o7hN7+lyqNL7 TUW92tpFatojg== Date: Mon, 02 Mar 2026 15:25:16 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v8 2/3] x86/cpu: Check if feature string is non-zero Message-ID: In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 3c266bf1084fd198960028b6d8e8be6e4862433f Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman In filter_cpuid_features, x86_cap_flags[] is read, but it's not verified whether the string is non-zero which could lead to unwanted output. In two more places there are open coded paths that try to retrieve a feature string, and if there isn't one, the feature word and bit are returned instead. While correcting filter_cpuid_features() with a helper it's trivial to also clean up these open coded cases. Signed-off-by: Maciej Wieczor-Retman --- Changelog v8: - Move x86_cap_name() declaration from linux/cpu.h to the arch/cpu.h. Include arch/cpu.h in the cpuid-deps.c file instead of linux/cpu.h. Changelog v7: - sizeof(buf) -> 16 - Rebase onto 7.01-rc1. Changelog v6: - Remove parts of the patch message that are redundant and just copy what's visible in the diff. - Redo the helper to use an external char buffer instead of a local static string. arch/x86/include/asm/cpu.h | 2 ++ arch/x86/kernel/cpu/common.c | 26 +++++++++++++++++++++----- arch/x86/kernel/cpu/cpuid-deps.c | 20 +++----------------- 3 files changed, 26 insertions(+), 22 deletions(-) diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index ad235dda1ded..fdf9566e2272 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -67,4 +67,6 @@ int intel_microcode_sanity_check(void *mc, bool print_err= , int hdr_type); =20 extern struct cpumask cpus_stop_mask; =20 +const char *x86_cap_name(unsigned int bit, char *buf); + #endif /* _ASM_X86_CPU_H */ diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 9aa11224a038..b60269174d95 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -675,6 +675,7 @@ cpuid_dependent_features[] =3D { static void filter_cpuid_features(struct cpuinfo_x86 *c, bool warn) { const struct cpuid_dependent_feature *df; + char feature_buf[16]; =20 for (df =3D cpuid_dependent_features; df->feature; df++) { =20 @@ -697,7 +698,7 @@ static void filter_cpuid_features(struct cpuinfo_x86 *c= , bool warn) continue; =20 pr_warn("CPU: CPU feature %s disabled, no CPUID level 0x%x\n", - x86_cap_flags[df->feature], df->level); + x86_cap_name(df->feature, feature_buf), df->level); } } =20 @@ -1634,6 +1635,7 @@ static inline bool parse_set_clear_cpuid(char *arg, b= ool set) =20 while (arg) { bool found __maybe_unused =3D false; + char name_buf[16]; unsigned int bit; =20 opt =3D strsep(&arg, ","); @@ -1654,10 +1656,7 @@ static inline bool parse_set_clear_cpuid(char *arg, = bool set) setup_clear_cpu_cap(bit); } /* empty-string, i.e., ""-defined feature flags */ - if (!x86_cap_flags[bit]) - pr_cont(" %d:%d\n", bit >> 5, bit & 31); - else - pr_cont(" %s\n", x86_cap_flags[bit]); + pr_cont(" %s\n", x86_cap_name(bit, name_buf)); =20 taint++; } @@ -1980,6 +1979,23 @@ static void generic_identify(struct cpuinfo_x86 *c) #endif } =20 +const char *x86_cap_name(unsigned int bit, char *buf) +{ + unsigned int word =3D bit >> 5; + const char *name =3D NULL; + + if (likely(word < NCAPINTS)) + name =3D x86_cap_flags[bit]; + else if (likely(word < NCAPINTS + NBUGINTS)) + name =3D x86_bug_flags[bit - 32 * NCAPINTS]; + + if (name) + return name; + + snprintf(buf, 16, "%u:%u", word, bit & 31); + return buf; +} + /* * This does the hard work of actually picking apart the CPU stuff... */ diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-d= eps.c index 146f6f8b0650..dfd79b06ab7b 100644 --- a/arch/x86/kernel/cpu/cpuid-deps.c +++ b/arch/x86/kernel/cpu/cpuid-deps.c @@ -2,6 +2,7 @@ #include #include #include +#include #include =20 struct cpuid_dep { @@ -156,21 +157,6 @@ void setup_clear_cpu_cap(unsigned int feature) do_clear_cpu_cap(NULL, feature); } =20 -/* - * Return the feature "name" if available, otherwise return - * the X86_FEATURE_* numerals to make it easier to identify - * the feature. - */ -static const char *x86_feature_name(unsigned int feature, char *buf) -{ - if (x86_cap_flags[feature]) - return x86_cap_flags[feature]; - - snprintf(buf, 16, "%d*32+%2d", feature / 32, feature % 32); - - return buf; -} - void check_cpufeature_deps(struct cpuinfo_x86 *c) { char feature_buf[16], depends_buf[16]; @@ -185,8 +171,8 @@ void check_cpufeature_deps(struct cpuinfo_x86 *c) */ pr_warn_once("x86 CPU feature dependency check failure: CPU%d has '%s' = enabled but '%s' disabled. Kernel might be fine, but no guarantees.\n", smp_processor_id(), - x86_feature_name(d->feature, feature_buf), - x86_feature_name(d->depends, depends_buf)); + x86_cap_name(d->feature, feature_buf), + x86_cap_name(d->depends, depends_buf)); } } } --=20 2.53.0 From nobody Thu Apr 9 13:31:47 2026 Received: from mail-10629.protonmail.ch (mail-10629.protonmail.ch [79.135.106.29]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DEC5430BB1 for ; Mon, 2 Mar 2026 15:25:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.29 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465135; cv=none; b=aWYRd+73CD40jAKOBzwKPX1jEVvfsa3vjOoaWeEz+AFTYdDeIKfhdTWdKrI+RZdwTvTZYBbw5QdqMmyUwHm146tMxNL90+oMDpVkhjMo/DNtCTl1OTxZO38x36BmDqcdfE+u3irf6lxAlpZihOA4s9l65xDcTyc+ViGUNnTcIFI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772465135; c=relaxed/simple; bh=W/jXrBgIO9+EboueK2sOIcsEv6y1c6w1EYf424tdK4E=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=FZ2eFolDQVlaA9GbTn373pxuXqNC0jNSi2bERNJYGO70GOWxm+bYL7qLBqFkw13OZFKFYwiw07xiCvw/tFSoSRkVBhj+cKZOPiK9zlKubOp9C7fXhlFL2/nJU17yCMlygvYroshQ7xDJVQ50fRgGxM/W3lYXFdG3FHxDjiJxIOg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=pZwiJQpU; arc=none smtp.client-ip=79.135.106.29 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="pZwiJQpU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1772465126; x=1772724326; bh=lZYJLJYJy9Abdfa0vHX46yngB70wL0ZLZDP7LSihGeA=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=pZwiJQpUwk3EzP3H0JVrTi0UG/Iz+PKGe9ea5fLgKtsW0BFIR2a+MVBJXQ512kWy+ 9Yqns4aB5lKVHh0W6ytsfKK78tJGFhxFMWnoN6rCZn6Cb99t0WO8wVs6Or0kpNsTEN FIgwvMFGh5i5C+US//GAS5Mfr/EEFieTkBi0XPq/7st7AUG2CHL/LOTah9ltx3pzN7 TTPnbTLsPtRZg1YtbnHuCq18Gr/vFUXYzv8OHm9pEjaLPLMk9Y9HLx306BN2cE9SoH Vw/yCpEzohxLBDmRCpqHY7kdI/wUzmE4xIliQTx5cQ8hsM/Ponkby1HG+nWHf5uI4n tu5qv5qmEnlBw== Date: Mon, 02 Mar 2026 15:25:23 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v8 3/3] x86/cpu: Do a sanity check on required feature bits Message-ID: <39306e7e736f76530db62302f1dfa3b94a479861.1772453012.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: cd6dcacf73621a479d64e10bafa30f0c190daa1a Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman After cpu identification concludes, do a sanity check by comparing the final x86_capability bitmask with the pre-defined required feature bits. Signed-off-by: Maciej Wieczor-Retman Acked-by: H. Peter Anvin (Intel) --- Changelog v6: - Add Peter's acked-by tag. - Rename patch subject to imperative form. - Add a char buffer to the x86_cap_name() call. arch/x86/kernel/cpu/common.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index b60269174d95..cecbd0b95a15 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1996,6 +1996,37 @@ const char *x86_cap_name(unsigned int bit, char *buf) return buf; } =20 +/* + * As a sanity check compare the final x86_capability bitmask with the ini= tial + * predefined required feature bits. In case of a mismatch emit a warning = with + * the faulty bitmask value. + */ +static void verify_required_features(const struct cpuinfo_x86 *c) +{ + u32 missing[NCAPINTS] =3D REQUIRED_MASK_INITIALIZER; + char cap_buf[16]; + u32 error =3D 0; + unsigned int i; + + for (i =3D 0; i < NCAPINTS; i++) { + missing[i] &=3D ~c->x86_capability[i]; + error |=3D missing[i]; + } + + if (!error) + return; /* All good */ + + /* + * At least one required feature is missing. Print a warning, + * and taint the kernel. + */ + pr_warn("cpu %d: missing required feature(s):", c->cpu_index); + for_each_set_bit(i, (void *)missing, NCAPINTS << 5) + pr_cont(" %s", x86_cap_name(i, cap_buf)); + pr_cont("\n"); + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); +} + /* * This does the hard work of actually picking apart the CPU stuff... */ @@ -2125,6 +2156,8 @@ static void identify_cpu(struct cpuinfo_x86 *c) mcheck_cpu_init(c); =20 numa_add_cpu(smp_processor_id()); + + verify_required_features(c); } =20 /* --=20 2.53.0