From nobody Fri Apr 17 01:44:07 2026 Received: from mail-244116.protonmail.ch (mail-244116.protonmail.ch [109.224.244.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4619739C648 for ; Tue, 24 Feb 2026 13:22:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771939334; cv=none; b=TXQ34Ekb02txocbocmdSXX1NOLkmBXtmp7L9AlKS8+KBQ1zqSxjUqyTFPYF9mHylJzQxyOT9JHhTWYQ/FjgRrR58eNdzmJIx2bcKiNWUCCtlDxUvpFXyKGkCWIuhMYIyY3dUFC+VTWOG2NzFUQErFRWxZvh/iS6S6WoGmZn8ArQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771939334; c=relaxed/simple; bh=1bfrl0rvJgZM4xaTBOowQnw82D3EkUVvRuldPgRbDM8=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fhiLUHgRe7jm96Z/HcBldVPZ5U/Ka9XhB9F5ryPOA0WJzWnMft0spUU+wvMKP82VFivza1pk0fUs7iw24d/fQElRrAzjfChEaxvDD4aZJhSZeGxuTLnpjxCNCh6eidZpGoIdSvn2DQSifzQp7Trzog0ld6ADkpABajbqmdgcj9s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=Zzbjniop; arc=none smtp.client-ip=109.224.244.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="Zzbjniop" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1771939325; x=1772198525; bh=ShB6pzT3xTINdJHP+p4sqD1Dt+VgPVGerWJYnFBiSYI=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=Zzbjniop27X1vrjD7J6rhEYEerHnBkctcqP3MiUJAPvBIVs5AipoG19WOHzwFeHPc 9/VxWpCWe7kK1VViy5lLBu2HQTaoSDdc4gAMz7bwRju7Jn94XPL0zJ8ezO0mH0a7A4 o1cbc6FUcM8i3aqamFy8Ely2sMu0SfiJkNK4+b8pvR/ZOCgOz1ZjRDd5V9/1IuO+m8 02I5bTE+KDarN1d4yhb0bJGCqbNz2m9U1Zs95e3QR2ewJTEao88UAnvMbpequwRbAR q63PRxNgTNW2ecMO2Sy6acDQ8Y00tZXkfmJjgrfnRMrdOuTDwHltaTj56u4AqWM+tI ikf4ZDajCsSug== Date: Tue, 24 Feb 2026 13:22:01 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v2 1/4] x86/process: Shorten the default LAM tag width Message-ID: <3f6dc17587217f8cf7b36010055edef2668a4493.1771938156.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 57765361c678a9af313a70937e426bcb0da322c6 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman With the announcement of ChkTag, it's worth preparing a stable x86 linear address masking (lam) user interface. One important aspect of lam is the tag width, and aligning it with other industry solutions can provide a more popular, generalized interface that other technologies could utilize. ChkTag will use 4-bit tags and since that's the direction other memory tagging implementations seem to be taking too (for example Arm's MTE) it's reasonable to converge lam in linux to the same specification. Even though x86's LAM supports 6-bit tags it is beneficial to default lam to 4 bits as ChkTag will likely be the main user of the interface and such connection should simplify things in the future. Set the default tag width to 4 bits and make it variable. While static keys were considered to implement it, the LAM tag width isn't used in any performance intensive code paths, and doesn't justify anything more than a simple global variable. Signed-off-by: Maciej Wieczor-Retman --- arch/x86/include/asm/mmu_context.h | 3 +++ arch/x86/kernel/process_64.c | 15 +++++++++------ 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_= context.h index 1acafb1c6a93..f8b2e8b855a1 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -86,6 +86,9 @@ static inline void switch_ldt(struct mm_struct *prev, str= uct mm_struct *next) #endif =20 #ifdef CONFIG_ADDRESS_MASKING + +extern unsigned long lam_available_bits; + static inline unsigned long mm_lam_cr3_mask(struct mm_struct *mm) { /* diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 08e72f429870..4a217f13ab90 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -797,7 +797,10 @@ static long prctl_map_vdso(const struct vdso_image *im= age, unsigned long addr) =20 #ifdef CONFIG_ADDRESS_MASKING =20 -#define LAM_U57_BITS 6 +#define LAM_MAX_BITS 6 +#define LAM_DEFAULT_BITS 4 + +unsigned long lam_available_bits =3D LAM_DEFAULT_BITS; =20 static void enable_lam_func(void *__mm) { @@ -811,10 +814,10 @@ static void enable_lam_func(void *__mm) } } =20 -static void mm_enable_lam(struct mm_struct *mm) +static void mm_enable_lam(struct mm_struct *mm, unsigned long nr_bits) { mm->context.lam_cr3_mask =3D X86_CR3_LAM_U57; - mm->context.untag_mask =3D ~GENMASK(62, 57); + mm->context.untag_mask =3D ~GENMASK(57 + lam_available_bits - 1, 57); =20 /* * Even though the process must still be single-threaded at this @@ -850,12 +853,12 @@ static int prctl_enable_tagged_addr(struct mm_struct = *mm, unsigned long nr_bits) return -EBUSY; } =20 - if (!nr_bits || nr_bits > LAM_U57_BITS) { + if (!nr_bits || nr_bits > lam_available_bits) { mmap_write_unlock(mm); return -EINVAL; } =20 - mm_enable_lam(mm); + mm_enable_lam(mm, nr_bits); =20 mmap_write_unlock(mm); =20 @@ -965,7 +968,7 @@ long do_arch_prctl_64(struct task_struct *task, int opt= ion, unsigned long arg2) if (!cpu_feature_enabled(X86_FEATURE_LAM)) return put_user(0, (unsigned long __user *)arg2); else - return put_user(LAM_U57_BITS, (unsigned long __user *)arg2); + return put_user(lam_available_bits, (unsigned long __user *)arg2); #endif case ARCH_SHSTK_ENABLE: case ARCH_SHSTK_DISABLE: --=20 2.53.0 From nobody Fri Apr 17 01:44:07 2026 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B8F039C658 for ; Tue, 24 Feb 2026 13:22:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771939340; cv=none; b=raQs06mupUdRpiGyF2X05CDTszBb08fy5CUbqc5zKEBUtZCMQWC+UtZBUy1wfFTj7hLMQeMayrFdaNoKYa4uYJ+eWDsskuX4Z5AHVcDvIxRHnknnYfpiNLMu/DWacYRmlAilqWRCxGd+HKWmQqmmzq42EU2oxLGgMhqOWjdGhEQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771939340; c=relaxed/simple; bh=xEwpYsciTzhbJ9KlBJi0YdSmR6liq4D0SBAftoljPlQ=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Lg4v+WXfnmbOTnTyTEytPZiG7DZmXPQmPc6xW00985ZSQB5gkHacT9D6p5JMA+L5XZSIsk10xy0k0LroTU5m4nw82uL2/ms1qMsycfVUBIUKb8fkNccaQfA3B/+BqW7H20nLEYaMuDxiW+X6ZYN64wQSq7K+9kyaSYNcTVaqk1g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=COM/8FjX; arc=none smtp.client-ip=185.70.43.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="COM/8FjX" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1771939331; x=1772198531; bh=w0hE79ZF8SMp5V3NOUXCzsku5SAAxE2+7d2eB3VFpSM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=COM/8FjXjPTlZ+ESfCIj/wd9ylNudWWzgmg0bNK3MX9yzrOcfLC32yTzFUx6rgNfT pcBhnigJ1jDuw7uYnOnvMhlCcsj8uA8pWh6kbpOleS9No69i219Uea56lTPdhxvSpU HSrdhdhAJJ7HJX5mb2wq8VTUnkWrh3hLYJVYOH0k5NgwrMqlrxSxyGSm7O6qwrjkZa F6Dq+rMnPk8EkoDJtvTog1fpDwg+WsEywUVsqUiH2o0BFuv4CIdcGVfhYioLKT0Y/U uBOXmKzq97QsprpWgsuo7KPhKs2aycKk4rweMKFCrJwGnk5zcTac/B5HcsYZ1gOkap r68cILhYjPoog== Date: Tue, 24 Feb 2026 13:22:07 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v2 2/4] x86/process: Add a debug interface to change LAM tag width Message-ID: <937d23b502c7bacc34a4bb1e45692595f08f704a.1771938156.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 880b0c7d8713a7c1847228cfff255312dfe1b79e Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman While shortening the tag bits to converge the specifications of LAM and ChkTag, the 6 bit wide LAM (Linear Address Masking) tags should still be available to use. Since using this tag width is likely going to be for debug purposes only, using debugfs is the best choice. Signed-off-by: Maciej Wieczor-Retman --- Changelog v2: - Extend buf size from 2 to 3 and remove unused variable. arch/x86/kernel/process_64.c | 55 ++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 4a217f13ab90..1d5b8c8851f1 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -41,6 +41,7 @@ #include #include #include +#include =20 #include #include @@ -802,6 +803,60 @@ static long prctl_map_vdso(const struct vdso_image *im= age, unsigned long addr) =20 unsigned long lam_available_bits =3D LAM_DEFAULT_BITS; =20 +static ssize_t lam_bits_read_file(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + char buf[3]; + unsigned int len; + + len =3D sprintf(buf, "%ld\n", lam_available_bits); + return simple_read_from_buffer(user_buf, count, ppos, buf, len); +} + +/* + * Writing a number to this file changes the used lam tag width. Valid val= ues + * are 4 bit tag width and 6 bit tag width - the second, non-default one is + * meant mostly for debug and shall be deprecated in the future. + */ +static ssize_t lam_bits_write_file(struct file *file, + const char __user *user_buf, size_t count, + loff_t *ppos) +{ + char buf[32]; + ssize_t len; + u8 bits; + + len =3D min(count, sizeof(buf) - 1); + if (copy_from_user(buf, user_buf, len)) + return -EFAULT; + + buf[len] =3D '\0'; + if (kstrtou8(buf, 0, &bits)) + return -EINVAL; + + switch (bits) { + case LAM_DEFAULT_BITS: + case LAM_MAX_BITS: + lam_available_bits =3D bits; + return count; + default: + return -EINVAL; + } +} + +static const struct file_operations fops_lam_bits =3D { + .read =3D lam_bits_read_file, + .write =3D lam_bits_write_file, +}; + +static int __init create_lam_available_bits(void) +{ + debugfs_create_file("lam_available_bits", 0600, + arch_debugfs_dir, NULL, &fops_lam_bits); + return 0; +} +late_initcall(create_lam_available_bits); + static void enable_lam_func(void *__mm) { struct mm_struct *mm =3D __mm; --=20 2.53.0 From nobody Fri Apr 17 01:44:07 2026 Received: from mail-10629.protonmail.ch (mail-10629.protonmail.ch [79.135.106.29]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91E3839C65B for ; Tue, 24 Feb 2026 13:22:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.29 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771939347; cv=none; b=DHr+SDf/LwzrIYCLAfZaA4kj/kFdeTxw3Zh/Jien+oKRh0/vhH3Qa2Dn+8ujP7/yQLXxdcMDLeeAYlaupz79tabXy8pFNiTs5mfPapGECV4Pc1NjyV4I/UM8GOwX5uzY+aufqyXArPZz4pH3FxyFBp6ZblAdOyHiuWFK+vDGofU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771939347; c=relaxed/simple; bh=m9hKwZPyuEzZ8uN5Kiu7EUVvRypg4VjLdMDA4EOO38M=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=db4k5pUzCuZoOySDC3fF2AMszuX+RXpjzpl2i1NRC02NH4MDNkTEbQNpm/jdxobtJ4PY/MDfcGx1V4DcszTYYmLJh5iMHdeMWUnVozmNjyzls6c3c0p6oE+wQ/o7IDsjGgHhXlK+cHFkJ3a+rDPG0yILY/C4jStuQ0KfDM4fZ44= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=JHQvRe2o; arc=none smtp.client-ip=79.135.106.29 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="JHQvRe2o" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1771939337; x=1772198537; bh=I52Q+KEeiiDsU8FQqfmtTt6VSyBmS0haSG3uGXRUd04=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=JHQvRe2o2WUMAdVYHio+by7eravYqw/rl4WyRdxzXdY3+fGRbWKN4qkiUHYdQ97d8 SnU9GGdYIvBKv6l/OsBBMLo2t416N26K1UtHka5hZ0qXYQEKs05Ygf8xvFOxhgiA74 Jf8qTM6lKH83ydBGCyl/XMtDsEb02DlTfzKJT0DAxlKcsz5qRdX7XRjcR8dpPPYkY3 T8+io11wLBD7ngOFNKyM4xZTxKwzgBOwAl/Fx9oQJkzIbe08mjUdKSdrle2G5oDtqt R8kl6UYdqEkppazmRaF71rILCZmvUKSwor7BHgUTEnMIvTcCFFA8uM+rWtSI12sCyn BGJBeKzwiSFzg== Date: Tue, 24 Feb 2026 13:22:12 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v2 3/4] x86/mm: Cleanup comments where LAM_U48 is mentioned Message-ID: In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 8c7701603b56bdae898b721b323dc1e9797300ca Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman For simplicity only the LAM_U57 mode is implemented in the kernel. No matter whether the enabled paging mode is 5-level or 4-level the masked tag bits are the same as on a 5-level system. Remove two mentions of LAM_U48 which implied that it could be enabled. Signed-off-by: Maciej Wieczor-Retman --- arch/x86/include/asm/mmu.h | 2 +- arch/x86/include/asm/tlbflush.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h index 0fe9c569d171..9dcfce439c19 100644 --- a/arch/x86/include/asm/mmu.h +++ b/arch/x86/include/asm/mmu.h @@ -49,7 +49,7 @@ typedef struct { unsigned long flags; =20 #ifdef CONFIG_ADDRESS_MASKING - /* Active LAM mode: X86_CR3_LAM_U48 or X86_CR3_LAM_U57 or 0 (disabled) */ + /* Active LAM mode: X86_CR3_LAM_U57 or 0 (disabled) */ unsigned long lam_cr3_mask; =20 /* Significant bits of the virtual address. Excludes tag bits. */ diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflus= h.h index 5a3cdc439e38..94c5ca1febaf 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -110,7 +110,7 @@ struct tlb_state { /* * Active LAM mode. * - * X86_CR3_LAM_U57/U48 shifted right by X86_CR3_LAM_U57_BIT or 0 if LAM + * X86_CR3_LAM_U57 shifted right by X86_CR3_LAM_U57_BIT or 0 if LAM * disabled. */ u8 lam; --=20 2.53.0 From nobody Fri Apr 17 01:44:07 2026 Received: from mail-24416.protonmail.ch (mail-24416.protonmail.ch [109.224.244.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 75BD139B497 for ; Tue, 24 Feb 2026 13:22:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771939346; cv=none; b=JWF5uLkj8K9CSzBRvVITxnJwQyZNnIJlbqxLfPVDuzCjfhrxzHYGH0w4xmJZfeAxFvl4SFVYxCz2rFDLunzgksW8x4M99whmZ0YTRj6yCVogIeuSEkfHEPoi1Rm0b+v8cmcottliUme4TrGU8mSF3XEe2EQCV7xBYaOVMjA1u3k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771939346; c=relaxed/simple; bh=Key36d9CQNDC2jdXVq+xiTTel29uUeOXeIWgO+AuEUM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=MVrskeCoDY/26PLZMTIFcHY6QmFSGyd/20c0e1GA1QspYt/QbF0GOs8TysRwFLf064gGNiO2rAiAhQk0o1URwx+kVfKvRQ8hdekYaUY0LJY0n9PJuiAUVqQ/tL1nFNU6QIA5WzJw3xTm1iRCt3CQtYipMbor77P63Nzw8ZtD6v8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=Loh2wZd2; arc=none smtp.client-ip=109.224.244.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="Loh2wZd2" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1771939342; x=1772198542; bh=TOcZfslwyOLnqfStp7w1Zf0CKilK3beX2XrqjjIDxw4=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=Loh2wZd2Px79WDDWt/s/kLAGTAk2Gbtv8Bztx2T1qO7tW4kpnwKLJ+L7SBcT1J/Zu lvqUvWtS6bwcLDk9CL3rJRGV1xwiQiNj6rteZ0zABJpaE5B5PJdXcWe6wE50L4cmyA Z7TAsCd+sjKJRPa3qSgzh51sieyu1rPv+5OkN9rXXxFm6YJ4bW8DDtnCxtA8nVw4w5 pcTtXrzdUa14YwvBQ2LjI0LjZaRpbGlRPYTa9QP+arqk6r0oAVbGGWDh8Fx5wz/tO0 p44DI0FvvRnunXlKE2xuJb0y6KeEuvuZfli+7KWRYEjDNFM+Rqiu4FCKBU24xmf2+8 h5Hzqb2hxo8BA== Date: Tue, 24 Feb 2026 13:22:18 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Shuah Khan From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 4/4] selftests/lam: Add test cases for different LAM tag widths Message-ID: <94a499c384d0e8dca0792b04471a6e9146d3e149.1771938156.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: f1f76192fc166356818ce0b678cecfcee7cc2cae Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman After the default tag width in LAM (Linear Address Masking) is set to 4 bits, it's still possible to enable 6 bit wide tags for debug purposes through debugfs. When a program enables LAM, it should be able to, through a syscall, request a number of tag bits equal or smaller to the one used system wide. If it requests a smaller one it should receive the system wide setting anyway. Change the default tag width. Add four tests to check all combinations of tag width requests. Modify the existing test infrastructure to check with a syscall what the needed tag width actually is. Signed-off-by: Maciej Wieczor-Retman --- tools/testing/selftests/x86/lam.c | 87 ++++++++++++++++++++++++++----- 1 file changed, 74 insertions(+), 13 deletions(-) diff --git a/tools/testing/selftests/x86/lam.c b/tools/testing/selftests/x8= 6/lam.c index 1919fa6daec0..9ed2964082eb 100644 --- a/tools/testing/selftests/x86/lam.c +++ b/tools/testing/selftests/x86/lam.c @@ -26,9 +26,11 @@ =20 /* LAM modes, these definitions were copied from kernel code */ #define LAM_NONE 0 -#define LAM_U57_BITS 6 +#define LAM_U57_BITS 4 +#define LAM_MAX_BITS 6 =20 -#define LAM_U57_MASK (0x3fULL << 57) +#define LAM_U57_MASK (0xfULL << 57) +#define LAM_MAX_MASK (0x3fULL << 57) /* arch prctl for LAM */ #define ARCH_GET_UNTAG_MASK 0x4001 #define ARCH_ENABLE_TAGGED_ADDR 0x4002 @@ -175,7 +177,7 @@ static int set_lam(unsigned long lam) int ret =3D 0; uint64_t ptr =3D 0; =20 - if (lam !=3D LAM_U57_BITS && lam !=3D LAM_NONE) + if (lam !=3D LAM_U57_BITS && lam !=3D LAM_MAX_BITS && lam !=3D LAM_NONE) return -1; =20 /* Skip check return */ @@ -184,16 +186,21 @@ static int set_lam(unsigned long lam) /* Get untagged mask */ syscall(SYS_arch_prctl, ARCH_GET_UNTAG_MASK, &ptr); =20 + /* Update lam in case lam6 is enabled */ + syscall(SYS_arch_prctl, ARCH_GET_MAX_TAG_BITS, &lam); + /* Check mask returned is expected */ if (lam =3D=3D LAM_U57_BITS) ret =3D (ptr !=3D ~(LAM_U57_MASK)); + else if (lam =3D=3D LAM_MAX_BITS) + ret =3D (ptr !=3D ~(LAM_MAX_MASK)); else if (lam =3D=3D LAM_NONE) ret =3D (ptr !=3D -1ULL); =20 return ret; } =20 -static unsigned long get_default_tag_bits(void) +static unsigned long get_default_tag_bits(int bits) { pid_t pid; int lam =3D LAM_NONE; @@ -204,8 +211,8 @@ static unsigned long get_default_tag_bits(void) perror("Fork failed."); } else if (pid =3D=3D 0) { /* Set LAM mode in child process */ - if (set_lam(LAM_U57_BITS) =3D=3D 0) - lam =3D LAM_U57_BITS; + if (set_lam(bits) =3D=3D 0) + syscall(SYS_arch_prctl, ARCH_GET_MAX_TAG_BITS, &lam); else lam =3D LAM_NONE; exit(lam); @@ -217,6 +224,27 @@ static unsigned long get_default_tag_bits(void) return lam; } =20 +static int change_lam_width(unsigned char width) +{ + char buf[2]; + int ret, fd; + + snprintf(buf, sizeof(buf), "%u", width); + fd =3D open("/sys/kernel/debug/x86/lam_available_bits", O_WRONLY); + if (fd < 0) { + ksft_print_msg("lam_available_bits debug file not found!\n"); + return fd; + } + + ret =3D write(fd, buf, sizeof(buf)); + if (ret < 0) + return ret; + + close(fd); + + return 0; +} + /* * Set tagged address and read back untag mask. * check if the untag mask is expected. @@ -284,20 +312,32 @@ static int handle_lam_test(void *src, unsigned int la= m) return (!!strcmp((char *)src, (char *)ptr)); } =20 - int handle_max_bits(struct testcases *test) { - unsigned long exp_bits =3D get_default_tag_bits(); - unsigned long bits =3D 0; + unsigned long exp_bits, bits =3D 0; + int ret =3D 1; =20 - if (exp_bits !=3D LAM_NONE) - exp_bits =3D LAM_U57_BITS; + if (test->later) { + ret =3D change_lam_width(LAM_MAX_BITS); + if (ret) + return ret; + } + + exp_bits =3D get_default_tag_bits(test->lam); =20 /* Get LAM max tag bits */ if (syscall(SYS_arch_prctl, ARCH_GET_MAX_TAG_BITS, &bits) =3D=3D -1) - return 1; + goto out; =20 - return (exp_bits !=3D bits); + ret =3D exp_bits !=3D bits; +out: + if (test->later) { + ret =3D change_lam_width(LAM_U57_BITS); + if (ret) + return ret; + } + + return ret; } =20 /* @@ -968,9 +1008,30 @@ static struct testcases malloc_cases[] =3D { =20 static struct testcases bits_cases[] =3D { { + .later =3D 0, + .lam =3D LAM_U57_BITS, .test_func =3D handle_max_bits, .msg =3D "BITS: Check default tag bits\n", }, + { + .later =3D 1, + .lam =3D LAM_U57_BITS, + .test_func =3D handle_max_bits, + .msg =3D "BITS: Check if 4 bits can be requested in 6 bit mode.\n", + }, + { + .later =3D 0, + .expected =3D 1, + .lam =3D LAM_MAX_BITS, + .test_func =3D handle_max_bits, + .msg =3D "BITS:[Negative] Check if 6 bits can be requested in 4 bit mode= .\n", + }, + { + .later =3D 1, + .lam =3D LAM_MAX_BITS, + .test_func =3D handle_max_bits, + .msg =3D "BITS: Check if 6 bits can be requested in 6 bit mode.\n", + }, }; =20 static struct testcases syscall_cases[] =3D { --=20 2.53.0