From nobody Sun Apr 5 13:14:55 2026 Received: from mail-244121.protonmail.ch (mail-244121.protonmail.ch [109.224.244.121]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 69B0133C52A for ; Fri, 20 Feb 2026 12:48:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.121 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771591731; cv=none; b=MtFl8WwDGIOTD/MSUOlAh2vq8aHKrD/ioWAZX9Gum96YP0aftP8ek7fCWLtpT1PbOkwmy8w/YFePkwfDKIHkHcsEXcwgfRmXeJBNZM4F3VQXctEvxxnpu9MgO7f7H9AKBkb6WhXZIEljvAGzEyYmY5oW27EedWPFafZZ3U1fpG4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771591731; c=relaxed/simple; bh=fwo5yrA8tnFuCVXwTTZLFXEh6Y+zgupXZpxGFTof1go=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=TmvnFj6/KxxK+npL3sHw+9BcXeccI6cGrclSchR3CeQH6PpaWRbzV9EK7R4LupNR41K+gpb/khyd/fq0xgvS6BPz7eHp1lNap3FRkIND2xvcBp359YQUPNTHZo7Db9aa5NvVu6lBPB5FKfQikwGuIQs0FWCINUZ9UbX6uU6lK9M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=gGAFAX6H; arc=none smtp.client-ip=109.224.244.121 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="gGAFAX6H" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1771591728; x=1771850928; bh=EfDYb9D9OTmQ3+6P96JtLixgE1pE8l5HhltUA1Ccqv4=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=gGAFAX6Hcr2yGw69nPOYZ01GxILBwgTpGiFgnrlC7paKctg2BLe7s1OWGXi0JyOsh p0qKDfcQEEJj7w92CxVOB+1xKYRxiJ47jTk3XMs6mLKN58hypv+dJuGqaRlS2bXdPG WY321kVbfzwypQSF2pz8CN3WSxERfOXaT6ZI4ZOineeRVZUaAV6N+FxHr9SPrN3IlM XwYO7l9rec8DUdXEvq29Bpxy6jnUsjqJGCp31xOf4WlreDtlp+zuL9a9xgwIGCkABP Y3y5hrLaF8HsGLB6Srl0ENYWEW4YrsfyQG1MAaA2EjbeGvCIoHqSOA6JzYSiQNpBqH 8cX5hZ8Pjk6sA== Date: Fri, 20 Feb 2026 12:48:46 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v1 1/4] x86/process: Shorten the default LAM tag width Message-ID: <19e0b13f42dcf87fbde2d32aad18d89441620acb.1771589807.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: a880345925fd6a2bf680effe6d92394e01d0fa4c Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman With the announcement of ChkTag, it's worth preparing a stable x86 linear address masking (lam) user interface. One important aspect of lam is the tag width, and aligning it with other industry solutions can provide a more popular, generalized interface that other technologies could utilize. ChkTag will use 4-bit tags and since that's the direction other memory tagging implementations seem to be taking too (for example Arm's MTE) it's reasonable to converge lam in linux to the same specification. Even though x86's LAM supports 6-bit tags it is beneficial to default lam to 4 bits as ChkTag will likely be the main user of the interface and such connection should simplify things in the future. Set the default tag width to 4 bits and make it variable. While static keys were considered to implement it, the LAM tag width isn't used in any performance intensive code paths, and doesn't justify anything more than a simple global variable. Signed-off-by: Maciej Wieczor-Retman --- arch/x86/include/asm/mmu_context.h | 3 +++ arch/x86/kernel/process_64.c | 15 +++++++++------ 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_= context.h index 73bf3b1b44e8..13999d48abd6 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -86,6 +86,9 @@ static inline void switch_ldt(struct mm_struct *prev, str= uct mm_struct *next) #endif =20 #ifdef CONFIG_ADDRESS_MASKING + +extern unsigned long lam_available_bits; + static inline unsigned long mm_lam_cr3_mask(struct mm_struct *mm) { /* diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 432c0a004c60..04968b303e66 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -797,7 +797,10 @@ static long prctl_map_vdso(const struct vdso_image *im= age, unsigned long addr) =20 #ifdef CONFIG_ADDRESS_MASKING =20 -#define LAM_U57_BITS 6 +#define LAM_MAX_BITS 6 +#define LAM_DEFAULT_BITS 4 + +unsigned long lam_available_bits =3D LAM_DEFAULT_BITS; =20 static void enable_lam_func(void *__mm) { @@ -811,10 +814,10 @@ static void enable_lam_func(void *__mm) } } =20 -static void mm_enable_lam(struct mm_struct *mm) +static void mm_enable_lam(struct mm_struct *mm, unsigned long nr_bits) { mm->context.lam_cr3_mask =3D X86_CR3_LAM_U57; - mm->context.untag_mask =3D ~GENMASK(62, 57); + mm->context.untag_mask =3D ~GENMASK(57 + lam_available_bits - 1, 57); =20 /* * Even though the process must still be single-threaded at this @@ -850,12 +853,12 @@ static int prctl_enable_tagged_addr(struct mm_struct = *mm, unsigned long nr_bits) return -EBUSY; } =20 - if (!nr_bits || nr_bits > LAM_U57_BITS) { + if (!nr_bits || nr_bits > lam_available_bits) { mmap_write_unlock(mm); return -EINVAL; } =20 - mm_enable_lam(mm); + mm_enable_lam(mm, nr_bits); =20 mmap_write_unlock(mm); =20 @@ -965,7 +968,7 @@ long do_arch_prctl_64(struct task_struct *task, int opt= ion, unsigned long arg2) if (!cpu_feature_enabled(X86_FEATURE_LAM)) return put_user(0, (unsigned long __user *)arg2); else - return put_user(LAM_U57_BITS, (unsigned long __user *)arg2); + return put_user(lam_available_bits, (unsigned long __user *)arg2); #endif case ARCH_SHSTK_ENABLE: case ARCH_SHSTK_DISABLE: --=20 2.53.0 From nobody Sun Apr 5 13:14:55 2026 Received: from mail-05.mail-europe.com (mail-05.mail-europe.com [85.9.206.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91E0A344D86 for ; Fri, 20 Feb 2026 12:49:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=85.9.206.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771591752; cv=none; b=g99d3wKAdUEIsNIGGo4cRVoYpho53T2kPcEwHDDajPu63INzbzlguSd6DPMW05cI8xm90wUnHj91Bn8txLNpNsd6IR6KuzNh72R2km4GyG+4a6kzHBmz+HwerfCTQdkABtpF9t4D6tBDl7+xOMWXaPdPXQ0IUXVQK8uB27uINGI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771591752; c=relaxed/simple; bh=q4gpatxXQY+61PGALxt6zogHQjzgxDSWP5zVWuolr0Y=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=VNMzTcrSt/4qsBYELUZJhJQKV+g3d4Al6KjHmfAZ3iE2omTFe+BKphLOXlmTWY8yXwW3fz1W9PqvJkabwFftuK2nOSATRukgzePMvtaTvUw78MBv8FtNk740/JXGl1ADYQTRS+W0REffYFSSDYZjcUrydn/DWkGJ8S087yZseF0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=YI7iuMOr; arc=none smtp.client-ip=85.9.206.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="YI7iuMOr" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1771591736; x=1771850936; bh=bMdZ4w4FGB99kBF7af0GSzGGKFxixfmU4A6pNZGK/tU=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=YI7iuMOr8IpoBWw9d196vZOIY9Zjh1Fp9wf2j1r5zBuBVBMsIc3o2Dj5ZK5mxaYBD njOiZWi5l4Ep8MaaGE8nceu92zZnMKFNjG9lMqSJD+D+ehn2yYlovAHV947NDhyOTz acuVbfTKcvv8kUGk511B7kvwK3cBJze7q+InBTh30mUtew0Scr2mnpFQhwEg5XAc5c 4u0aEAxPGd96J1Xoe3RScAjahJHrme9Ilkykfpnr9gZP+QMbSPTfY9lroDtvd6X0uY YIyXBdIa98k7bQZqstntwzUhi0qlQDpRXNzjcmQBcFLJYuGHeQV0iu4vKFXfIOdv1u EjyJe7OaNoCdA== Date: Fri, 20 Feb 2026 12:48:50 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v1 2/4] x86/process: Add a debug interface to change LAM tag width Message-ID: <5ed38af72848015f3417c462e624e52891dc14ed.1771589807.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: c0af3f3bd7e017ed5e755a048cec135bbaf30a58 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman While shortening the tag bits to converge the specifications of LAM and ChkTag, the 6 bit wide LAM (Linear Address Masking) tags should still be available to use. Since using this tag width is likely going to be for debug purposes only, using debugfs is the best choice. Signed-off-by: Maciej Wieczor-Retman --- arch/x86/kernel/process_64.c | 56 ++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 04968b303e66..2f9f74cddd2a 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -41,6 +41,7 @@ #include #include #include +#include =20 #include #include @@ -802,6 +803,61 @@ static long prctl_map_vdso(const struct vdso_image *im= age, unsigned long addr) =20 unsigned long lam_available_bits =3D LAM_DEFAULT_BITS; =20 +static ssize_t lam_bits_read_file(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + char buf[2]; + unsigned int len; + + len =3D sprintf(buf, "%ld\n", lam_available_bits); + return simple_read_from_buffer(user_buf, count, ppos, buf, len); +} + +/* + * Writing a number to this file changes the used lam tag width. Valid val= ues + * are 4 bit tag width and 6 bit tag width - the second, non-default one is + * meant mostly for debug and shall be deprecated in the future. + */ +static ssize_t lam_bits_write_file(struct file *file, + const char __user *user_buf, size_t count, + loff_t *ppos) +{ + char buf[32]; + ssize_t len; + int ceiling; + u8 bits; + + len =3D min(count, sizeof(buf) - 1); + if (copy_from_user(buf, user_buf, len)) + return -EFAULT; + + buf[len] =3D '\0'; + if (kstrtou8(buf, 0, &bits)) + return -EINVAL; + + switch (bits) { + case LAM_DEFAULT_BITS: + case LAM_MAX_BITS: + lam_available_bits =3D bits; + return count; + default: + return -EINVAL; + } +} + +static const struct file_operations fops_lam_bits =3D { + .read =3D lam_bits_read_file, + .write =3D lam_bits_write_file, +}; + +static int __init create_lam_available_bits(void) +{ + debugfs_create_file("lam_available_bits", 0600, + arch_debugfs_dir, NULL, &fops_lam_bits); + return 0; +} +late_initcall(create_lam_available_bits); + static void enable_lam_func(void *__mm) { struct mm_struct *mm =3D __mm; --=20 2.53.0 From nobody Sun Apr 5 13:14:55 2026 Received: from mail-10630.protonmail.ch (mail-10630.protonmail.ch [79.135.106.30]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 18F9A342177 for ; Fri, 20 Feb 2026 12:49:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.30 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771591751; cv=none; b=HumkPBwg/+mjN0ZDIcEJswD3RHBRXPfBYAnCZp3OHRx5YNYas+Pimv3KwUjnVaf7JAethFEcNjwYQaCU6Mq6SiAdCqyzf03w8RLW2tfFd6lOnmElUbo51oQwIzabSl1TYgqT1gLqNYdKuljSgZvUWrQ3iTxLq026MSMQ7ZOMGcg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771591751; c=relaxed/simple; bh=x37Sa9GPIE2tjSJdbrBtSV6yIAv4vCPJZKLIoewTLdM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=IEAIuIJfjbbC+FS7XV92P4Gv9JQ+rk370EQLTYBv/+YsEa0qW5uMYmRuX3nPDk5tbL6pyV/TCIonAiaLWkoH8eUgA8BqIL4De7083nVVdht/b8rva+IYWSrBom6BhlOtulOSVofEvKSLK2Q8DjPbO4FnD3rwfdW5FZss8RWXP1I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=cMMocopL; arc=none smtp.client-ip=79.135.106.30 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="cMMocopL" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1771591748; x=1771850948; bh=wNaWXhcxNfHnH6HkOZF3gD/FvPmA6p8/4mrbsx0sDPw=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=cMMocopLazeC8+tZE97ZKcNU659PZl8XVsQ2DBKwnIETtvB+KHX8WqU1nOWAVUCq/ bBrvGkTz1w1UdW01QEarw5MsjFm40f2oZiwWmSni3QXSsmo3xriqmE8rNd6bVCIeW2 4OvclgnTrOT6DCH2I/wG3alzT/ocnC0vQ340O/owQWsHhkc9R7tF9XgY1X2hK7D6ZG qaubgkatu9CVDvfu2Q7O8X65e6dryvMz5osR8JpBImq6FDG5eijxnJUvb3wKSF5bYe cYmS3u1jt5OENZPw7l6xDDNC3u6JGpHL2j6mYZMHS3uAPizm/XuocEiJ0aQbtbJ/pE FqhgsdaqccH9A== Date: Fri, 20 Feb 2026 12:48:56 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org Subject: [PATCH v1 3/4] x86/mm: Cleanup comments where LAM_U48 is mentioned Message-ID: <6910307be0078e5981001cf1f3bb1a520040082c.1771589807.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 26fd3b226a2cbfb2f298ef1f6a7027f263b561a0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman For simplicity only the LAM_U57 mode is implemented in the kernel. No matter whether the enabled paging mode is 5-level or 4-level the masked tag bits are the same as on a 5-level system. Remove two mentions of LAM_U48 which implied that it could be enabled. Signed-off-by: Maciej Wieczor-Retman --- arch/x86/include/asm/mmu.h | 2 +- arch/x86/include/asm/tlbflush.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h index 0fe9c569d171..9dcfce439c19 100644 --- a/arch/x86/include/asm/mmu.h +++ b/arch/x86/include/asm/mmu.h @@ -49,7 +49,7 @@ typedef struct { unsigned long flags; =20 #ifdef CONFIG_ADDRESS_MASKING - /* Active LAM mode: X86_CR3_LAM_U48 or X86_CR3_LAM_U57 or 0 (disabled) */ + /* Active LAM mode: X86_CR3_LAM_U57 or 0 (disabled) */ unsigned long lam_cr3_mask; =20 /* Significant bits of the virtual address. Excludes tag bits. */ diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflus= h.h index 00daedfefc1b..fe6458619f64 100644 --- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -110,7 +110,7 @@ struct tlb_state { /* * Active LAM mode. * - * X86_CR3_LAM_U57/U48 shifted right by X86_CR3_LAM_U57_BIT or 0 if LAM + * X86_CR3_LAM_U57 shifted right by X86_CR3_LAM_U57_BIT or 0 if LAM * disabled. */ u8 lam; --=20 2.53.0 From nobody Sun Apr 5 13:14:55 2026 Received: from mail-106120.protonmail.ch (mail-106120.protonmail.ch [79.135.106.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 244BC344DAA for ; Fri, 20 Feb 2026 12:49:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.120 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771591755; cv=none; b=Kf1ncdEby57tgi3T/T40b99rp09aZlXhZ8a+tbUcCNc+hWZZXYr19WibICN4wYelFa0uBB6t1DiDeN9fwzem0EyATbbtDGaipSJJ0kWnwj2sqok6Kuz7M/JLvjxHc+bxNA9wpPpmmHOjnwdeRLKs5eAM9QGOeXfbSemR0fgEz5s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771591755; c=relaxed/simple; bh=Key36d9CQNDC2jdXVq+xiTTel29uUeOXeIWgO+AuEUM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=MF6J/GFLJtcaxcao0WzhJkF+4MuDbq/qXevXinxWpYAZhLvuygX6kLx34FhtwGcz2u1xCE6Ft5wmsFu4AC0KMH0vFLouE+ov5nHrrewBWOyJBKHe3ERMzJYMesoOFHlpMqF1NGuA36L+ZL3Q/kfQGEeXCskRfzMGad4jXVLNza4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=LLvUpuPR; arc=none smtp.client-ip=79.135.106.120 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="LLvUpuPR" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1771591751; x=1771850951; bh=TOcZfslwyOLnqfStp7w1Zf0CKilK3beX2XrqjjIDxw4=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=LLvUpuPRtmw8ZnCiefPGWoDUT1Q/+TAKNXLz3ErxU0c1r1vBYz+nRxyzxqDSZ/W3u Jpr0Ox6KLC1k5WWq4pR/g+lFUbsmkEy5e182ZBSN4kIb1KJjRkJw97aQYko3KEXmI8 Yiwo7YziEU4755+lLMtNJRe2itocjkRGQrvybJECNTxPKobz9PP27oZlyyMosw3Gz5 4T9q6FZLm7FifHDuKav8au3KkvvrpuQAppIYVZ+InxEQngf4DlT9V8iWDkkokKn41D zUJPeAbcoJqhGC9j+p/aI9oZd7dsBWdFOWVX29fpiq3WjJg44AEDq8E0NmKO12q5Ln Rnkhu9RKU1SdA== Date: Fri, 20 Feb 2026 12:49:01 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Shuah Khan From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Subject: [PATCH v1 4/4] selftests/lam: Add test cases for different LAM tag widths Message-ID: <8b604b5ec11051437940fb0537ab4c2ed6bb5bb4.1771589807.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 26fbcd654c44720f93558be50b48fe99bae1ef41 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman After the default tag width in LAM (Linear Address Masking) is set to 4 bits, it's still possible to enable 6 bit wide tags for debug purposes through debugfs. When a program enables LAM, it should be able to, through a syscall, request a number of tag bits equal or smaller to the one used system wide. If it requests a smaller one it should receive the system wide setting anyway. Change the default tag width. Add four tests to check all combinations of tag width requests. Modify the existing test infrastructure to check with a syscall what the needed tag width actually is. Signed-off-by: Maciej Wieczor-Retman --- tools/testing/selftests/x86/lam.c | 87 ++++++++++++++++++++++++++----- 1 file changed, 74 insertions(+), 13 deletions(-) diff --git a/tools/testing/selftests/x86/lam.c b/tools/testing/selftests/x8= 6/lam.c index 1919fa6daec0..9ed2964082eb 100644 --- a/tools/testing/selftests/x86/lam.c +++ b/tools/testing/selftests/x86/lam.c @@ -26,9 +26,11 @@ =20 /* LAM modes, these definitions were copied from kernel code */ #define LAM_NONE 0 -#define LAM_U57_BITS 6 +#define LAM_U57_BITS 4 +#define LAM_MAX_BITS 6 =20 -#define LAM_U57_MASK (0x3fULL << 57) +#define LAM_U57_MASK (0xfULL << 57) +#define LAM_MAX_MASK (0x3fULL << 57) /* arch prctl for LAM */ #define ARCH_GET_UNTAG_MASK 0x4001 #define ARCH_ENABLE_TAGGED_ADDR 0x4002 @@ -175,7 +177,7 @@ static int set_lam(unsigned long lam) int ret =3D 0; uint64_t ptr =3D 0; =20 - if (lam !=3D LAM_U57_BITS && lam !=3D LAM_NONE) + if (lam !=3D LAM_U57_BITS && lam !=3D LAM_MAX_BITS && lam !=3D LAM_NONE) return -1; =20 /* Skip check return */ @@ -184,16 +186,21 @@ static int set_lam(unsigned long lam) /* Get untagged mask */ syscall(SYS_arch_prctl, ARCH_GET_UNTAG_MASK, &ptr); =20 + /* Update lam in case lam6 is enabled */ + syscall(SYS_arch_prctl, ARCH_GET_MAX_TAG_BITS, &lam); + /* Check mask returned is expected */ if (lam =3D=3D LAM_U57_BITS) ret =3D (ptr !=3D ~(LAM_U57_MASK)); + else if (lam =3D=3D LAM_MAX_BITS) + ret =3D (ptr !=3D ~(LAM_MAX_MASK)); else if (lam =3D=3D LAM_NONE) ret =3D (ptr !=3D -1ULL); =20 return ret; } =20 -static unsigned long get_default_tag_bits(void) +static unsigned long get_default_tag_bits(int bits) { pid_t pid; int lam =3D LAM_NONE; @@ -204,8 +211,8 @@ static unsigned long get_default_tag_bits(void) perror("Fork failed."); } else if (pid =3D=3D 0) { /* Set LAM mode in child process */ - if (set_lam(LAM_U57_BITS) =3D=3D 0) - lam =3D LAM_U57_BITS; + if (set_lam(bits) =3D=3D 0) + syscall(SYS_arch_prctl, ARCH_GET_MAX_TAG_BITS, &lam); else lam =3D LAM_NONE; exit(lam); @@ -217,6 +224,27 @@ static unsigned long get_default_tag_bits(void) return lam; } =20 +static int change_lam_width(unsigned char width) +{ + char buf[2]; + int ret, fd; + + snprintf(buf, sizeof(buf), "%u", width); + fd =3D open("/sys/kernel/debug/x86/lam_available_bits", O_WRONLY); + if (fd < 0) { + ksft_print_msg("lam_available_bits debug file not found!\n"); + return fd; + } + + ret =3D write(fd, buf, sizeof(buf)); + if (ret < 0) + return ret; + + close(fd); + + return 0; +} + /* * Set tagged address and read back untag mask. * check if the untag mask is expected. @@ -284,20 +312,32 @@ static int handle_lam_test(void *src, unsigned int la= m) return (!!strcmp((char *)src, (char *)ptr)); } =20 - int handle_max_bits(struct testcases *test) { - unsigned long exp_bits =3D get_default_tag_bits(); - unsigned long bits =3D 0; + unsigned long exp_bits, bits =3D 0; + int ret =3D 1; =20 - if (exp_bits !=3D LAM_NONE) - exp_bits =3D LAM_U57_BITS; + if (test->later) { + ret =3D change_lam_width(LAM_MAX_BITS); + if (ret) + return ret; + } + + exp_bits =3D get_default_tag_bits(test->lam); =20 /* Get LAM max tag bits */ if (syscall(SYS_arch_prctl, ARCH_GET_MAX_TAG_BITS, &bits) =3D=3D -1) - return 1; + goto out; =20 - return (exp_bits !=3D bits); + ret =3D exp_bits !=3D bits; +out: + if (test->later) { + ret =3D change_lam_width(LAM_U57_BITS); + if (ret) + return ret; + } + + return ret; } =20 /* @@ -968,9 +1008,30 @@ static struct testcases malloc_cases[] =3D { =20 static struct testcases bits_cases[] =3D { { + .later =3D 0, + .lam =3D LAM_U57_BITS, .test_func =3D handle_max_bits, .msg =3D "BITS: Check default tag bits\n", }, + { + .later =3D 1, + .lam =3D LAM_U57_BITS, + .test_func =3D handle_max_bits, + .msg =3D "BITS: Check if 4 bits can be requested in 6 bit mode.\n", + }, + { + .later =3D 0, + .expected =3D 1, + .lam =3D LAM_MAX_BITS, + .test_func =3D handle_max_bits, + .msg =3D "BITS:[Negative] Check if 6 bits can be requested in 4 bit mode= .\n", + }, + { + .later =3D 1, + .lam =3D LAM_MAX_BITS, + .test_func =3D handle_max_bits, + .msg =3D "BITS: Check if 6 bits can be requested in 6 bit mode.\n", + }, }; =20 static struct testcases syscall_cases[] =3D { --=20 2.53.0