From nobody Sat Feb 7 08:43:24 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5486933A9E2; Mon, 5 Jan 2026 16:38:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631085; cv=none; b=EWTb2UvasB5BHqZ5YMArYAEx3iGGw+56auidW9+bJi4GT2d2QRxK49nX8wkD8ziXXInpawLYW69vxeMj+f4Z0zSti7ocWPhnFehXUKfMscWPFSvnfZo6bHSaBN1OL1Y0mKcyHs8s41ixDOnvNQ8jC/PofbeXlk9zq8taiUVqE60= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631085; c=relaxed/simple; bh=f1Xz/8Aaiy5bvEd0QO1NbKWa6tG7E23dKQbBQ3cXYDQ=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=nYdLr/I7D+8dgCUP7pkjMyS8EvbVwbz4EyYjQT21QEn2GInFyHIUW5+A75PXmxIRV7nXKC9Px/RLttPEzlJpRBVgTxbzke+ACcATRsZA1avsCM5gtDwHDl/qF4ZmfGRxCjz0Y05AOeqWfFmxv4ybCiI+lBsv73kZa+Tq2sflWOA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1vcnaf-000000000xU-33Jc; Mon, 05 Jan 2026 16:37:57 +0000 Date: Mon, 5 Jan 2026 16:37:54 +0000 From: Daniel Golle To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Michael Klein , Daniel Golle , Aleksander Jan Bajkowski , Bevan Weiss , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 1/5] net: phy: realtek: fix whitespace in struct phy_driver initializers Message-ID: <42b0fac53c5c5646707ce3f3a6dacd2bc082a5b2.1767630451.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Consistently use tabs instead of spaces in struct phy_driver initializers. Signed-off-by: Daniel Golle Reviewed-by: Maxime Chevallier --- v2: no changes drivers/net/phy/realtek/realtek_main.c | 146 ++++++++++++------------- 1 file changed, 73 insertions(+), 73 deletions(-) diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realt= ek/realtek_main.c index 6ff0385201a57..e42c5efbfa5ef 100644 --- a/drivers/net/phy/realtek/realtek_main.c +++ b/drivers/net/phy/realtek/realtek_main.c @@ -1976,7 +1976,7 @@ static irqreturn_t rtl8221b_handle_interrupt(struct p= hy_device *phydev) static struct phy_driver realtek_drvs[] =3D { { PHY_ID_MATCH_EXACT(0x00008201), - .name =3D "RTL8201CP Ethernet", + .name =3D "RTL8201CP Ethernet", .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, }, { @@ -2102,7 +2102,7 @@ static struct phy_driver realtek_drvs[] =3D { .name =3D "RTL8226B_RTL8221B 2.5Gbps PHY", .get_features =3D rtl822x_get_features, .config_aneg =3D rtl822x_config_aneg, - .config_init =3D rtl822xb_config_init, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, .read_status =3D rtl822xb_read_status, .suspend =3D genphy_suspend, @@ -2111,112 +2111,112 @@ static struct phy_driver realtek_drvs[] =3D { .write_page =3D rtl821x_write_page, }, { PHY_ID_MATCH_EXACT(0x001cc838), - .name =3D "RTL8226-CG 2.5Gbps PHY", - .soft_reset =3D rtl822x_c45_soft_reset, - .get_features =3D rtl822x_c45_get_features, - .config_aneg =3D rtl822x_c45_config_aneg, - .config_init =3D rtl822x_config_init, - .read_status =3D rtl822xb_c45_read_status, - .suspend =3D genphy_c45_pma_suspend, - .resume =3D rtlgen_c45_resume, + .name =3D "RTL8226-CG 2.5Gbps PHY", + .soft_reset =3D rtl822x_c45_soft_reset, + .get_features =3D rtl822x_c45_get_features, + .config_aneg =3D rtl822x_c45_config_aneg, + .config_init =3D rtl822x_config_init, + .read_status =3D rtl822xb_c45_read_status, + .suspend =3D genphy_c45_pma_suspend, + .resume =3D rtlgen_c45_resume, }, { PHY_ID_MATCH_EXACT(0x001cc848), - .name =3D "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY", - .get_features =3D rtl822x_get_features, - .config_aneg =3D rtl822x_config_aneg, - .config_init =3D rtl822xb_config_init, + .name =3D "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY", + .get_features =3D rtl822x_get_features, + .config_aneg =3D rtl822x_config_aneg, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, - .read_status =3D rtl822xb_read_status, - .suspend =3D genphy_suspend, - .resume =3D rtlgen_resume, - .read_page =3D rtl821x_read_page, - .write_page =3D rtl821x_write_page, + .read_status =3D rtl822xb_read_status, + .suspend =3D genphy_suspend, + .resume =3D rtlgen_resume, + .read_page =3D rtl821x_read_page, + .write_page =3D rtl821x_write_page, }, { .match_phy_device =3D rtl8221b_vb_cg_c22_match_phy_device, - .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C22)", + .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C22)", .probe =3D rtl822x_probe, - .get_features =3D rtl822x_get_features, - .config_aneg =3D rtl822x_config_aneg, - .config_init =3D rtl822xb_config_init, + .get_features =3D rtl822x_get_features, + .config_aneg =3D rtl822x_config_aneg, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, - .read_status =3D rtl822xb_read_status, - .suspend =3D genphy_suspend, - .resume =3D rtlgen_resume, - .read_page =3D rtl821x_read_page, - .write_page =3D rtl821x_write_page, + .read_status =3D rtl822xb_read_status, + .suspend =3D genphy_suspend, + .resume =3D rtlgen_resume, + .read_page =3D rtl821x_read_page, + .write_page =3D rtl821x_write_page, }, { .match_phy_device =3D rtl8221b_vb_cg_c45_match_phy_device, - .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C45)", + .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C45)", .config_intr =3D rtl8221b_config_intr, .handle_interrupt =3D rtl8221b_handle_interrupt, .probe =3D rtl822x_probe, - .config_init =3D rtl822xb_config_init, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, - .get_features =3D rtl822x_c45_get_features, - .config_aneg =3D rtl822x_c45_config_aneg, - .read_status =3D rtl822xb_c45_read_status, - .suspend =3D genphy_c45_pma_suspend, - .resume =3D rtlgen_c45_resume, + .get_features =3D rtl822x_c45_get_features, + .config_aneg =3D rtl822x_c45_config_aneg, + .read_status =3D rtl822xb_c45_read_status, + .suspend =3D genphy_c45_pma_suspend, + .resume =3D rtlgen_c45_resume, }, { .match_phy_device =3D rtl8221b_vm_cg_c22_match_phy_device, - .name =3D "RTL8221B-VM-CG 2.5Gbps PHY (C22)", + .name =3D "RTL8221B-VM-CG 2.5Gbps PHY (C22)", .probe =3D rtl822x_probe, - .get_features =3D rtl822x_get_features, - .config_aneg =3D rtl822x_config_aneg, - .config_init =3D rtl822xb_config_init, + .get_features =3D rtl822x_get_features, + .config_aneg =3D rtl822x_config_aneg, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, - .read_status =3D rtl822xb_read_status, - .suspend =3D genphy_suspend, - .resume =3D rtlgen_resume, - .read_page =3D rtl821x_read_page, - .write_page =3D rtl821x_write_page, + .read_status =3D rtl822xb_read_status, + .suspend =3D genphy_suspend, + .resume =3D rtlgen_resume, + .read_page =3D rtl821x_read_page, + .write_page =3D rtl821x_write_page, }, { .match_phy_device =3D rtl8221b_vm_cg_c45_match_phy_device, - .name =3D "RTL8221B-VM-CG 2.5Gbps PHY (C45)", + .name =3D "RTL8221B-VM-CG 2.5Gbps PHY (C45)", .config_intr =3D rtl8221b_config_intr, .handle_interrupt =3D rtl8221b_handle_interrupt, .probe =3D rtl822x_probe, - .config_init =3D rtl822xb_config_init, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, - .get_features =3D rtl822x_c45_get_features, - .config_aneg =3D rtl822x_c45_config_aneg, - .read_status =3D rtl822xb_c45_read_status, - .suspend =3D genphy_c45_pma_suspend, - .resume =3D rtlgen_c45_resume, + .get_features =3D rtl822x_c45_get_features, + .config_aneg =3D rtl822x_c45_config_aneg, + .read_status =3D rtl822xb_c45_read_status, + .suspend =3D genphy_c45_pma_suspend, + .resume =3D rtlgen_c45_resume, }, { .match_phy_device =3D rtl8251b_c45_match_phy_device, - .name =3D "RTL8251B 5Gbps PHY", + .name =3D "RTL8251B 5Gbps PHY", .probe =3D rtl822x_probe, - .get_features =3D rtl822x_get_features, - .config_aneg =3D rtl822x_config_aneg, - .read_status =3D rtl822x_read_status, - .suspend =3D genphy_suspend, - .resume =3D rtlgen_resume, - .read_page =3D rtl821x_read_page, - .write_page =3D rtl821x_write_page, + .get_features =3D rtl822x_get_features, + .config_aneg =3D rtl822x_config_aneg, + .read_status =3D rtl822x_read_status, + .suspend =3D genphy_suspend, + .resume =3D rtlgen_resume, + .read_page =3D rtl821x_read_page, + .write_page =3D rtl821x_write_page, }, { .match_phy_device =3D rtl_internal_nbaset_match_phy_device, - .name =3D "Realtek Internal NBASE-T PHY", + .name =3D "Realtek Internal NBASE-T PHY", .flags =3D PHY_IS_INTERNAL, .probe =3D rtl822x_probe, - .get_features =3D rtl822x_get_features, - .config_aneg =3D rtl822x_config_aneg, - .read_status =3D rtl822x_read_status, - .suspend =3D genphy_suspend, - .resume =3D rtlgen_resume, - .read_page =3D rtl821x_read_page, - .write_page =3D rtl821x_write_page, + .get_features =3D rtl822x_get_features, + .config_aneg =3D rtl822x_config_aneg, + .read_status =3D rtl822x_read_status, + .suspend =3D genphy_suspend, + .resume =3D rtlgen_resume, + .read_page =3D rtl821x_read_page, + .write_page =3D rtl821x_write_page, .read_mmd =3D rtl822x_read_mmd, .write_mmd =3D rtl822x_write_mmd, }, { PHY_ID_MATCH_EXACT(0x001ccad0), .name =3D "RTL8224 2.5Gbps PHY", .flags =3D PHY_POLL_CABLE_TEST, - .get_features =3D rtl822x_c45_get_features, - .config_aneg =3D rtl822x_c45_config_aneg, - .read_status =3D rtl822x_c45_read_status, - .suspend =3D genphy_c45_pma_suspend, - .resume =3D rtlgen_c45_resume, + .get_features =3D rtl822x_c45_get_features, + .config_aneg =3D rtl822x_c45_config_aneg, + .read_status =3D rtl822x_c45_read_status, + .suspend =3D genphy_c45_pma_suspend, + .resume =3D rtlgen_c45_resume, .cable_test_start =3D rtl8224_cable_test_start, .cable_test_get_status =3D rtl8224_cable_test_get_status, }, { @@ -2235,7 +2235,7 @@ static struct phy_driver realtek_drvs[] =3D { }, { PHY_ID_MATCH_EXACT(0x001ccb00), .name =3D "RTL9000AA_RTL9000AN Ethernet", - .features =3D PHY_BASIC_T1_FEATURES, + .features =3D PHY_BASIC_T1_FEATURES, .config_init =3D rtl9000a_config_init, .config_aneg =3D rtl9000a_config_aneg, .read_status =3D rtl9000a_read_status, --=20 2.52.0 From nobody Sat Feb 7 08:43:24 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4BF7C2FCBE3; Mon, 5 Jan 2026 16:38:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631101; cv=none; b=q+AQK4FEYK2ETpUzs1ayjJVEbMdLTTwvT1WGPQmKCJ3Q21BoAQH9EKz8EXaVNHHsLvzuQ2iatjbRhclaB9CSTqpywgOT/OEcKN26gpnNXtQW4b7MsekHMrE5xc+AHfRBzAJV9RNLHNM/2RNdtzjiO6VzS3belSvVCmtGQP00rdI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631101; c=relaxed/simple; bh=tDvM74R4X6w0KTW62X2XiKFCdf0fkLj5xv7xbA3j1/4=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=u6sZQc1Ujey7/BL4lfhsOLJfIKW8w8ZxwA77X2zoQW7j3y3NAPqBkLorsRsOxOgD4HaOXibMj4hfB8LV1pxoUwcKAtBcn4N4Wn0Au7msnmPm9ILUFkbsudqji3x46+FFI9IyQJZgxpoycRNI8u5bn/84wmw+MztBOZRFKpUxlnI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1vcnax-000000000y2-0yX6; Mon, 05 Jan 2026 16:38:15 +0000 Date: Mon, 5 Jan 2026 16:38:12 +0000 From: Daniel Golle To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Michael Klein , Daniel Golle , Aleksander Jan Bajkowski , Bevan Weiss , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 2/5] net: phy: realtek: implement configuring in-band an Message-ID: <82a78a06d67be19e856d646cf880b2021ea9d837.1767630451.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Implement the inband_caps() and config_inband() PHY driver methods to allow configuring the use of in-band-status with SGMII and 2500Base-X on RTL8226 and RTL8221B 2.5GE PHYs. Signed-off-by: Daniel Golle --- v2: no changes drivers/net/phy/realtek/realtek_main.c | 67 ++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realt= ek/realtek_main.c index e42c5efbfa5ef..0653a9d8fcb6f 100644 --- a/drivers/net/phy/realtek/realtek_main.c +++ b/drivers/net/phy/realtek/realtek_main.c @@ -131,6 +131,15 @@ #define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII 0x02 #define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX 0x16 =20 +#define RTL822X_VND1_SERDES_CMD 0x7587 +#define RTL822X_VND1_SERDES_CMD_WRITE BIT(1) +#define RTL822X_VND1_SERDES_CMD_BUSY BIT(0) +#define RTL822X_VND1_SERDES_ADDR 0x7588 +#define RTL822X_VND1_SERDES_ADDR_AUTONEG 0x2 +#define RTL822X_VND1_SERDES_INBAND_DISABLE 0x71d0 +#define RTL822X_VND1_SERDES_INBAND_ENABLE 0x70d0 +#define RTL822X_VND1_SERDES_DATA 0x7589 + /* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45 * is set, they cannot be accessed by C45-over-C22. */ @@ -1308,6 +1317,50 @@ static int rtl822xb_config_init(struct phy_device *p= hydev) return rtl822x_set_serdes_option_mode(phydev, false); } =20 +static int rtl822x_serdes_write(struct phy_device *phydev, u16 reg, u16 va= l) +{ + int ret, poll; + + ret =3D phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_ADDR, r= eg); + if (ret < 0) + return ret; + + ret =3D phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_DATA, v= al); + if (ret < 0) + return ret; + + ret =3D phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_CMD, + RTL822X_VND1_SERDES_CMD_WRITE | + RTL822X_VND1_SERDES_CMD_BUSY); + if (ret < 0) + return ret; + + return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, + RTL822X_VND1_SERDES_CMD, poll, + !(poll & RTL822X_VND1_SERDES_CMD_BUSY), + 500, 100000, false); +} + +static int rtl822x_config_inband(struct phy_device *phydev, unsigned int m= odes) +{ + return rtl822x_serdes_write(phydev, RTL822X_VND1_SERDES_ADDR_AUTONEG, + (modes !=3D LINK_INBAND_DISABLE) ? + RTL822X_VND1_SERDES_INBAND_ENABLE : + RTL822X_VND1_SERDES_INBAND_DISABLE); +} + +static unsigned int rtl822x_inband_caps(struct phy_device *phydev, + phy_interface_t interface) +{ + switch (interface) { + case PHY_INTERFACE_MODE_2500BASEX: + case PHY_INTERFACE_MODE_SGMII: + return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE; + default: + return 0; + } +} + static int rtl822xb_get_rate_matching(struct phy_device *phydev, phy_interface_t iface) { @@ -2103,6 +2156,8 @@ static struct phy_driver realtek_drvs[] =3D { .get_features =3D rtl822x_get_features, .config_aneg =3D rtl822x_config_aneg, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .read_status =3D rtl822xb_read_status, .suspend =3D genphy_suspend, @@ -2116,6 +2171,8 @@ static struct phy_driver realtek_drvs[] =3D { .get_features =3D rtl822x_c45_get_features, .config_aneg =3D rtl822x_c45_config_aneg, .config_init =3D rtl822x_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .read_status =3D rtl822xb_c45_read_status, .suspend =3D genphy_c45_pma_suspend, .resume =3D rtlgen_c45_resume, @@ -2125,6 +2182,8 @@ static struct phy_driver realtek_drvs[] =3D { .get_features =3D rtl822x_get_features, .config_aneg =3D rtl822x_config_aneg, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .read_status =3D rtl822xb_read_status, .suspend =3D genphy_suspend, @@ -2138,6 +2197,8 @@ static struct phy_driver realtek_drvs[] =3D { .get_features =3D rtl822x_get_features, .config_aneg =3D rtl822x_config_aneg, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .read_status =3D rtl822xb_read_status, .suspend =3D genphy_suspend, @@ -2151,6 +2212,8 @@ static struct phy_driver realtek_drvs[] =3D { .handle_interrupt =3D rtl8221b_handle_interrupt, .probe =3D rtl822x_probe, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .get_features =3D rtl822x_c45_get_features, .config_aneg =3D rtl822x_c45_config_aneg, @@ -2164,6 +2227,8 @@ static struct phy_driver realtek_drvs[] =3D { .get_features =3D rtl822x_get_features, .config_aneg =3D rtl822x_config_aneg, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .read_status =3D rtl822xb_read_status, .suspend =3D genphy_suspend, @@ -2177,6 +2242,8 @@ static struct phy_driver realtek_drvs[] =3D { .handle_interrupt =3D rtl8221b_handle_interrupt, .probe =3D rtl822x_probe, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .get_features =3D rtl822x_c45_get_features, .config_aneg =3D rtl822x_c45_config_aneg, --=20 2.52.0 From nobody Sat Feb 7 08:43:24 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EF4062FCBE3; Mon, 5 Jan 2026 16:38:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631118; cv=none; b=dd1lQeScow7ozdsbqK6OrQBrO3tKhe4u2XFj5QuklXQYA1thAF8wGge4aLrkYny6VccfogpziofQdocZOViemNchZtrfe/XyfHGLytAyU3ZCTLbtvBNZUNMG4kj0BQR4flithXrLElKB3cNa38Z95p0D2E6pUSCLsRliskbccpw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631118; c=relaxed/simple; bh=Hctdg8nxGr8eXtF6WOd4UjLIYimfCBA1oeiF24yby2U=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=fdNwm9wW9dPGS2ob/QWPzlTGNh8Qoo9tWtyal966FFDHE5+/XV0mZC9kigptr1KaVQ/an+TiD4mlkRlUL4chmzF63jAz+BPTC67690jlJ+ysgxRxRxnSmrs6i+kTL2uvOuDJsTxXPIYQxMNUSSLY/NHD8Ryn+hNh1R681XocAGg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1vcnbE-000000000ya-1uv4; Mon, 05 Jan 2026 16:38:32 +0000 Date: Mon, 5 Jan 2026 16:38:29 +0000 From: Daniel Golle To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Michael Klein , Daniel Golle , Aleksander Jan Bajkowski , Bevan Weiss , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 3/5] net: phy: move mmd_phy_read and mmd_phy_write to phylib.h Message-ID: <79169cd624a3572d426e42c7b13cd2654a35d0cb.1767630451.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Helper functions mmd_phy_read and mmd_phy_write are useful for PHYs which require custom MMD access functions for some but not all MMDs. Move mmd_phy_read and mmd_phy_write function prototypes from phylib-internal.h to phylib.h to make them available for PHY drivers. Signed-off-by: Daniel Golle Reviewed-by: Andrew Lunn --- v2: new patch drivers/net/phy/phylib-internal.h | 6 ------ drivers/net/phy/phylib.h | 5 +++++ 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/phy/phylib-internal.h b/drivers/net/phy/phylib-int= ernal.h index ebda74eb60a54..dc9592c6bb8e7 100644 --- a/drivers/net/phy/phylib-internal.h +++ b/drivers/net/phy/phylib-internal.h @@ -7,7 +7,6 @@ #define __PHYLIB_INTERNAL_H =20 struct phy_device; -struct mii_bus; =20 /* * phy_supported_speeds - return all speeds currently supported by a PHY d= evice @@ -21,11 +20,6 @@ void of_set_phy_timing_role(struct phy_device *phydev); int phy_speed_down_core(struct phy_device *phydev); void phy_check_downshift(struct phy_device *phydev); =20 -int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45, - int devad, u32 regnum); -int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45, - int devad, u32 regnum, u16 val); - int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv); =20 #endif /* __PHYLIB_INTERNAL_H */ diff --git a/drivers/net/phy/phylib.h b/drivers/net/phy/phylib.h index c15484a805b39..0fba245f97458 100644 --- a/drivers/net/phy/phylib.h +++ b/drivers/net/phy/phylib.h @@ -8,6 +8,7 @@ =20 struct device_node; struct phy_device; +struct mii_bus; =20 struct device_node *phy_package_get_node(struct phy_device *phydev); void *phy_package_get_priv(struct phy_device *phydev); @@ -30,5 +31,9 @@ int devm_phy_package_join(struct device *dev, struct phy_= device *phydev, int base_addr, size_t priv_size); int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev, size_t priv_size); +int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45, + int devad, u32 regnum); +int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45, + int devad, u32 regnum, u16 val); =20 #endif /* __PHYLIB_H */ --=20 2.52.0 From nobody Sat Feb 7 08:43:24 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7D8333EB19; Mon, 5 Jan 2026 16:39:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631150; cv=none; b=msPfTYOb5FX1ijkczqIVBKbyvjei62ezjd60eRReGrlLq8KQwjb2QSRKhrsCuO3ncapB/vq3VHW7mGcPO1XNHy00cAsiiR6s146LH8TwRbFPuRbC9iLxUAPDg0zyPhpylp/HlDUHbensMIjMZy1K92HiA4HZ+iB+CJ5YmJBMr88= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631150; c=relaxed/simple; bh=mH9EM+nJrI6TA5xmiiSyn7RwEUhqFst3KZoCwEpI2PE=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=UXpRI5I0oY8IDwh9YsfEexDpOehl0mJ5pxzAAhzyN/uaUDepgsX17Qq5PNs5k/I6GQzE3AaVHNvgKOiyytWltP+L5AqBYnssW7T4+vvBxu1WK5+/gdMzcofDU8fnysCAs+ZcAYT0e2CMKyI7d3eLxyah58MfGHw/cJyM7gapm7U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1vcnbh-000000000zV-3GgE; Mon, 05 Jan 2026 16:39:01 +0000 Date: Mon, 5 Jan 2026 16:38:59 +0000 From: Daniel Golle To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Michael Klein , Daniel Golle , Aleksander Jan Bajkowski , Bevan Weiss , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 4/5] net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 mode Message-ID: <25aab7f02dac7c6022171455523e3db1435b0881.1767630451.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RTL822x cannot access MDIO_MMD_VEND2 via MII_MMD_CTRL/MII_MMD_DATA. A mapping to use paged access needs to be used instead. All other MMD devices can be accessed as usual. Implement phy_read_mmd and phy_write_mmd using paged access for MDIO_MMD_VEND2 in Clause-22 mode instead of relying on MII_MMD_CTRL/MII_MMD_DATA. This allows eg. rtl822x_config_aneg to work as expected in case the MDIO bus doesn't support Clause-45 access. Suggested-by: Bevan Weiss Signed-off-by: Daniel Golle Reviewed-by: Maxime Chevallier --- v2: - use mmd_phy_read and mmd_phy_write - fix return value in on error (oldpage vs. ret) - fix wrong parameter name (reg vs. mmdreg) drivers/net/phy/realtek/realtek_main.c | 91 +++++++++++++++++++++++++- 1 file changed, 88 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realt= ek/realtek_main.c index 0653a9d8fcb6f..d1c7935a13acc 100644 --- a/drivers/net/phy/realtek/realtek_main.c +++ b/drivers/net/phy/realtek/realtek_main.c @@ -18,6 +18,7 @@ #include #include =20 +#include "../phylib.h" #include "realtek.h" =20 #define RTL8201F_IER 0x13 @@ -140,9 +141,8 @@ #define RTL822X_VND1_SERDES_INBAND_ENABLE 0x70d0 #define RTL822X_VND1_SERDES_DATA 0x7589 =20 -/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45 - * is set, they cannot be accessed by C45-over-C22. - */ +#define RTL822X_VND2_TO_PAGE(reg) ((reg) >> 4) +#define RTL822X_VND2_TO_PAGE_REG(reg) (16 + (((reg) & GENMASK(3, 0)) >> 1= )) #define RTL822X_VND2_C22_REG(reg) (0xa400 + 2 * (reg)) =20 #define RTL8221B_VND2_INER 0xa4d2 @@ -1247,6 +1247,79 @@ static int rtl822x_probe(struct phy_device *phydev) return 0; } =20 +/* RTL822x cannot access MDIO_MMD_VEND2 via MII_MMD_CTRL/MII_MMD_DATA. + * A mapping to use paged access needs to be used instead. + * All other MMD devices can be accessed as usual. + */ +static int rtl822xb_read_mmd(struct phy_device *phydev, int devnum, u16 re= g) +{ + int oldpage, ret, read_ret; + u16 page; + + /* Use default method for all MMDs except MDIO_MMD_VEND2 or in case + * Clause-45 access is available + */ + if (devnum !=3D MDIO_MMD_VEND2 || phydev->is_c45) + return mmd_phy_read(phydev->mdio.bus, phydev->mdio.addr, + phydev->is_c45, devnum, reg); + + /* Use paged access for MDIO_MMD_VEND2 over Clause-22 */ + page =3D RTL822X_VND2_TO_PAGE(reg); + oldpage =3D __phy_read(phydev, RTL821x_PAGE_SELECT); + if (oldpage < 0) + return oldpage; + + if (oldpage !=3D page) { + ret =3D __phy_write(phydev, RTL821x_PAGE_SELECT, page); + if (ret < 0) + return ret; + } + + read_ret =3D __phy_read(phydev, RTL822X_VND2_TO_PAGE_REG(reg)); + if (oldpage !=3D page) { + ret =3D __phy_write(phydev, RTL821x_PAGE_SELECT, oldpage); + if (ret < 0) + return ret; + } + + return read_ret; +} + +static int rtl822xb_write_mmd(struct phy_device *phydev, int devnum, u16 r= eg, + u16 val) +{ + int oldpage, ret, write_ret; + u16 page; + + /* Use default method for all MMDs except MDIO_MMD_VEND2 or in case + * Clause-45 access is available + */ + if (devnum !=3D MDIO_MMD_VEND2 || phydev->is_c45) + return mmd_phy_write(phydev->mdio.bus, phydev->mdio.addr, + phydev->is_c45, devnum, reg, val); + + /* Use paged access for MDIO_MMD_VEND2 over Clause-22 */ + page =3D RTL822X_VND2_TO_PAGE(reg); + oldpage =3D __phy_read(phydev, RTL821x_PAGE_SELECT); + if (oldpage < 0) + return oldpage; + + if (oldpage !=3D page) { + ret =3D __phy_write(phydev, RTL821x_PAGE_SELECT, page); + if (ret < 0) + return ret; + } + + write_ret =3D __phy_write(phydev, RTL822X_VND2_TO_PAGE_REG(reg), val); + if (oldpage !=3D page) { + ret =3D __phy_write(phydev, RTL821x_PAGE_SELECT, oldpage); + if (ret < 0) + return ret; + } + + return write_ret; +} + static int rtl822x_set_serdes_option_mode(struct phy_device *phydev, bool = gen1) { bool has_2500, has_sgmii; @@ -2150,6 +2223,8 @@ static struct phy_driver realtek_drvs[] =3D { .resume =3D rtlgen_resume, .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { .match_phy_device =3D rtl8221b_match_phy_device, .name =3D "RTL8226B_RTL8221B 2.5Gbps PHY", @@ -2164,6 +2239,8 @@ static struct phy_driver realtek_drvs[] =3D { .resume =3D rtlgen_resume, .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { PHY_ID_MATCH_EXACT(0x001cc838), .name =3D "RTL8226-CG 2.5Gbps PHY", @@ -2176,6 +2253,8 @@ static struct phy_driver realtek_drvs[] =3D { .read_status =3D rtl822xb_c45_read_status, .suspend =3D genphy_c45_pma_suspend, .resume =3D rtlgen_c45_resume, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { PHY_ID_MATCH_EXACT(0x001cc848), .name =3D "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY", @@ -2190,6 +2269,8 @@ static struct phy_driver realtek_drvs[] =3D { .resume =3D rtlgen_resume, .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { .match_phy_device =3D rtl8221b_vb_cg_c22_match_phy_device, .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C22)", @@ -2205,6 +2286,8 @@ static struct phy_driver realtek_drvs[] =3D { .resume =3D rtlgen_resume, .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { .match_phy_device =3D rtl8221b_vb_cg_c45_match_phy_device, .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C45)", @@ -2235,6 +2318,8 @@ static struct phy_driver realtek_drvs[] =3D { .resume =3D rtlgen_resume, .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { .match_phy_device =3D rtl8221b_vm_cg_c45_match_phy_device, .name =3D "RTL8221B-VM-CG 2.5Gbps PHY (C45)", --=20 2.52.0 From nobody Sat Feb 7 08:43:24 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E6AC2D8DD9; Mon, 5 Jan 2026 16:39:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631178; cv=none; b=IzMAo04ZRjFWg3Thwmx/DWPy9dMx5vEhjx6B+AmXRzb2T/R5KfTJS+Lr0+RzWcCz6VoxyUGN542Y6gIOAyj1kZxN9qRDiljs0tW1Ubo0NQD/4b3WW9DAJu4XqjWNLBbIs0ea1aQDlZD2D0AQTEbt25yQS81uqTz3FPVQOAJIVE8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767631178; c=relaxed/simple; bh=iyNTJho95yZntWYL1oKISWYbwiehceitYDeeeo3NiOQ=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=i4szUYImhgZalxX4LeE8s7Cz07o2jqDGek6hO7ejSbqqLDlz70zLyi/msjSkULMWGoHxmRFdsq7uiQZLnqXIbI4zLi/E5NgYoemQAs7Dy+aNywKK4k8/V35qXf4VaonXBjJsjoWqpsFhylP8Y1xxRfz45QsyLfOvQ2lc/LsmlDY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1vcnc8-000000000zu-3lqw; Mon, 05 Jan 2026 16:39:28 +0000 Date: Mon, 5 Jan 2026 16:39:26 +0000 From: Daniel Golle To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Michael Klein , Daniel Golle , Aleksander Jan Bajkowski , Bevan Weiss , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 5/5] net: phy: realtek: get rid of magic number in rtlgen_read_status() Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use newly introduced helper macros RTL822X_VND2_TO_PAGE and RTL822X_VND2_TO_PAGE_REG to access RTL_VEND2_PHYSR register over Clause-22 paged access instead of using magic numbers. Signed-off-by: Daniel Golle Reviewed-by: Maxime Chevallier --- v2: no changes drivers/net/phy/realtek/realtek_main.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realt= ek/realtek_main.c index d1c7935a13acc..eb5b540ada0e5 100644 --- a/drivers/net/phy/realtek/realtek_main.c +++ b/drivers/net/phy/realtek/realtek_main.c @@ -1154,7 +1154,8 @@ static int rtlgen_read_status(struct phy_device *phyd= ev) if (!phydev->link) return 0; =20 - val =3D phy_read_paged(phydev, 0xa43, 0x12); + val =3D phy_read_paged(phydev, RTL822X_VND2_TO_PAGE(RTL_VND2_PHYSR), + RTL822X_VND2_TO_PAGE_REG(RTL_VND2_PHYSR)); if (val < 0) return val; =20 --=20 2.52.0