From nobody Sat Feb 7 21:53:11 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C52F52FB630; Sun, 4 Jan 2026 13:11:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767532300; cv=none; b=r9AeogBmoBssNjjTG5Wbxg84c0T0GD0DsqwQfKsSSr71x7bRFCkoVWhkF8Pz6P0OECOezAe2c0V14z3GAsL57Rsan6AIa326X5uo8aRR8nKDHJcoOPnKVv1imrAzPrWQvmiS6HSLfHDbZaR+HdObt8cRpA0odYwtPKiilJaBi18= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767532300; c=relaxed/simple; bh=tYEJmmgau17qRltQUPYm2vHWd3LcQw7vsvzSK3aD/54=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=ZOoEi0g38nmY2bMmPryqMR8NH8g7EcNcmUVfc00ul+KAa4cc/C9WS0UCws1h3fqYI+Rk1GdCsHf42PVBbYwq/+h/ndxBgRDnz0ZY6eChI/QL1ObhrxZzkRQI/RNbaVeRAfUqlAZ8A/snNZYh7qTyvP+KFYQlCs0rvJ75BlptG+4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1vcNtG-000000003NF-48w4; Sun, 04 Jan 2026 13:11:27 +0000 Date: Sun, 4 Jan 2026 13:11:24 +0000 From: Daniel Golle To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Michael Klein , Daniel Golle , Aleksander Jan Bajkowski , Bevan Weiss , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 1/4] net: phy: realtek: fix whitespace in struct phy_driver initializers Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Consistently use tabs instead of spaces in struct phy_driver initializers. Signed-off-by: Daniel Golle --- drivers/net/phy/realtek/realtek_main.c | 146 ++++++++++++------------- 1 file changed, 73 insertions(+), 73 deletions(-) diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realt= ek/realtek_main.c index 6ff0385201a57..e42c5efbfa5ef 100644 --- a/drivers/net/phy/realtek/realtek_main.c +++ b/drivers/net/phy/realtek/realtek_main.c @@ -1976,7 +1976,7 @@ static irqreturn_t rtl8221b_handle_interrupt(struct p= hy_device *phydev) static struct phy_driver realtek_drvs[] =3D { { PHY_ID_MATCH_EXACT(0x00008201), - .name =3D "RTL8201CP Ethernet", + .name =3D "RTL8201CP Ethernet", .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, }, { @@ -2102,7 +2102,7 @@ static struct phy_driver realtek_drvs[] =3D { .name =3D "RTL8226B_RTL8221B 2.5Gbps PHY", .get_features =3D rtl822x_get_features, .config_aneg =3D rtl822x_config_aneg, - .config_init =3D rtl822xb_config_init, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, .read_status =3D rtl822xb_read_status, .suspend =3D genphy_suspend, @@ -2111,112 +2111,112 @@ static struct phy_driver realtek_drvs[] =3D { .write_page =3D rtl821x_write_page, }, { PHY_ID_MATCH_EXACT(0x001cc838), - .name =3D "RTL8226-CG 2.5Gbps PHY", - .soft_reset =3D rtl822x_c45_soft_reset, - .get_features =3D rtl822x_c45_get_features, - .config_aneg =3D rtl822x_c45_config_aneg, - .config_init =3D rtl822x_config_init, - .read_status =3D rtl822xb_c45_read_status, - .suspend =3D genphy_c45_pma_suspend, - .resume =3D rtlgen_c45_resume, + .name =3D "RTL8226-CG 2.5Gbps PHY", + .soft_reset =3D rtl822x_c45_soft_reset, + .get_features =3D rtl822x_c45_get_features, + .config_aneg =3D rtl822x_c45_config_aneg, + .config_init =3D rtl822x_config_init, + .read_status =3D rtl822xb_c45_read_status, + .suspend =3D genphy_c45_pma_suspend, + .resume =3D rtlgen_c45_resume, }, { PHY_ID_MATCH_EXACT(0x001cc848), - .name =3D "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY", - .get_features =3D rtl822x_get_features, - .config_aneg =3D rtl822x_config_aneg, - .config_init =3D rtl822xb_config_init, + .name =3D "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY", + .get_features =3D rtl822x_get_features, + .config_aneg =3D rtl822x_config_aneg, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, - .read_status =3D rtl822xb_read_status, - .suspend =3D genphy_suspend, - .resume =3D rtlgen_resume, - .read_page =3D rtl821x_read_page, - .write_page =3D rtl821x_write_page, + .read_status =3D rtl822xb_read_status, + .suspend =3D genphy_suspend, + .resume =3D rtlgen_resume, + .read_page =3D rtl821x_read_page, + .write_page =3D rtl821x_write_page, }, { .match_phy_device =3D rtl8221b_vb_cg_c22_match_phy_device, - .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C22)", + .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C22)", .probe =3D rtl822x_probe, - .get_features =3D rtl822x_get_features, - .config_aneg =3D rtl822x_config_aneg, - .config_init =3D rtl822xb_config_init, + .get_features =3D rtl822x_get_features, + .config_aneg =3D rtl822x_config_aneg, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, - .read_status =3D rtl822xb_read_status, - .suspend =3D genphy_suspend, - .resume =3D rtlgen_resume, - .read_page =3D rtl821x_read_page, - .write_page =3D rtl821x_write_page, + .read_status =3D rtl822xb_read_status, + .suspend =3D genphy_suspend, + .resume =3D rtlgen_resume, + .read_page =3D rtl821x_read_page, + .write_page =3D rtl821x_write_page, }, { .match_phy_device =3D rtl8221b_vb_cg_c45_match_phy_device, - .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C45)", + .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C45)", .config_intr =3D rtl8221b_config_intr, .handle_interrupt =3D rtl8221b_handle_interrupt, .probe =3D rtl822x_probe, - .config_init =3D rtl822xb_config_init, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, - .get_features =3D rtl822x_c45_get_features, - .config_aneg =3D rtl822x_c45_config_aneg, - .read_status =3D rtl822xb_c45_read_status, - .suspend =3D genphy_c45_pma_suspend, - .resume =3D rtlgen_c45_resume, + .get_features =3D rtl822x_c45_get_features, + .config_aneg =3D rtl822x_c45_config_aneg, + .read_status =3D rtl822xb_c45_read_status, + .suspend =3D genphy_c45_pma_suspend, + .resume =3D rtlgen_c45_resume, }, { .match_phy_device =3D rtl8221b_vm_cg_c22_match_phy_device, - .name =3D "RTL8221B-VM-CG 2.5Gbps PHY (C22)", + .name =3D "RTL8221B-VM-CG 2.5Gbps PHY (C22)", .probe =3D rtl822x_probe, - .get_features =3D rtl822x_get_features, - .config_aneg =3D rtl822x_config_aneg, - .config_init =3D rtl822xb_config_init, + .get_features =3D rtl822x_get_features, + .config_aneg =3D rtl822x_config_aneg, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, - .read_status =3D rtl822xb_read_status, - .suspend =3D genphy_suspend, - .resume =3D rtlgen_resume, - .read_page =3D rtl821x_read_page, - .write_page =3D rtl821x_write_page, + .read_status =3D rtl822xb_read_status, + .suspend =3D genphy_suspend, + .resume =3D rtlgen_resume, + .read_page =3D rtl821x_read_page, + .write_page =3D rtl821x_write_page, }, { .match_phy_device =3D rtl8221b_vm_cg_c45_match_phy_device, - .name =3D "RTL8221B-VM-CG 2.5Gbps PHY (C45)", + .name =3D "RTL8221B-VM-CG 2.5Gbps PHY (C45)", .config_intr =3D rtl8221b_config_intr, .handle_interrupt =3D rtl8221b_handle_interrupt, .probe =3D rtl822x_probe, - .config_init =3D rtl822xb_config_init, + .config_init =3D rtl822xb_config_init, .get_rate_matching =3D rtl822xb_get_rate_matching, - .get_features =3D rtl822x_c45_get_features, - .config_aneg =3D rtl822x_c45_config_aneg, - .read_status =3D rtl822xb_c45_read_status, - .suspend =3D genphy_c45_pma_suspend, - .resume =3D rtlgen_c45_resume, + .get_features =3D rtl822x_c45_get_features, + .config_aneg =3D rtl822x_c45_config_aneg, + .read_status =3D rtl822xb_c45_read_status, + .suspend =3D genphy_c45_pma_suspend, + .resume =3D rtlgen_c45_resume, }, { .match_phy_device =3D rtl8251b_c45_match_phy_device, - .name =3D "RTL8251B 5Gbps PHY", + .name =3D "RTL8251B 5Gbps PHY", .probe =3D rtl822x_probe, - .get_features =3D rtl822x_get_features, - .config_aneg =3D rtl822x_config_aneg, - .read_status =3D rtl822x_read_status, - .suspend =3D genphy_suspend, - .resume =3D rtlgen_resume, - .read_page =3D rtl821x_read_page, - .write_page =3D rtl821x_write_page, + .get_features =3D rtl822x_get_features, + .config_aneg =3D rtl822x_config_aneg, + .read_status =3D rtl822x_read_status, + .suspend =3D genphy_suspend, + .resume =3D rtlgen_resume, + .read_page =3D rtl821x_read_page, + .write_page =3D rtl821x_write_page, }, { .match_phy_device =3D rtl_internal_nbaset_match_phy_device, - .name =3D "Realtek Internal NBASE-T PHY", + .name =3D "Realtek Internal NBASE-T PHY", .flags =3D PHY_IS_INTERNAL, .probe =3D rtl822x_probe, - .get_features =3D rtl822x_get_features, - .config_aneg =3D rtl822x_config_aneg, - .read_status =3D rtl822x_read_status, - .suspend =3D genphy_suspend, - .resume =3D rtlgen_resume, - .read_page =3D rtl821x_read_page, - .write_page =3D rtl821x_write_page, + .get_features =3D rtl822x_get_features, + .config_aneg =3D rtl822x_config_aneg, + .read_status =3D rtl822x_read_status, + .suspend =3D genphy_suspend, + .resume =3D rtlgen_resume, + .read_page =3D rtl821x_read_page, + .write_page =3D rtl821x_write_page, .read_mmd =3D rtl822x_read_mmd, .write_mmd =3D rtl822x_write_mmd, }, { PHY_ID_MATCH_EXACT(0x001ccad0), .name =3D "RTL8224 2.5Gbps PHY", .flags =3D PHY_POLL_CABLE_TEST, - .get_features =3D rtl822x_c45_get_features, - .config_aneg =3D rtl822x_c45_config_aneg, - .read_status =3D rtl822x_c45_read_status, - .suspend =3D genphy_c45_pma_suspend, - .resume =3D rtlgen_c45_resume, + .get_features =3D rtl822x_c45_get_features, + .config_aneg =3D rtl822x_c45_config_aneg, + .read_status =3D rtl822x_c45_read_status, + .suspend =3D genphy_c45_pma_suspend, + .resume =3D rtlgen_c45_resume, .cable_test_start =3D rtl8224_cable_test_start, .cable_test_get_status =3D rtl8224_cable_test_get_status, }, { @@ -2235,7 +2235,7 @@ static struct phy_driver realtek_drvs[] =3D { }, { PHY_ID_MATCH_EXACT(0x001ccb00), .name =3D "RTL9000AA_RTL9000AN Ethernet", - .features =3D PHY_BASIC_T1_FEATURES, + .features =3D PHY_BASIC_T1_FEATURES, .config_init =3D rtl9000a_config_init, .config_aneg =3D rtl9000a_config_aneg, .read_status =3D rtl9000a_read_status, --=20 2.52.0 From nobody Sat Feb 7 21:53:11 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C28FA248176; Sun, 4 Jan 2026 13:11:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767532317; cv=none; b=eC2cHD4gIN005TS3ibOtL9NZJS3YFSk6jXo5FBvwG6hHvevLBRVyK0EHhawnXl22aUqP/BSEwlELohMvo/wfbLsmnL1OhreERuSxmNHt71K20hvIOC1l4ZLZvAAFXDYIaRy+PonHPJrVCBoMPnmJ7lQaen2C95tJqwkY+QhkmIo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767532317; c=relaxed/simple; bh=6pZQm5pyKF5ZGDG3QVZWOEC77tTyW89PzViemk3NNno=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=CqX+96uSQy4P/0z46kWguVu9KP1hOvXB62rEk5sZBFNL56uWglhv7RC5oTrn5075+UUwDuyjtb3calk9B057KhEgzX73gIFd1VeaOCHbvVXV0oNIiDWBYnUOVb2LF+GneiXOjIe3NN5BDUQhGN8uZxUhYxmRBxvKaC6JuKEb7Ms= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1vcNtf-000000003PD-1CFL; Sun, 04 Jan 2026 13:11:51 +0000 Date: Sun, 4 Jan 2026 13:11:48 +0000 From: Daniel Golle To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Michael Klein , Daniel Golle , Aleksander Jan Bajkowski , Bevan Weiss , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 2/4] net: phy: realtek: implement configuring in-band an Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Implement the inband_caps() and config_inband() PHY driver methods to allow configuring the use of in-band-status with SGMII and 2500Base-X on RTL8226 and RTL8221B 2.5GE PHYs. Signed-off-by: Daniel Golle --- drivers/net/phy/realtek/realtek_main.c | 67 ++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realt= ek/realtek_main.c index e42c5efbfa5ef..0653a9d8fcb6f 100644 --- a/drivers/net/phy/realtek/realtek_main.c +++ b/drivers/net/phy/realtek/realtek_main.c @@ -131,6 +131,15 @@ #define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII 0x02 #define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX 0x16 =20 +#define RTL822X_VND1_SERDES_CMD 0x7587 +#define RTL822X_VND1_SERDES_CMD_WRITE BIT(1) +#define RTL822X_VND1_SERDES_CMD_BUSY BIT(0) +#define RTL822X_VND1_SERDES_ADDR 0x7588 +#define RTL822X_VND1_SERDES_ADDR_AUTONEG 0x2 +#define RTL822X_VND1_SERDES_INBAND_DISABLE 0x71d0 +#define RTL822X_VND1_SERDES_INBAND_ENABLE 0x70d0 +#define RTL822X_VND1_SERDES_DATA 0x7589 + /* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45 * is set, they cannot be accessed by C45-over-C22. */ @@ -1308,6 +1317,50 @@ static int rtl822xb_config_init(struct phy_device *p= hydev) return rtl822x_set_serdes_option_mode(phydev, false); } =20 +static int rtl822x_serdes_write(struct phy_device *phydev, u16 reg, u16 va= l) +{ + int ret, poll; + + ret =3D phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_ADDR, r= eg); + if (ret < 0) + return ret; + + ret =3D phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_DATA, v= al); + if (ret < 0) + return ret; + + ret =3D phy_write_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_CMD, + RTL822X_VND1_SERDES_CMD_WRITE | + RTL822X_VND1_SERDES_CMD_BUSY); + if (ret < 0) + return ret; + + return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, + RTL822X_VND1_SERDES_CMD, poll, + !(poll & RTL822X_VND1_SERDES_CMD_BUSY), + 500, 100000, false); +} + +static int rtl822x_config_inband(struct phy_device *phydev, unsigned int m= odes) +{ + return rtl822x_serdes_write(phydev, RTL822X_VND1_SERDES_ADDR_AUTONEG, + (modes !=3D LINK_INBAND_DISABLE) ? + RTL822X_VND1_SERDES_INBAND_ENABLE : + RTL822X_VND1_SERDES_INBAND_DISABLE); +} + +static unsigned int rtl822x_inband_caps(struct phy_device *phydev, + phy_interface_t interface) +{ + switch (interface) { + case PHY_INTERFACE_MODE_2500BASEX: + case PHY_INTERFACE_MODE_SGMII: + return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE; + default: + return 0; + } +} + static int rtl822xb_get_rate_matching(struct phy_device *phydev, phy_interface_t iface) { @@ -2103,6 +2156,8 @@ static struct phy_driver realtek_drvs[] =3D { .get_features =3D rtl822x_get_features, .config_aneg =3D rtl822x_config_aneg, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .read_status =3D rtl822xb_read_status, .suspend =3D genphy_suspend, @@ -2116,6 +2171,8 @@ static struct phy_driver realtek_drvs[] =3D { .get_features =3D rtl822x_c45_get_features, .config_aneg =3D rtl822x_c45_config_aneg, .config_init =3D rtl822x_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .read_status =3D rtl822xb_c45_read_status, .suspend =3D genphy_c45_pma_suspend, .resume =3D rtlgen_c45_resume, @@ -2125,6 +2182,8 @@ static struct phy_driver realtek_drvs[] =3D { .get_features =3D rtl822x_get_features, .config_aneg =3D rtl822x_config_aneg, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .read_status =3D rtl822xb_read_status, .suspend =3D genphy_suspend, @@ -2138,6 +2197,8 @@ static struct phy_driver realtek_drvs[] =3D { .get_features =3D rtl822x_get_features, .config_aneg =3D rtl822x_config_aneg, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .read_status =3D rtl822xb_read_status, .suspend =3D genphy_suspend, @@ -2151,6 +2212,8 @@ static struct phy_driver realtek_drvs[] =3D { .handle_interrupt =3D rtl8221b_handle_interrupt, .probe =3D rtl822x_probe, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .get_features =3D rtl822x_c45_get_features, .config_aneg =3D rtl822x_c45_config_aneg, @@ -2164,6 +2227,8 @@ static struct phy_driver realtek_drvs[] =3D { .get_features =3D rtl822x_get_features, .config_aneg =3D rtl822x_config_aneg, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .read_status =3D rtl822xb_read_status, .suspend =3D genphy_suspend, @@ -2177,6 +2242,8 @@ static struct phy_driver realtek_drvs[] =3D { .handle_interrupt =3D rtl8221b_handle_interrupt, .probe =3D rtl822x_probe, .config_init =3D rtl822xb_config_init, + .inband_caps =3D rtl822x_inband_caps, + .config_inband =3D rtl822x_config_inband, .get_rate_matching =3D rtl822xb_get_rate_matching, .get_features =3D rtl822x_c45_get_features, .config_aneg =3D rtl822x_c45_config_aneg, --=20 2.52.0 From nobody Sat Feb 7 21:53:11 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5767281368; 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dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1vcNu4-000000003Pb-1ulL; Sun, 04 Jan 2026 13:12:16 +0000 Date: Sun, 4 Jan 2026 13:12:13 +0000 From: Daniel Golle To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Michael Klein , Daniel Golle , Aleksander Jan Bajkowski , Bevan Weiss , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 3/4] net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 mode Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" RTL822x cannot access MDIO_MMD_VEND2 via MII_MMD_CTRL/MII_MMD_DATA. A mapping to use paged access needs to be used instead. All other MMD devices can be accessed as usual. Implement phy_read_mmd and phy_write_mmd using paged access for MDIO_MMD_VEND2 in Clause-22 mode instead of relying on MII_MMD_CTRL/MII_MMD_DATA. This allows eg. rtl822x_config_aneg to work as expected in case the MDIO bus doesn't support Clause-45 access. Suggested-by: Bevan Weiss Signed-off-by: Daniel Golle --- drivers/net/phy/realtek/realtek_main.c | 116 ++++++++++++++++++++++++- 1 file changed, 113 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realt= ek/realtek_main.c index 0653a9d8fcb6f..142a5421fe84c 100644 --- a/drivers/net/phy/realtek/realtek_main.c +++ b/drivers/net/phy/realtek/realtek_main.c @@ -140,9 +140,8 @@ #define RTL822X_VND1_SERDES_INBAND_ENABLE 0x70d0 #define RTL822X_VND1_SERDES_DATA 0x7589 =20 -/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45 - * is set, they cannot be accessed by C45-over-C22. - */ +#define RTL822X_VND2_TO_PAGE(reg) ((reg) >> 4) +#define RTL822X_VND2_TO_PAGE_REG(reg) (16 + (((reg) & GENMASK(3, 0)) >> 1= )) #define RTL822X_VND2_C22_REG(reg) (0xa400 + 2 * (reg)) =20 #define RTL8221B_VND2_INER 0xa4d2 @@ -1247,6 +1246,105 @@ static int rtl822x_probe(struct phy_device *phydev) return 0; } =20 +/* RTL822x cannot access MDIO_MMD_VEND2 via MII_MMD_CTRL/MII_MMD_DATA. + * A mapping to use paged access needs to be used instead. + * All other MMD devices can be accessed as usual. + */ +static int rtl822xb_read_mmd(struct phy_device *phydev, int devnum, u16 re= g) +{ + int oldpage, ret, read_ret; + u16 page; + + /* Use Clause-45 bus access in case it is available */ + if (phydev->is_c45) + return __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr, + devnum, mmdreg); + + /* Use indirect access via MII_MMD_CTRL and MII_MMD_DATA for all + * MMDs except MDIO_MMD_VEND2 + */ + if (devnum !=3D MDIO_MMD_VEND2) { + __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, + MII_MMD_CTRL, devnum); + __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, + MII_MMD_DATA, mmdreg); + __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, + MII_MMD_CTRL, devnum | MII_MMD_CTRL_NOINCR); + + return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, + MII_MMD_DATA); + } + + /* Use paged access for MDIO_MMD_VEND2 over Clause-22 */ + page =3D RTL822X_VND2_TO_PAGE(reg); + oldpage =3D __phy_read(phydev, RTL821x_PAGE_SELECT); + if (oldpage < 0) + return ret; + + if (oldpage !=3D page) { + ret =3D __phy_write(phydev, RTL821x_PAGE_SELECT, page); + if (ret < 0) + return ret; + } + + read_ret =3D __phy_read(phydev, RTL822X_VND2_TO_PAGE_REG(reg)); + if (oldpage !=3D page) { + ret =3D __phy_write(phydev, RTL821x_PAGE_SELECT, oldpage); + if (ret < 0) + return ret; + } + + return read_ret; +} + +static int rtl822xb_write_mmd(struct phy_device *phydev, int devnum, u16 r= eg, + u16 val) +{ + int oldpage, ret, write_ret; + u16 page; + + /* Use Clause-45 bus access in case it is available */ + if (phydev->is_c45) + return __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr, + devnum, mmdreg, val); + + /* Use indirect access via MII_MMD_CTRL and MII_MMD_DATA for all + * MMDs except MDIO_MMD_VEND2 + */ + if (devnum !=3D MDIO_MMD_VEND2) { + __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, + MII_MMD_CTRL, devnum); + __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, + MII_MMD_DATA, mmdreg); + __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, + MII_MMD_CTRL, devnum | MII_MMD_CTRL_NOINCR); + + return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, + MII_MMD_DATA, val); + } + + /* Use paged access for MDIO_MMD_VEND2 over Clause-22 */ + page =3D RTL822X_VND2_TO_PAGE(reg); + oldpage =3D __phy_read(phydev, RTL821x_PAGE_SELECT); + if (oldpage < 0) + return ret; + + if (oldpage !=3D page) { + ret =3D __phy_write(phydev, RTL821x_PAGE_SELECT, page); + if (ret < 0) + return ret; + } + + write_ret =3D __phy_write(phydev, RTL822X_VND2_TO_PAGE_REG(reg), val); + if (oldpage !=3D page) { + ret =3D __phy_write(phydev, RTL821x_PAGE_SELECT, oldpage); + if (ret < 0) + return ret; + } + + return write_ret; +} + static int rtl822x_set_serdes_option_mode(struct phy_device *phydev, bool = gen1) { bool has_2500, has_sgmii; @@ -2150,6 +2248,8 @@ static struct phy_driver realtek_drvs[] =3D { .resume =3D rtlgen_resume, .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { .match_phy_device =3D rtl8221b_match_phy_device, .name =3D "RTL8226B_RTL8221B 2.5Gbps PHY", @@ -2164,6 +2264,8 @@ static struct phy_driver realtek_drvs[] =3D { .resume =3D rtlgen_resume, .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { PHY_ID_MATCH_EXACT(0x001cc838), .name =3D "RTL8226-CG 2.5Gbps PHY", @@ -2176,6 +2278,8 @@ static struct phy_driver realtek_drvs[] =3D { .read_status =3D rtl822xb_c45_read_status, .suspend =3D genphy_c45_pma_suspend, .resume =3D rtlgen_c45_resume, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { PHY_ID_MATCH_EXACT(0x001cc848), .name =3D "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY", @@ -2190,6 +2294,8 @@ static struct phy_driver realtek_drvs[] =3D { .resume =3D rtlgen_resume, .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { .match_phy_device =3D rtl8221b_vb_cg_c22_match_phy_device, .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C22)", @@ -2205,6 +2311,8 @@ static struct phy_driver realtek_drvs[] =3D { .resume =3D rtlgen_resume, .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { .match_phy_device =3D rtl8221b_vb_cg_c45_match_phy_device, .name =3D "RTL8221B-VB-CG 2.5Gbps PHY (C45)", @@ -2235,6 +2343,8 @@ static struct phy_driver realtek_drvs[] =3D { .resume =3D rtlgen_resume, .read_page =3D rtl821x_read_page, .write_page =3D rtl821x_write_page, + .read_mmd =3D rtl822xb_read_mmd, + .write_mmd =3D rtl822xb_write_mmd, }, { .match_phy_device =3D rtl8221b_vm_cg_c45_match_phy_device, .name =3D "RTL8221B-VM-CG 2.5Gbps PHY (C45)", --=20 2.52.0 From nobody Sat Feb 7 21:53:11 2026 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7622327C84B; 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dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.99) (envelope-from ) id 1vcNuF-000000003Q7-1CQz; Sun, 04 Jan 2026 13:12:27 +0000 Date: Sun, 4 Jan 2026 13:12:24 +0000 From: Daniel Golle To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Vladimir Oltean , Michael Klein , Daniel Golle , Aleksander Jan Bajkowski , Bevan Weiss , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 4/4] net: phy: realtek: get rid of magic number in rtlgen_read_status() Message-ID: <86e976322ee9bf1612eadf4403158a837a0ee076.1767531485.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use newly introduced helper macros RTL822X_VND2_TO_PAGE and RTL822X_VND2_TO_PAGE_REG to access RTL_VEND2_PHYSR register over Clause-22 paged access instead of using magic numbers. Signed-off-by: Daniel Golle --- drivers/net/phy/realtek/realtek_main.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realt= ek/realtek_main.c index 142a5421fe84c..a61e9ed05cdd2 100644 --- a/drivers/net/phy/realtek/realtek_main.c +++ b/drivers/net/phy/realtek/realtek_main.c @@ -1153,7 +1153,8 @@ static int rtlgen_read_status(struct phy_device *phyd= ev) if (!phydev->link) return 0; =20 - val =3D phy_read_paged(phydev, 0xa43, 0x12); + val =3D phy_read_paged(phydev, RTL822X_VND2_TO_PAGE(RTL_VND2_PHYSR), + RTL822X_VND2_TO_PAGE_REG(RTL_VND2_PHYSR)); if (val < 0) return val; =20 --=20 2.52.0