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Mon, 15 Dec 2025 00:00:00 -0800 (PST) From: Alex Tran To: Mauro Carvalho Chehab Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Pavel Machek , Sakari Ailus , Laurent Pinchart , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alex Tran Subject: [PATCH v2 1/4] media: i2c: et8ek8: et8ek8_driver: add support for crc configuration via device tree Date: Sun, 14 Dec 2025 23:58:32 -0800 Message-ID: X-Mailer: git-send-email 2.51.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Retrieve the configuration for CRC from the device tree instead using the hard coded USE_CRC macro. If there is an issue retrieving the endpoint node or the CRC property then the default of 1 is used and the driver does not fail to maintain backward compatibility. Signed-off-by: Alex Tran --- drivers/media/i2c/et8ek8/et8ek8_driver.c | 49 +++++++++++++++++++----- 1 file changed, 39 insertions(+), 10 deletions(-) diff --git a/drivers/media/i2c/et8ek8/et8ek8_driver.c b/drivers/media/i2c/e= t8ek8/et8ek8_driver.c index 2cb7b7187..4ef92359c 100644 --- a/drivers/media/i2c/et8ek8/et8ek8_driver.c +++ b/drivers/media/i2c/et8ek8/et8ek8_driver.c @@ -29,6 +29,7 @@ #include #include #include +#include #include =20 #include "et8ek8_reg.h" @@ -45,6 +46,7 @@ struct et8ek8_sensor { struct regulator *vana; struct clk *ext_clk; u32 xclk_freq; + u32 use_crc; =20 u16 version; =20 @@ -130,8 +132,6 @@ static struct et8ek8_gain { =20 #define ET8EK8_I2C_DELAY 3 /* msec delay b/w accesses */ =20 -#define USE_CRC 1 - /* * Register access helpers * @@ -844,20 +844,16 @@ static int et8ek8_power_on(struct et8ek8_sensor *sens= or) if (rval) goto out; =20 -#ifdef USE_CRC rval =3D et8ek8_i2c_read_reg(client, ET8EK8_REG_8BIT, 0x1263, &val); if (rval) goto out; -#if USE_CRC /* TODO get crc setting from DT */ - val |=3D BIT(4); -#else - val &=3D ~BIT(4); -#endif + if (sensor->use_crc) + val |=3D BIT(4); + else + val &=3D ~BIT(4); rval =3D et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT, 0x1263, val); if (rval) goto out; -#endif - out: if (rval) et8ek8_power_off(sensor); @@ -1396,6 +1392,34 @@ static int __maybe_unused et8ek8_resume(struct devic= e *dev) return __et8ek8_set_power(sensor, true); } =20 +static int et8ek8_parse_fwnode(struct device *dev, struct et8ek8_sensor *s= ensor) +{ + struct v4l2_fwnode_endpoint bus_cfg =3D { + .bus_type =3D V4L2_MBUS_CCP2, + }; + struct fwnode_handle *ep; + int ret; + + ep =3D fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 0, 0, + FWNODE_GRAPH_ENDPOINT_NEXT); + if (!ep) { + dev_warn(dev, "could not get endpoint node\n"); + return -EINVAL; + } + + ret =3D v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); + if (ret) { + dev_warn(dev, "parsing endpoint node failed\n"); + goto done; + } + + fwnode_property_read_u32(ep, "crc", &sensor->use_crc); +done: + v4l2_fwnode_endpoint_free(&bus_cfg); + fwnode_handle_put(ep); + return ret; +} + static int et8ek8_probe(struct i2c_client *client) { struct et8ek8_sensor *sensor; @@ -1406,6 +1430,11 @@ static int et8ek8_probe(struct i2c_client *client) if (!sensor) return -ENOMEM; =20 + sensor->use_crc =3D 1; + ret =3D et8ek8_parse_fwnode(dev, sensor); + if (ret) + dev_warn(dev, "parsing endpoint failed\n"); + sensor->reset =3D devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(sensor->reset)) { dev_dbg(&client->dev, "could not request reset gpio\n"); --=20 2.51.0 From nobody Mon Dec 15 23:31:48 2025 Received: from mail-pj1-f51.google.com (mail-pj1-f51.google.com [209.85.216.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6481932AAD3 for ; Mon, 15 Dec 2025 08:00:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Mon, 15 Dec 2025 00:00:03 -0800 (PST) Received: from fedora ([172.59.162.202]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-11f2e2ff624sm43637473c88.12.2025.12.15.00.00.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Dec 2025 00:00:03 -0800 (PST) From: Alex Tran To: Mauro Carvalho Chehab Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Pavel Machek , Sakari Ailus , Laurent Pinchart , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alex Tran Subject: [PATCH v2 2/4] dt-bindings: media: i2c: et8ek8: document missing crc as optional property Date: Sun, 14 Dec 2025 23:58:33 -0800 Message-ID: X-Mailer: git-send-email 2.51.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert the et8ek8 sensor device tree binding from TXT to YAML format. Add the optional crc property to the endpoint node for the et8ek8 sensor. This property enables CRC checksums for the sensor bus and was added to match the new driver support for reading it from the device tree. Add documentation reference to MAINTAINERS file. Signed-off-by: Alex Tran --- .../bindings/media/i2c/toshiba,et8ek8.txt | 55 ----------- .../bindings/media/i2c/toshiba,et8ek8.yaml | 99 +++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 100 insertions(+), 55 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/i2c/toshiba,et8= ek8.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/toshiba,et8= ek8.yaml diff --git a/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt= b/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt deleted file mode 100644 index 8d8e40c56..000000000 --- a/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt +++ /dev/null @@ -1,55 +0,0 @@ -Toshiba et8ek8 5MP sensor - -Toshiba et8ek8 5MP sensor is an image sensor found in Nokia N900 device - -More detailed documentation can be found in -Documentation/devicetree/bindings/media/video-interfaces.txt . - - -Mandatory properties --------------------- - -- compatible: "toshiba,et8ek8" -- reg: I2C address (0x3e, or an alternative address) -- vana-supply: Analogue voltage supply (VANA), 2.8 volts -- clocks: External clock to the sensor -- reset-gpios: XSHUTDOWN GPIO. The XSHUTDOWN signal is active low. The sen= sor - is in hardware standby mode when the signal is in the low state. - - -Optional properties -------------------- - -- flash-leds: See ../video-interfaces.txt -- lens-focus: See ../video-interfaces.txt - - -Endpoint node mandatory properties ----------------------------------- - -- remote-endpoint: A phandle to the bus receiver's endpoint node. - - -Example -------- - -&i2c3 { - clock-frequency =3D <400000>; - - cam1: camera@3e { - compatible =3D "toshiba,et8ek8"; - reg =3D <0x3e>; - vana-supply =3D <&vaux4>; - - clocks =3D <&isp 0>; - assigned-clocks =3D <&isp 0>; - assigned-clock-rates =3D <9600000>; - - reset-gpio =3D <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */ - port { - csi_cam1: endpoint { - remote-endpoint =3D <&csi_out1>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.yam= l b/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.yaml new file mode 100644 index 000000000..6e7f60ee9 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/toshiba,et8ek8.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba et8ek8 5MP sensor + +maintainers: + - Pavel Machek + - Sakari Ailus + +description: + Toshiba et8ek8 5MP sensor is an image sensor found in Nokia N900 device + +properties: + compatible: + const: toshiba,et8ek8 + + reg: + description: + I2C address (0x3e, or an alternative address) + maxItems: 1 + + vana-supply: + description: + Analogue voltage supply (VANA), 2.8 volts + + clocks: + description: + External clock to the sensor + maxItems: 1 + + reset-gpios: + description: + XSHUTDOWN GPIO. The XSHUTDOWN signal is active low. The sensor + is in hardware standby mode when the signal is in the low state. + maxItems: 1 + + flash-leds: + $ref: /schemas/media/video-interfaces.yaml# + + lens-focus: + $ref: /schemas/media/video-interfaces.yaml# + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + crc: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + default: 1 + description: + Enable CRC checksums. + + remote-endpoint: true + +required: + - compatible + - reg + - vana-supply + - clocks + - reset-gpios + - port + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + camera@3e { + compatible =3D "toshiba,et8ek8"; + reg =3D <0x3e>; + vana-supply =3D <&vaux4>; + clocks =3D <&isp 0>; + assigned-clocks =3D <&isp 0>; + assigned-clock-rates =3D <9600000>; + reset-gpios =3D <&gpio4 6 GPIO_ACTIVE_HIGH>; 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Mon, 15 Dec 2025 00:00:05 -0800 (PST) Received: from fedora ([172.59.162.202]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-11f2e2ff624sm43637473c88.12.2025.12.15.00.00.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Dec 2025 00:00:05 -0800 (PST) From: Alex Tran To: Mauro Carvalho Chehab Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Pavel Machek , Sakari Ailus , Laurent Pinchart , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alex Tran Subject: [PATCH v2 3/4] media: platform: ti: omap3isp: isp: read crc configuration from device tree for CCP2 Date: Sun, 14 Dec 2025 23:58:34 -0800 Message-ID: <8b91902b1aea867a67aa5679710812650fa2987a.1765782992.git.alex.t.tran@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Allow CCP2 receiver to read the crc configuration from the device tree. Default value of 1 is used to maintain backward compatibility with existing device trees that don't specify the crc property. Signed-off-by: Alex Tran --- drivers/media/platform/ti/omap3isp/isp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/ti/omap3isp/isp.c b/drivers/media/platf= orm/ti/omap3isp/isp.c index 8ac2bdcdf..cd10589ed 100644 --- a/drivers/media/platform/ti/omap3isp/isp.c +++ b/drivers/media/platform/ti/omap3isp/isp.c @@ -2102,7 +2102,10 @@ static void isp_parse_of_csi1_endpoint(struct device= *dev, buscfg->bus.ccp2.ccp2_mode =3D vep->bus_type =3D=3D V4L2_MBUS_CCP2; buscfg->bus.ccp2.vp_clk_pol =3D 1; =20 - buscfg->bus.ccp2.crc =3D 1; + u32 use_crc =3D 1; + + fwnode_property_read_u32(vep->base.local_fwnode, "crc", &use_crc); + buscfg->bus.ccp2.crc =3D use_crc; } =20 static struct { --=20 2.51.0 From nobody Mon Dec 15 23:31:48 2025 Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4DB3B327BE1 for ; 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Mon, 15 Dec 2025 00:00:07 -0800 (PST) Received: from fedora ([172.59.162.202]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-11f2e2ff624sm43637473c88.12.2025.12.15.00.00.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Dec 2025 00:00:07 -0800 (PST) From: Alex Tran To: Mauro Carvalho Chehab Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Pavel Machek , Sakari Ailus , Laurent Pinchart , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alex Tran Subject: [PATCH v2 4/4] dt-bindings: media: omap3isp: document missing crc as optional property Date: Sun, 14 Dec 2025 23:58:35 -0800 Message-ID: <99fea6935f255661a2c41adc11ba5f85d17e3bf4.1765782992.git.alex.t.tran@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert the OMAP3 ISP device tree binding from TXT format to YAML. Add the optional crc property to the endpoint node for the omap3isp receiver. This property enables CRC checksums for the bus and was added to match the new driver support for reading it from the device tree. Signed-off-by: Alex Tran --- .../devicetree/bindings/media/ti,omap3isp.txt | 71 ------- .../bindings/media/ti,omap3isp.yaml | 196 ++++++++++++++++++ 2 files changed, 196 insertions(+), 71 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/ti,omap3isp.txt create mode 100644 Documentation/devicetree/bindings/media/ti,omap3isp.yaml diff --git a/Documentation/devicetree/bindings/media/ti,omap3isp.txt b/Docu= mentation/devicetree/bindings/media/ti,omap3isp.txt deleted file mode 100644 index ac23de855..000000000 --- a/Documentation/devicetree/bindings/media/ti,omap3isp.txt +++ /dev/null @@ -1,71 +0,0 @@ -OMAP 3 ISP Device Tree bindings -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D - -The DT definitions can be found in include/dt-bindings/media/omap3-isp.h. - -Required properties -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D - -compatible : must contain "ti,omap3-isp" - -reg : the two registers sets (physical address and length) for the - ISP. The first set contains the core ISP registers up to - the end of the SBL block. The second set contains the - CSI PHYs and receivers registers. -interrupts : the ISP interrupt specifier -iommus : phandle and IOMMU specifier for the IOMMU that serves the ISP -syscon : the phandle and register offset to the Complex I/O or CSI-PHY - register -ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430) - 1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630) -#clock-cells : Must be 1 --- the ISP provides two external clocks, - cam_xclka and cam_xclkb, at indices 0 and 1, - respectively. Please find more information on common - clock bindings in ../clock/clock-bindings.txt. - -Port nodes (optional) ---------------------- - -More documentation on these bindings is available in -video-interfaces.txt in the same directory. - -reg : The interface: - 0 - parallel (CCDC) - 1 - CSIPHY1 -- CSI2C / CCP2B on 3630; - CSI1 -- CSIb on 3430 - 2 - CSIPHY2 -- CSI2A / CCP2B on 3630; - CSI2 -- CSIa on 3430 - -Optional properties -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D - -vdd-csiphy1-supply : voltage supply of the CSI-2 PHY 1 -vdd-csiphy2-supply : voltage supply of the CSI-2 PHY 2 - -Endpoint nodes --------------- - -lane-polarities : lane polarity (required on CSI-2) - 0 -- not inverted; 1 -- inverted -data-lanes : an array of data lanes from 1 to 3. The length can - be either 1 or 2. (required on CSI-2) -clock-lanes : the clock lane (from 1 to 3). (required on CSI-2) - - -Example -=3D=3D=3D=3D=3D=3D=3D - - isp@480bc000 { - compatible =3D "ti,omap3-isp"; - reg =3D <0x480bc000 0x12fc - 0x480bd800 0x0600>; - interrupts =3D <24>; - iommus =3D <&mmu_isp>; - syscon =3D <&scm_conf 0x2f0>; - ti,phy-type =3D ; - #clock-cells =3D <1>; - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - }; - }; diff --git a/Documentation/devicetree/bindings/media/ti,omap3isp.yaml b/Doc= umentation/devicetree/bindings/media/ti,omap3isp.yaml new file mode 100644 index 000000000..b86c3aa71 --- /dev/null +++ b/Documentation/devicetree/bindings/media/ti,omap3isp.yaml @@ -0,0 +1,196 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/ti,omap3isp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments OMAP 3 Image Signal Processor (ISP) + +maintainers: + - Laurent Pinchart + - Sakari Ailus + +description: + The OMAP 3 ISP is an image signal processor present in OMAP 3 SoCs. + +properties: + compatible: + const: ti,omap3-isp + + reg: + items: + - description: Core ISP registers up to the end of the SBL block + - description: CSI PHYs and receivers registers + + interrupts: + maxItems: 1 + description: the ISP interrupt specifier + + iommus: + maxItems: 1 + description: phandle and IOMMU specifier for the IOMMU that serves the= ISP + + syscon: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to System Control Module + - description: register offset to Complex I/O or CSI-PHY register + description: + Phandle and register offset to the Complex I/O or CSI-PHY register + + ti,phy-type: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: + 0 - OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. OMAP 3430) + 1 - OMAP3ISP_PHY_TYPE_CSIPHY (e.g. OMAP 3630) + + '#clock-cells': + const: 1 + description: + The ISP provides two external clocks, cam_xclka and cam_xclkb, + at indices 0 and 1 respectively. + + vdd-csiphy1-supply: + description: Voltage supply of the CSI-2 PHY 1 + + vdd-csiphy2-supply: + description: Voltage supply of the CSI-2 PHY 2 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: Parallel (CCDC) interface + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: | + CSIPHY1 interface: + OMAP 3630: CSI2C / CCP2B + OMAP 3430: CSI1 (CSIb) + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + lane-polarities: + description: | + The lane polarity (required on CSI-2): + 0 - not inverted + 1 - inverted + minItems: 2 + maxItems: 3 + items: + enum: [0, 1] + + data-lanes: + description: Data lanes (required on CSI-2) + minItems: 1 + maxItems: 2 + items: + minimum: 1 + maximum: 3 + + clock-lanes: + description: The clock lane (required on CSI-2) + maxItems: 1 + items: + minimum: 1 + maximum: 3 + + crc: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + default: 1 + description: + Enable CRC checksums. + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: | + CSIPHY2 interface: + OMAP 3630: CSI2A / CCP2B + OMAP 3430: CSI2 (CSIa) + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + lane-polarities: + description: | + The lane polarity (required on CSI-2): + 0 - not inverted + 1 - inverted + minItems: 2 + maxItems: 3 + items: + enum: [0, 1] + + data-lanes: + description: Data lanes (required on CSI-2) + minItems: 1 + maxItems: 2 + items: + minimum: 1 + maximum: 3 + + clock-lanes: + description: The clock lane (required on CSI-2) + maxItems: 1 + items: + minimum: 1 + maximum: 3 + + crc: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + default: 1 + description: + Enable CRC checksums. + +required: + - compatible + - reg + - interrupts + - iommus + - syscon + - ti,phy-type + - '#clock-cells' + +additionalProperties: false + +examples: + - | + #include + + isp@480bc000 { + compatible =3D "ti,omap3-isp"; + reg =3D <0x480bc000 0x12fc>, + <0x480bd800 0x0600>; + interrupts =3D <24>; + iommus =3D <&mmu_isp>; + syscon =3D <&scm_conf 0x2f0>; + ti,phy-type =3D ; + #clock-cells =3D <1>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; --=20 2.51.0