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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 00:57:51.4856 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a3617c2a-5e62-4ed1-2199-08de224fabed X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD82.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9082 Content-Type: text/plain; charset="utf-8" Smart Data Cache Injection (SDCI) is a mechanism that enables direct insertion of data from I/O devices into the L3 cache. By directly caching data from I/O devices rather than first storing the I/O data in DRAM, SDCI reduces demands on DRAM bandwidth and reduces latency to the processor consuming the I/O data. The SDCIAE (SDCI Allocation Enforcement) PQE feature allows system software to control the portion of the L3 cache used for SDCI. When enabled, SDCIAE forces all SDCI lines to be placed into the L3 cache partitions identified by the highest-supported L3_MASK_n register, where n is the maximum supported CLOSID. Add CPUID feature bit that can be used to configure SDCIAE. The SDCIAE feature details are documented in APM [1] available from [2]. [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming Publication # 24593 Revision 3.41 section 19.4.7 L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE). Signed-off-by: Babu Moger Acked-by: Borislav Petkov (AMD) Reviewed-by: Reinette Chatre Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D206537 # [2] --- v12: No changes. v11: No changes. v10: Fixed the minor conflicts in scattered.c and cpufeatures.h. Updated the changelog to fix minor formating. v9: No changes. v8: Added Acked-by, Reviewed-by tags. v7: No changes. Fixed few conflicts in arch/x86/include/asm/cpufeatures.h arch/x86/kernel/cpu/scattered.c v6: Resolved conflicts in cpufeatures.h. v5: No changes. v4: Resolved a minor conflict in cpufeatures.h. v3: No changes. v2: Added dependancy on X86_FEATURE_CAT_L3 Removed the "" in CPU feature definition. Minor text changes. --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/cpuid-deps.c | 1 + arch/x86/kernel/cpu/scattered.c | 1 + 3 files changed, 3 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpuf= eatures.h index 6b5a16e33c8f..c0da99b12008 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -503,6 +503,7 @@ #define X86_FEATURE_ABMC (21*32+15) /* Assignable Bandwidth Monitoring Co= unters */ #define X86_FEATURE_MSR_IMM (21*32+16) /* MSR immediate form instructions= */ #define X86_FEATURE_SGX_EUPDATESVN (21*32+17) /* Support for ENCLS[EUPDATE= SVN] instruction */ +#define X86_FEATURE_SDCIAE (21*32+18) /* L3 Smart Data Cache Injection Al= location Enforcement */ =20 /* * BUG word(s) diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-d= eps.c index 3d9f49ad0efd..a40f5545e25b 100644 --- a/arch/x86/kernel/cpu/cpuid-deps.c +++ b/arch/x86/kernel/cpu/cpuid-deps.c @@ -72,6 +72,7 @@ static const struct cpuid_dep cpuid_deps[] =3D { { X86_FEATURE_CQM_MBM_LOCAL, X86_FEATURE_CQM_LLC }, { X86_FEATURE_BMEC, X86_FEATURE_CQM_MBM_TOTAL }, { X86_FEATURE_BMEC, X86_FEATURE_CQM_MBM_LOCAL }, + { X86_FEATURE_SDCIAE, X86_FEATURE_CAT_L3 }, { X86_FEATURE_AVX512_BF16, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_FP16, X86_FEATURE_AVX512BW }, { X86_FEATURE_ENQCMD, X86_FEATURE_XSAVES }, diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattere= d.c index a227563042e7..cde4b6cd3471 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -57,6 +57,7 @@ static const struct cpuid_bit cpuid_bits[] =3D { { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 }, { X86_FEATURE_ABMC, CPUID_EBX, 5, 0x80000020, 0 }, + { X86_FEATURE_SDCIAE, CPUID_EBX, 6, 0x80000020, 0 }, { X86_FEATURE_TSA_SQ_NO, CPUID_ECX, 1, 0x80000021, 0 }, { X86_FEATURE_TSA_L1_NO, CPUID_ECX, 2, 0x80000021, 0 }, { X86_FEATURE_AMD_WORKLOAD_CLASS, CPUID_EAX, 22, 0x80000021, 0 }, --=20 2.34.1 From nobody Tue Dec 9 02:57:42 2025 Received: from CH1PR05CU001.outbound.protection.outlook.com (mail-northcentralusazon11010027.outbound.protection.outlook.com [52.101.193.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5EA6E2147FB; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 00:57:59.2961 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 305e99c9-2773-4b4a-18cf-08de224fb095 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD82.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4434 Content-Type: text/plain; charset="utf-8" Add a kernel command-line parameter to enable or disable the exposure of the L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE) hardware feature to resctrl. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- v12: No changes. v11: No changes. v10: Changelog update. Fixed the few conflicts due to recent ABMC feature merge. v9: Minor changelog update. Fixed the tabs in SMBA and BMEC lines. v8: Updated Documentation/filesystems/resctrl.rst. v7: No changes. v6: No changes. v5: No changes. v4: No changes. v3: No changes. v2: No changes. --- .../admin-guide/kernel-parameters.txt | 2 +- Documentation/filesystems/resctrl.rst | 23 ++++++++++--------- arch/x86/kernel/cpu/resctrl/core.c | 2 ++ 3 files changed, 15 insertions(+), 12 deletions(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index e63827475792..8c5636a120ee 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -6207,7 +6207,7 @@ rdt=3D [HW,X86,RDT] Turn on/off individual RDT features. List is: cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, - mba, smba, bmec, abmc. + mba, smba, bmec, abmc, sdciae. E.g. to turn on cmt and turn off mba use: rdt=3Dcmt,!mba =20 diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesyst= ems/resctrl.rst index b7f35b07876a..d7a51cae6b26 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -17,17 +17,18 @@ AMD refers to this feature as AMD Platform Quality of S= ervice(AMD QoS). This feature is enabled by the CONFIG_X86_CPU_RESCTRL and the x86 /proc/cp= uinfo flag bits: =20 -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D -RDT (Resource Director Technology) Allocation "rdt_a" -CAT (Cache Allocation Technology) "cat_l3", "cat_l2" -CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2" -CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc" -MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local" -MBA (Memory Bandwidth Allocation) "mba" -SMBA (Slow Memory Bandwidth Allocation) "" -BMEC (Bandwidth Monitoring Event Configuration) "" -ABMC (Assignable Bandwidth Monitoring Counters) "" -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +RDT (Resource Director Technology) Allocation "rdt_a" +CAT (Cache Allocation Technology) "cat_l3", "cat_l2" +CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2" +CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc" +MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local" +MBA (Memory Bandwidth Allocation) "mba" +SMBA (Slow Memory Bandwidth Allocation) "" +BMEC (Bandwidth Monitoring Event Configuration) "" +ABMC (Assignable Bandwidth Monitoring Counters) "" +SDCIAE (Smart Data Cache Injection Allocation Enforcement) "" +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 Historically, new features were made visible by default in /proc/cpuinfo. = This resulted in the feature flags becoming hard to parse by humans. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 00:58:06.9840 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c89ce5a1-a07d-49c8-24b5-08de224fb52a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD80.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4297 Content-Type: text/plain; charset="utf-8" AMD's SDCIAE (SDCI Allocation Enforcement) PQE feature enables system softw= are to control the portions of L3 cache used for direct insertion of data from = I/O devices into the L3 cache. Introduce a generic resctrl cache resource property "io_alloc_capable" as t= he first part of the new "io_alloc" resctrl feature that will support AMD's SDCIAE. Any architecture can set a cache resource as "io_alloc_capable" if a portion of the cache can be allocated for I/O traffic. Set the "io_alloc_capable" property for the L3 cache resource on x86 (AMD) systems that support SDCIAE. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- v12: No changes. v11: No changes. v10: Updated the changelog. v9: No changes. v8: Added Reviewed-by tag. v7: Few text updates in changelog and resctrl.h. v6: No changes. v5: No changes. v4: Updated the commit message and code comment based on feedback. v3: Rewrote commit log. Changed the text to bit generic than the AMD specif= ic. Renamed the rdt_get_sdciae_alloc_cfg() to rdt_set_io_alloc_capable(). Removed leftover comment from v2. v2: Changed sdciae_capable to io_alloc_capable to make it generic feature. Also moved the io_alloc_capable in struct resctrl_cache. --- arch/x86/kernel/cpu/resctrl/core.c | 7 +++++++ include/linux/resctrl.h | 3 +++ 2 files changed, 10 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 2b2935b3df8d..3792ab4819dc 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -274,6 +274,11 @@ static void rdt_get_cdp_config(int level) rdt_resources_all[level].r_resctrl.cdp_capable =3D true; } =20 +static void rdt_set_io_alloc_capable(struct rdt_resource *r) +{ + r->cache.io_alloc_capable =3D true; +} + static void rdt_get_cdp_l3_config(void) { rdt_get_cdp_config(RDT_RESOURCE_L3); @@ -855,6 +860,8 @@ static __init bool get_rdt_alloc_resources(void) rdt_get_cache_alloc_cfg(1, r); if (rdt_cpu_has(X86_FEATURE_CDP_L3)) rdt_get_cdp_l3_config(); + if (rdt_cpu_has(X86_FEATURE_SDCIAE)) + rdt_set_io_alloc_capable(r); ret =3D true; } if (rdt_cpu_has(X86_FEATURE_CAT_L2)) { diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index a7d92718b653..533f240dbe21 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -206,6 +206,8 @@ struct rdt_mon_domain { * @arch_has_sparse_bitmasks: True if a bitmask like f00f is valid. * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache * level has CPU scope. + * @io_alloc_capable: True if portion of the cache can be configured + * for I/O traffic. */ struct resctrl_cache { unsigned int cbm_len; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 00:58:21.0125 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 96837e28-bea5-447a-c367-08de224fbd86 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD83.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6281 Content-Type: text/plain; charset="utf-8" "io_alloc" is the generic name of the new resctrl feature that enables system software to configure the portion of cache allocated for I/O traffic. On AMD systems, "io_alloc" resctrl feature is backed by AMD's L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE). Introduce the architecture-specific functions that resctrl fs should call to enable, disable, or check status of the "io_alloc" feature. Change SDCIAE state by setting (to enable) or clearing (to disable) bit 1 of MSR_IA32_L3_QOS_EXT_CFG on all logical processors within the cache domain. The SDCIAE feature details are documented in APM [1] available from [2]. [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming Publication # 24593 Revision 3.41 section 19.4.7 L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE). Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D206537 # [2] --- v12: No changes. v11: Added Reviewed-by: tag. v10: Changelog update. Code comment update to match MSR names. Removed the Reviewed-by tag as there are more than one change. v9: Minor changelog update. Added Reviewed-by: tag. v8: Moved resctrl_arch_io_alloc_enable() and its dependancies to arch/x86/kernel/cpu/resctrl/ctrlmondata.c file. v7: Removed the inline for resctrl_arch_get_io_alloc_enabled(). Update code comment in resctrl.h. Changed the subject to x86,fs/resctrl. v6: Added lockdep_assert_cpus_held() in _resctrl_sdciae_enable() to protect r->ctrl_domains. Added more comments in include/linux/resctrl.h. v5: Resolved conflicts due to recent resctrl FS/ARCH code restructure. The files monitor.c/rdtgroup.c have been split between FS and ARCH dire= ctories. Moved prototypes of resctrl_arch_io_alloc_enable() and resctrl_arch_get_io_alloc_enabled() to include/linux/resctrl.h. v4: Updated the commit log to address the feedback. v3: Passed the struct rdt_resource to resctrl_arch_get_io_alloc_enabled() i= nstead of resource id. Renamed the _resctrl_io_alloc_enable() to _resctrl_sdciae_enable() as i= t is arch specific. Changed the return to void in _resctrl_sdciae_enable() instead of int. Added more context in commit log and fixed few typos. v2: Renamed the functions to simplify the code. Renamed sdciae_capable to io_alloc_capable. Changed the name of few arch functions similar to ABMC series. resctrl_arch_get_io_alloc_enabled() resctrl_arch_io_alloc_enable() --- arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 40 +++++++++++++++++++++++ arch/x86/kernel/cpu/resctrl/internal.h | 5 +++ include/linux/resctrl.h | 21 ++++++++++++ 3 files changed, 66 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cp= u/resctrl/ctrlmondata.c index 1189c0df4ad7..b20e705606b8 100644 --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c @@ -91,3 +91,43 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, stru= ct rdt_ctrl_domain *d, =20 return hw_dom->ctrl_val[idx]; } + +bool resctrl_arch_get_io_alloc_enabled(struct rdt_resource *r) +{ + return resctrl_to_arch_res(r)->sdciae_enabled; +} + +static void resctrl_sdciae_set_one_amd(void *arg) +{ + bool *enable =3D arg; + + if (*enable) + msr_set_bit(MSR_IA32_L3_QOS_EXT_CFG, SDCIAE_ENABLE_BIT); + else + msr_clear_bit(MSR_IA32_L3_QOS_EXT_CFG, SDCIAE_ENABLE_BIT); +} + +static void _resctrl_sdciae_enable(struct rdt_resource *r, bool enable) +{ + struct rdt_ctrl_domain *d; + + /* Walking r->ctrl_domains, ensure it can't race with cpuhp */ + lockdep_assert_cpus_held(); + + /* Update MSR_IA32_L3_QOS_EXT_CFG MSR on all the CPUs in all domains */ + list_for_each_entry(d, &r->ctrl_domains, hdr.list) + on_each_cpu_mask(&d->hdr.cpu_mask, resctrl_sdciae_set_one_amd, &enable, = 1); +} + +int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable) +{ + struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); + + if (hw_res->r_resctrl.cache.io_alloc_capable && + hw_res->sdciae_enabled !=3D enable) { + _resctrl_sdciae_enable(r, enable); + hw_res->sdciae_enabled =3D enable; + } + + return 0; +} diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index 9f4c2f0aaf5c..4a916c84a322 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -46,6 +46,9 @@ struct arch_mbm_state { #define ABMC_EXTENDED_EVT_ID BIT(31) #define ABMC_EVT_ID BIT(0) =20 +/* Setting bit 1 in MSR_IA32_L3_QOS_EXT_CFG enables the SDCIAE feature. */ +#define SDCIAE_ENABLE_BIT 1 + /** * struct rdt_hw_ctrl_domain - Arch private attributes of a set of CPUs th= at share * a resource for a control function @@ -112,6 +115,7 @@ struct msr_param { * @mbm_width: Monitor width, to detect and correct for overflow. * @cdp_enabled: CDP state of this resource * @mbm_cntr_assign_enabled: ABMC feature is enabled + * @sdciae_enabled: SDCIAE feature (backing "io_alloc") is enabled. * * Members of this structure are either private to the architecture * e.g. mbm_width, or accessed via helpers that provide abstraction. e.g. @@ -126,6 +130,7 @@ struct rdt_hw_resource { unsigned int mbm_width; bool cdp_enabled; bool mbm_cntr_assign_enabled; + bool sdciae_enabled; }; =20 static inline struct rdt_hw_resource *resctrl_to_arch_res(struct rdt_resou= rce *r) diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 533f240dbe21..54701668b3df 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -657,6 +657,27 @@ void resctrl_arch_reset_cntr(struct rdt_resource *r, s= truct rdt_mon_domain *d, u32 closid, u32 rmid, int cntr_id, enum resctrl_event_id eventid); =20 +/** + * resctrl_arch_io_alloc_enable() - Enable/disable io_alloc feature. + * @r: The resctrl resource. + * @enable: Enable (true) or disable (false) io_alloc on resource @r. + * + * This can be called from any CPU. + * + * Return: + * 0 on success, <0 on error. + */ +int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable); + +/** + * resctrl_arch_get_io_alloc_enabled() - Get io_alloc feature state. + * @r: The resctrl resource. + * + * Return: + * true if io_alloc is enabled or false if disabled. + */ +bool resctrl_arch_get_io_alloc_enabled(struct rdt_resource *r); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 00:58:32.8240 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 59d84e65-0658-4eca-e502-08de224fc490 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7820 Content-Type: text/plain; charset="utf-8" Introduce the "io_alloc" resctrl file to the "info" area of a cache resource, for example /sys/fs/resctrl/info/L3/io_alloc. "io_alloc" indicates support for the "io_alloc" feature that allows direct insertion of data from I/O devices into the cache. Restrict exposing support for "io_alloc" to the L3 resource that is the only resource where this feature can be backed by AMD's L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE). With that, the "io_alloc" file is only visible to user space if the L3 resource supports "io_alloc". Doing so makes the file visible for all cache resources though, for example also L2 cache (if it supports cache allocation). As a consequence, add capability for file to report expected "enabled" and "disabled", as well as "not supported". Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- v12:No changes. v11:Added Reviewed-by: tag. v10:Changelog update. Removed the h/w specific details from this patch and will add to the ne= xt patch. v9: Minor user doc(resctrl.rst) update. v8: Updated Documentation/filesystems/resctrl.rst. Moved resctrl_io_alloc_show() to fs/resctrl/ctrlmondata.c. Added prototype for rdt_kn_parent_priv() in fs/resctrl/internal.h so, it can be uses in other fs/resctrl/ files. Added comment for io_alloc_init(). v7: Updated the changelog. Updated user doc for io_alloc in resctrl.rst. Added mutex rdtgroup_mutex in resctrl_io_alloc_show(); v6: Added "io_alloc_cbm" details in user doc resctrl.rst. Resource name is not printed in CBM now. Corrected the texts about it in resctrl.rst. v5: Resolved conflicts due to recent resctrl FS/ARCH code restructure. Updated show_doms() to print the resource if only it is valid. Pass NUL= L while printing io_alloc CBM. Changed the code to access the CBMs via either L3CODE or L3DATA resourc= es. v4: Updated the change log. Added rdtgroup_mutex before rdt_last_cmd_puts(). Returned -ENODEV when resource type is CDP_DATA. Kept the resource name while printing the CBM (L3:0=3Dfff) that way I dont have to change show_doms() just for this feature and it is consistant across all the schemata display. v3: Minor changes due to changes in resctrl_arch_get_io_alloc_enabled() and resctrl_io_alloc_closid_get(). Added the check to verify CDP resource type. Updated the commit log. v2: Fixed to display only on L3 resources. Added the locks while processing. Rename the displat to io_alloc_cbm (from sdciae_cmd). --- Documentation/filesystems/resctrl.rst | 15 +++++++++++++++ fs/resctrl/ctrlmondata.c | 21 +++++++++++++++++++++ fs/resctrl/internal.h | 1 + fs/resctrl/rdtgroup.c | 22 ++++++++++++++++++++++ 4 files changed, 59 insertions(+) diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesyst= ems/resctrl.rst index d7a51cae6b26..108995640ca5 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -137,6 +137,21 @@ related to allocation: "1": Non-contiguous 1s value in CBM is supported. =20 +"io_alloc": + "io_alloc" enables system software to configure the portion of + the cache allocated for I/O traffic. File may only exist if the + system supports this feature on some of its cache resources. + + "disabled": + Resource supports "io_alloc" but the feature is disabled. + Portions of cache used for allocation of I/O traffic cannot + be configured. + "enabled": + Portions of cache used for allocation of I/O traffic + can be configured using "io_alloc_cbm". + "not supported": + Support not available for this resource. + Memory bandwidth(MB) subdirectory contains the following files with respect to allocation: =20 diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index 0d0ef54fc4de..78a8e7b4ba24 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -676,3 +676,24 @@ int rdtgroup_mondata_show(struct seq_file *m, void *ar= g) rdtgroup_kn_unlock(of->kn); return ret; } + +int resctrl_io_alloc_show(struct kernfs_open_file *of, struct seq_file *se= q, void *v) +{ + struct resctrl_schema *s =3D rdt_kn_parent_priv(of->kn); + struct rdt_resource *r =3D s->res; + + mutex_lock(&rdtgroup_mutex); + + if (r->cache.io_alloc_capable) { + if (resctrl_arch_get_io_alloc_enabled(r)) + seq_puts(seq, "enabled\n"); + else + seq_puts(seq, "disabled\n"); + } else { + seq_puts(seq, "not supported\n"); + } + + mutex_unlock(&rdtgroup_mutex); + + return 0; +} diff --git a/fs/resctrl/internal.h b/fs/resctrl/internal.h index cf1fd82dc5a9..a18ed8889396 100644 --- a/fs/resctrl/internal.h +++ b/fs/resctrl/internal.h @@ -426,6 +426,7 @@ int mbm_L3_assignments_show(struct kernfs_open_file *of= , struct seq_file *s, voi =20 ssize_t mbm_L3_assignments_write(struct kernfs_open_file *of, char *buf, s= ize_t nbytes, loff_t off); +int resctrl_io_alloc_show(struct kernfs_open_file *of, struct seq_file *se= q, void *v); =20 #ifdef CONFIG_RESCTRL_FS_PSEUDO_LOCK int rdtgroup_locksetup_enter(struct rdtgroup *rdtgrp); diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 0320360cd7a6..6d89160ebd11 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -1947,6 +1947,12 @@ static struct rftype res_common_files[] =3D { .kf_ops =3D &rdtgroup_kf_single_ops, .seq_show =3D rdt_thread_throttle_mode_show, }, + { + .name =3D "io_alloc", + .mode =3D 0444, + .kf_ops =3D &rdtgroup_kf_single_ops, + .seq_show =3D resctrl_io_alloc_show, + }, { .name =3D "max_threshold_occupancy", .mode =3D 0644, @@ -2138,6 +2144,20 @@ static void thread_throttle_mode_init(void) RFTYPE_CTRL_INFO | RFTYPE_RES_MB); } =20 +/* + * The resctrl file "io_alloc" is added using L3 resource. However, it res= ults + * in this file being visible for *all* cache resources (eg. L2 cache), + * whether it supports "io_alloc" or not. + */ +static void io_alloc_init(void) +{ + struct rdt_resource *r =3D resctrl_arch_get_resource(RDT_RESOURCE_L3); + + if (r->cache.io_alloc_capable) + resctrl_file_fflags_init("io_alloc", RFTYPE_CTRL_INFO | + RFTYPE_RES_CACHE); +} + void resctrl_file_fflags_init(const char *config, unsigned long fflags) { struct rftype *rft; @@ -4408,6 +4428,8 @@ int resctrl_init(void) =20 thread_throttle_mode_init(); =20 + io_alloc_init(); + ret =3D resctrl_mon_resource_init(); if (ret) return ret; --=20 2.34.1 From nobody Tue Dec 9 02:57:42 2025 Received: from BL2PR02CU003.outbound.protection.outlook.com (mail-eastusazon11011025.outbound.protection.outlook.com [52.101.52.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 316D5221F39; Thu, 13 Nov 2025 00:58:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.52.25 ARC-Seal: i=2; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 00:58:40.6454 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4574eee5-fd1d-43c9-7a1f-08de224fc93a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7D.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB9523 Content-Type: text/plain; charset="utf-8" AMD's SDCIAE forces all SDCI lines to be placed into the L3 cache portions identified by the highest-supported L3_MASK_n register, where n is the maximum supported CLOSID. To support AMD's SDCIAE, when io_alloc resctrl feature is enabled, reserve the highest CLOSID exclusively for I/O allocation traffic making it no longer available for general CPU cache allocation. Introduce user interface to enable/disable io_alloc feature and encourage users to enable io_alloc only when running workloads that can benefit from this functionality. On enable, initialize the io_alloc CLOSID with all usable CBMs across all the domains. Since CLOSIDs are managed by resctrl fs, it is least invasive to make "io_alloc is supported by maximum supported CLOSID" part of the initial resctrl fs support for io_alloc. Take care to minimally (only in error messages) expose this use of CLOSID for io_alloc to user space so that this is not required from other architectures that may support io_alloc differently in the future. When resctrl is mounted with "-o cdp" to enable code/data prioritization, there are two L3 resources that can support I/O allocation: L3CODE and L3DATA. From resctrl fs perspective the two resources share a CLOSID and the architecture's available CLOSID are halved to support this. The architecture's underlying CLOSID used by SDCIAE when CDP is enabled is the CLOSID associated with the CDP_CODE resource, but from resctrl's perspective there is only one CLOSID for both CDP_CODE and CDP_DATA. CDP_DATA is thus not usable for general (CPU) cache allocation nor I/O allocation. Keep the CDP_CODE and CDP_DATA I/O alloc status in sync to avoid any confusion to user space. That is, enabling io_alloc on CDP_CODE does so on CDP_DATA and vice-versa, and keep the I/O allocation CBMs of CDP_CODE and CDP_DATA in sync. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- v12: Minor format fix in resctrl.rst. Added text about writable files in the info section. Removed Reviewed-by tag from Reinette as there are some new text chang= es from Dave. v11: Fixed typo CDP_3DATA -> CDP_DATA. Added code to free the CLOSID on resctrl_arch_io_alloc_enable() failur= e. Fixed the prototype of rdtgroup_name_by_closid(). v10: Rephrase of the whole changelog to avoid repetion. Thanks to Reinette. Minor print format changes. Moved the hardware specific detail to resctrl.rst. Changed the text L3CODE to CDP_CODE and L3DATA to CDP_DATA v9: Updated the changelog. Moved resctrl_arch_get_io_alloc_enabled() check earlier in the Removed resctrl_get_schema(). Copied staged_config from peer when CDP is enabled. v8: Updated the changelog. Renamed resctrl_io_alloc_init_cat() to resctrl_io_alloc_init_cbm(). Moved resctrl_io_alloc_write() and all its dependancies to fs/resctrl/c= trlmondata.c. Added prototypes for all the functions in fs/resctrl/internal.h. v7: Separated resctrl_io_alloc_show and bit_usage changes in two separate patches. Added resctrl_io_alloc_closid_supported() to verify io_alloc CLOSID. Initialized the schema for both CDP_DATA and CDP_CODE when CDP is enabl= ed. v6: Changed the subject to fs/resctrl: v5: Resolved conflicts due to recent resctrl FS/ARCH code restructure. Used rdt_kn_name to get the rdtgroup name instead of accesssing it dire= ctly while printing group name used by the io_alloc_closid. Updated bit_usage to reflect the io_alloc CBM as discussed in the threa= d: https://lore.kernel.org/lkml/3ca0a5dc-ad9c-4767-9011-b79d986e1e8d@intel= .com/ Modified rdt_bit_usage_show() to read io_alloc_cbm in hw_shareable, ens= uring that bit_usage accurately represents the CBMs. Updated the code to modify io_alloc either with L3CODE or L3DATA. https://lore.kernel.org/lkml/c00c00ea-a9ac-4c56-961c-dc5bf633476b@intel= .com/ v4: Updated the change log. Updated the user doc. The "io_alloc" interface will report "enabled/disabled/not supported". Updated resctrl_io_alloc_closid_get() to verify the max closid availabi= lity. Updated the documentation for "shareable_bits" and "bit_usage". Introduced io_alloc_init() to initialize fflags. Printed the group name when io_alloc enablement fails. NOTE: io_alloc is about specific CLOS. rdt_bit_usage_show() is not desi= gned handle bit_usage for specific CLOS. Its about overall system. So, we ca= nnot really tell the user which CLOS is shared across both hardware and soft= ware. We need to discuss this. v3: Rewrote the change to make it generic. Rewrote the documentation in resctrl.rst to be generic and added AMD feature details in the end. Added the check to verify if MAX CLOSID availability on the system. Added CDP check to make sure io_alloc is configured in CDP_CODE. Added resctrl_io_alloc_closid_free() to free the io_alloc CLOSID. Added errors in few cases when CLOSID allocation fails. Fixes splat reported when info/L3/bit_usage is accesed when io_alloc is enabled. https://lore.kernel.org/lkml/SJ1PR11MB60837B532254E7B23BC27E84FC052@SJ1= PR11MB6083.namprd11.prod.outlook.com/ v2: Renamed the feature to "io_alloc". Added generic texts for the feature in commit log and resctrl.rst doc. Added resctrl_io_alloc_init_cat() to initialize io_alloc to default values when enabled. Fixed io_alloc show functinality to display only on L3 resource. --- Documentation/filesystems/resctrl.rst | 30 ++++++ fs/resctrl/ctrlmondata.c | 126 ++++++++++++++++++++++++++ fs/resctrl/internal.h | 11 +++ fs/resctrl/rdtgroup.c | 24 ++++- 4 files changed, 188 insertions(+), 3 deletions(-) diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesyst= ems/resctrl.rst index 108995640ca5..91c71e254bbd 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -73,6 +73,11 @@ The 'info' directory contains information about the enab= led resources. Each resource has its own subdirectory. The subdirectory names reflect the resource names. =20 +Most of the files in the resource's subdirectory are read-only, and +describe properties of the resource. Resources that support global +configuration options also include writable files that can be used +to modify those settings. + Each subdirectory contains the following files with respect to allocation: =20 @@ -152,6 +157,31 @@ related to allocation: "not supported": Support not available for this resource. =20 + The feature can be modified by writing to the interface, for example: + + To enable:: + + # echo 1 > /sys/fs/resctrl/info/L3/io_alloc + + To disable:: + + # echo 0 > /sys/fs/resctrl/info/L3/io_alloc + + The underlying implementation may reduce resources available to + general (CPU) cache allocation. See architecture specific notes + below. Depending on usage requirements the feature can be enabled + or disabled. + + On AMD systems, io_alloc feature is supported by the L3 Smart + Data Cache Injection Allocation Enforcement (SDCIAE). The CLOSID for + io_alloc is the highest CLOSID supported by the resource. When + io_alloc is enabled, the highest CLOSID is dedicated to io_alloc and + no longer available for general (CPU) cache allocation. When CDP is + enabled, io_alloc routes I/O traffic using the highest CLOSID allocated + for the instruction cache (CDP_CODE), making this CLOSID no longer + available for general (CPU) cache allocation for both the CDP_CODE + and CDP_DATA resources. + Memory bandwidth(MB) subdirectory contains the following files with respect to allocation: =20 diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index 78a8e7b4ba24..454fdf3b9f3c 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -697,3 +697,129 @@ int resctrl_io_alloc_show(struct kernfs_open_file *of= , struct seq_file *seq, voi =20 return 0; } + +/* + * resctrl_io_alloc_closid_supported() - io_alloc feature utilizes the + * highest CLOSID value to direct I/O traffic. Ensure that io_alloc_closid + * is in the supported range. + */ +static bool resctrl_io_alloc_closid_supported(u32 io_alloc_closid) +{ + return io_alloc_closid < closids_supported(); +} + +/* + * Initialize io_alloc CLOSID cache resource CBM with all usable (shared + * and unused) cache portions. + */ +static int resctrl_io_alloc_init_cbm(struct resctrl_schema *s, u32 closid) +{ + enum resctrl_conf_type peer_type; + struct rdt_resource *r =3D s->res; + struct rdt_ctrl_domain *d; + int ret; + + rdt_staged_configs_clear(); + + ret =3D rdtgroup_init_cat(s, closid); + if (ret < 0) + goto out; + + /* Keep CDP_CODE and CDP_DATA of io_alloc CLOSID's CBM in sync. */ + if (resctrl_arch_get_cdp_enabled(r->rid)) { + peer_type =3D resctrl_peer_type(s->conf_type); + list_for_each_entry(d, &s->res->ctrl_domains, hdr.list) + memcpy(&d->staged_config[peer_type], + &d->staged_config[s->conf_type], + sizeof(d->staged_config[0])); + } + + ret =3D resctrl_arch_update_domains(r, closid); +out: + rdt_staged_configs_clear(); + return ret; +} + +/* + * resctrl_io_alloc_closid() - io_alloc feature routes I/O traffic using + * the highest available CLOSID. Retrieve the maximum CLOSID supported by = the + * resource. Note that if Code Data Prioritization (CDP) is enabled, the n= umber + * of available CLOSIDs is reduced by half. + */ +static u32 resctrl_io_alloc_closid(struct rdt_resource *r) +{ + if (resctrl_arch_get_cdp_enabled(r->rid)) + return resctrl_arch_get_num_closid(r) / 2 - 1; + else + return resctrl_arch_get_num_closid(r) - 1; +} + +ssize_t resctrl_io_alloc_write(struct kernfs_open_file *of, char *buf, + size_t nbytes, loff_t off) +{ + struct resctrl_schema *s =3D rdt_kn_parent_priv(of->kn); + struct rdt_resource *r =3D s->res; + char const *grp_name; + u32 io_alloc_closid; + bool enable; + int ret; + + ret =3D kstrtobool(buf, &enable); + if (ret) + return ret; + + cpus_read_lock(); + mutex_lock(&rdtgroup_mutex); + + rdt_last_cmd_clear(); + + if (!r->cache.io_alloc_capable) { + rdt_last_cmd_printf("io_alloc is not supported on %s\n", s->name); + ret =3D -ENODEV; + goto out_unlock; + } + + /* If the feature is already up to date, no action is needed. */ + if (resctrl_arch_get_io_alloc_enabled(r) =3D=3D enable) + goto out_unlock; + + io_alloc_closid =3D resctrl_io_alloc_closid(r); + if (!resctrl_io_alloc_closid_supported(io_alloc_closid)) { + rdt_last_cmd_printf("io_alloc CLOSID (ctrl_hw_id) %u is not available\n", + io_alloc_closid); + ret =3D -EINVAL; + goto out_unlock; + } + + if (enable) { + if (!closid_alloc_fixed(io_alloc_closid)) { + grp_name =3D rdtgroup_name_by_closid(io_alloc_closid); + WARN_ON_ONCE(!grp_name); + rdt_last_cmd_printf("CLOSID (ctrl_hw_id) %u for io_alloc is used by %s = group\n", + io_alloc_closid, grp_name ? grp_name : "another"); + ret =3D -ENOSPC; + goto out_unlock; + } + + ret =3D resctrl_io_alloc_init_cbm(s, io_alloc_closid); + if (ret) { + rdt_last_cmd_puts("Failed to initialize io_alloc allocations\n"); + closid_free(io_alloc_closid); + goto out_unlock; + } + } else { + closid_free(io_alloc_closid); + } + + ret =3D resctrl_arch_io_alloc_enable(r, enable); + if (enable && ret) { + rdt_last_cmd_puts("Failed to enable io_alloc feature\n"); + closid_free(io_alloc_closid); + } + +out_unlock: + mutex_unlock(&rdtgroup_mutex); + cpus_read_unlock(); + + return ret ?: nbytes; +} diff --git a/fs/resctrl/internal.h b/fs/resctrl/internal.h index a18ed8889396..145e22f9a350 100644 --- a/fs/resctrl/internal.h +++ b/fs/resctrl/internal.h @@ -390,6 +390,8 @@ void rdt_staged_configs_clear(void); =20 bool closid_allocated(unsigned int closid); =20 +bool closid_alloc_fixed(u32 closid); + int resctrl_find_cleanest_closid(void); =20 void *rdt_kn_parent_priv(struct kernfs_node *kn); @@ -428,6 +430,15 @@ ssize_t mbm_L3_assignments_write(struct kernfs_open_fi= le *of, char *buf, size_t loff_t off); int resctrl_io_alloc_show(struct kernfs_open_file *of, struct seq_file *se= q, void *v); =20 +int rdtgroup_init_cat(struct resctrl_schema *s, u32 closid); + +enum resctrl_conf_type resctrl_peer_type(enum resctrl_conf_type my_type); + +ssize_t resctrl_io_alloc_write(struct kernfs_open_file *of, char *buf, + size_t nbytes, loff_t off); + +const char *rdtgroup_name_by_closid(u32 closid); + #ifdef CONFIG_RESCTRL_FS_PSEUDO_LOCK int rdtgroup_locksetup_enter(struct rdtgroup *rdtgrp); =20 diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 6d89160ebd11..95d47b4b6505 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -226,6 +226,11 @@ bool closid_allocated(unsigned int closid) return !test_bit(closid, closid_free_map); } =20 +bool closid_alloc_fixed(u32 closid) +{ + return __test_and_clear_bit(closid, closid_free_map); +} + /** * rdtgroup_mode_by_closid - Return mode of resource group with closid * @closid: closid if the resource group @@ -1247,7 +1252,7 @@ static int rdtgroup_mode_show(struct kernfs_open_file= *of, return 0; } =20 -static enum resctrl_conf_type resctrl_peer_type(enum resctrl_conf_type my_= type) +enum resctrl_conf_type resctrl_peer_type(enum resctrl_conf_type my_type) { switch (my_type) { case CDP_CODE: @@ -1838,6 +1843,18 @@ void resctrl_bmec_files_show(struct rdt_resource *r,= struct kernfs_node *l3_mon_ kernfs_put(mon_kn); } =20 +const char *rdtgroup_name_by_closid(u32 closid) +{ + struct rdtgroup *rdtgrp; + + list_for_each_entry(rdtgrp, &rdt_all_groups, rdtgroup_list) { + if (rdtgrp->closid =3D=3D closid) + return rdt_kn_name(rdtgrp->kn); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 00:58:48.3947 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a9535086-8d84-4048-cc53-08de224fcdd8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5964 Content-Type: text/plain; charset="utf-8" Introduce the "io_alloc_cbm" resctrl file to display the capacity bitmasks (CBMs) that represent the portions of each cache instance allocated for I/O traffic on a cache resource that supports the "io_alloc" feature. io_alloc_cbm resides in the info directory of a cache resource, for example, /sys/fs/resctrl/info/L3/. Since the resource name is part of the path, it is not necessary to display the resource name as done in the schemata file. When CDP is enabled, io_alloc routes traffic using the highest CLOSID associated with the CDP_CODE resource and that CLOSID becomes unusable for the CDP_DATA resource. The highest CLOSID of CDP_CODE and CDP_DATA resources will be kept in sync to ensure consistent user interface. In preparation for this, access the CBMs for I/O traffic through highest CLOSID of either CDP_CODE or CDP_DATA resource. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- v12: No changes. v11: Fixed the minor conflict due to previous patch. Added Reviewed-by: tag. v10: Rephrase of changelog. Minor code comment change. v9: Updated the changelog with respect to CDP. Added code comment in resctrl_io_alloc_cbm_show(). v8: Updated the changelog. Moved resctrl_io_alloc_cbm_show() to fs/resctrl/ctrlmondata.c. show_doms is remains static with this change. v7: Updated changelog. Updated use doc (resctrl.rst). Removed if (io_alloc_closid < 0) check. Not required anymore. v6: Added "io_alloc_cbm" details in user doc resctrl.rst. Resource name is not printed in CBM now. Corrected the texts about it in resctrl.rst. v5: Resolved conflicts due to recent resctrl FS/ARCH code restructure. Updated show_doms() to print the resource if only it is valid. Pass NUL= L while printing io_alloc CBM. Changed the code to access the CBMs via either L3CODE or L3DATA resourc= es. v4: Updated the change log. Added rdtgroup_mutex before rdt_last_cmd_puts(). Returned -ENODEV when resource type is CDP_DATA. Kept the resource name while printing the CBM (L3:0=3Dfff) that way I dont have to change show_doms() just for this feature and it is consistant across all the schemata display. v3: Minor changes due to changes in resctrl_arch_get_io_alloc_enabled() and resctrl_io_alloc_closid_get(). Added the check to verify CDP resource type. Updated the commit log. v2: Fixed to display only on L3 resources. Added the locks while processing. Rename the displat to io_alloc_cbm (from sdciae_cmd). --- Documentation/filesystems/resctrl.rst | 19 +++++++++++ fs/resctrl/ctrlmondata.c | 45 +++++++++++++++++++++++++-- fs/resctrl/internal.h | 2 ++ fs/resctrl/rdtgroup.c | 11 ++++++- 4 files changed, 73 insertions(+), 4 deletions(-) diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesyst= ems/resctrl.rst index 91c71e254bbd..e7994538e0ce 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -182,6 +182,25 @@ related to allocation: available for general (CPU) cache allocation for both the CDP_CODE and CDP_DATA resources. =20 +"io_alloc_cbm": + Capacity bitmasks that describe the portions of cache instances to + which I/O traffic from supported I/O devices are routed when "io_alloc" + is enabled. + + CBMs are displayed in the following format: + + =3D;=3D;... + + Example:: + + # cat /sys/fs/resctrl/info/L3/io_alloc_cbm + 0=3Dffff;1=3Dffff + + When CDP is enabled "io_alloc_cbm" associated with the CDP_DATA and CDP_= CODE + resources may reflect the same values. For example, values read from and + written to /sys/fs/resctrl/info/L3DATA/io_alloc_cbm may be reflected by + /sys/fs/resctrl/info/L3CODE/io_alloc_cbm and vice versa. + Memory bandwidth(MB) subdirectory contains the following files with respect to allocation: =20 diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index 454fdf3b9f3c..1ac89b107e6f 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -381,7 +381,8 @@ ssize_t rdtgroup_schemata_write(struct kernfs_open_file= *of, return ret ?: nbytes; } =20 -static void show_doms(struct seq_file *s, struct resctrl_schema *schema, i= nt closid) +static void show_doms(struct seq_file *s, struct resctrl_schema *schema, + char *resource_name, int closid) { struct rdt_resource *r =3D schema->res; struct rdt_ctrl_domain *dom; @@ -391,7 +392,8 @@ static void show_doms(struct seq_file *s, struct resctr= l_schema *schema, int clo /* Walking r->domains, ensure it can't race with cpuhp */ lockdep_assert_cpus_held(); =20 - seq_printf(s, "%*s:", max_name_width, schema->name); + if (resource_name) + seq_printf(s, "%*s:", max_name_width, resource_name); list_for_each_entry(dom, &r->ctrl_domains, hdr.list) { if (sep) seq_puts(s, ";"); @@ -437,7 +439,7 @@ int rdtgroup_schemata_show(struct kernfs_open_file *of, closid =3D rdtgrp->closid; list_for_each_entry(schema, &resctrl_schema_all, list) { if (closid < schema->num_closid) - show_doms(s, schema, closid); + show_doms(s, schema, schema->name, closid); } } } else { @@ -823,3 +825,40 @@ ssize_t resctrl_io_alloc_write(struct kernfs_open_file= *of, char *buf, =20 return ret ?: nbytes; } + +int resctrl_io_alloc_cbm_show(struct kernfs_open_file *of, struct seq_file= *seq, void *v) +{ + struct resctrl_schema *s =3D rdt_kn_parent_priv(of->kn); + struct rdt_resource *r =3D s->res; + int ret =3D 0; + + cpus_read_lock(); + mutex_lock(&rdtgroup_mutex); + + rdt_last_cmd_clear(); + + if (!r->cache.io_alloc_capable) { + rdt_last_cmd_printf("io_alloc is not supported on %s\n", s->name); + ret =3D -ENODEV; + goto out_unlock; + } + + if (!resctrl_arch_get_io_alloc_enabled(r)) { + rdt_last_cmd_printf("io_alloc is not enabled on %s\n", s->name); + ret =3D -EINVAL; + goto out_unlock; + } + + /* + * When CDP is enabled, the CBMs of the highest CLOSID of CDP_CODE and + * CDP_DATA are kept in sync. As a result, the io_alloc CBMs shown for + * either CDP resource are identical and accurately represent the CBMs + * used for I/O. + */ + show_doms(seq, s, NULL, resctrl_io_alloc_closid(r)); + +out_unlock: + mutex_unlock(&rdtgroup_mutex); + cpus_read_unlock(); + return ret; +} diff --git a/fs/resctrl/internal.h b/fs/resctrl/internal.h index 145e22f9a350..779a575e0828 100644 --- a/fs/resctrl/internal.h +++ b/fs/resctrl/internal.h @@ -438,6 +438,8 @@ ssize_t resctrl_io_alloc_write(struct kernfs_open_file = *of, char *buf, size_t nbytes, loff_t off); =20 const char *rdtgroup_name_by_closid(u32 closid); +int resctrl_io_alloc_cbm_show(struct kernfs_open_file *of, struct seq_file= *seq, + void *v); =20 #ifdef CONFIG_RESCTRL_FS_PSEUDO_LOCK int rdtgroup_locksetup_enter(struct rdtgroup *rdtgrp); diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 95d47b4b6505..44d419e4e63c 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -1971,6 +1971,12 @@ static struct rftype res_common_files[] =3D { .seq_show =3D resctrl_io_alloc_show, .write =3D resctrl_io_alloc_write, }, + { + .name =3D "io_alloc_cbm", + .mode =3D 0444, + .kf_ops =3D &rdtgroup_kf_single_ops, + .seq_show =3D resctrl_io_alloc_cbm_show, + }, { .name =3D "max_threshold_occupancy", .mode =3D 0644, @@ -2171,9 +2177,12 @@ static void io_alloc_init(void) { struct rdt_resource *r =3D resctrl_arch_get_resource(RDT_RESOURCE_L3); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 00:58:56.1488 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 545eaefe-e079-4bf3-efac-08de224fd277 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD81.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8449 Content-Type: text/plain; charset="utf-8" parse_cbm() require resource group mode and CLOSID to validate the capacity bitmask (CBM). It is passed via struct rdtgroup in struct rdt_parse_data. The io_alloc feature also uses CBMs to indicate which portions of cache are allocated for I/O traffic. The CBMs are provided by user space and need to be validated the same as CBMs provided for general (CPU) cache allocation. parse_cbm() cannot be used as-is since io_alloc does not have rdtgroup context. Pass the resource group mode and CLOSID directly to parse_cbm() via struct rdt_parse_data, instead of through the rdtgroup struct, to facilitate calling parse_cbm() to verify the CBM of the io_alloc feature. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- v12: No changes. v11: No changes. v10: Subject line change. Added Reviewed-by tag. v9: Rephrase of changelog. Minor code syntax update. v8: Rephrase of changelog. v7: Rephrase of changelog. v6: Changed the subject line to fs/resctrl. v5: Resolved conflicts due to recent resctrl FS/ARCH code restructure. v4: New patch to call parse_cbm() directly to avoid code duplication. --- fs/resctrl/ctrlmondata.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index 1ac89b107e6f..c43bedea70d7 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -24,7 +24,8 @@ #include "internal.h" =20 struct rdt_parse_data { - struct rdtgroup *rdtgrp; + u32 closid; + enum rdtgrp_mode mode; char *buf; }; =20 @@ -77,8 +78,8 @@ static int parse_bw(struct rdt_parse_data *data, struct r= esctrl_schema *s, struct rdt_ctrl_domain *d) { struct resctrl_staged_config *cfg; - u32 closid =3D data->rdtgrp->closid; struct rdt_resource *r =3D s->res; + u32 closid =3D data->closid; u32 bw_val; =20 cfg =3D &d->staged_config[s->conf_type]; @@ -156,9 +157,10 @@ static bool cbm_validate(char *buf, u32 *data, struct = rdt_resource *r) static int parse_cbm(struct rdt_parse_data *data, struct resctrl_schema *s, struct rdt_ctrl_domain *d) { - struct rdtgroup *rdtgrp =3D data->rdtgrp; + enum rdtgrp_mode mode =3D data->mode; struct resctrl_staged_config *cfg; struct rdt_resource *r =3D s->res; + u32 closid =3D data->closid; u32 cbm_val; =20 cfg =3D &d->staged_config[s->conf_type]; @@ -171,7 +173,7 @@ static int parse_cbm(struct rdt_parse_data *data, struc= t resctrl_schema *s, * Cannot set up more than one pseudo-locked region in a cache * hierarchy. */ - if (rdtgrp->mode =3D=3D RDT_MODE_PSEUDO_LOCKSETUP && + if (mode =3D=3D RDT_MODE_PSEUDO_LOCKSETUP && rdtgroup_pseudo_locked_in_hierarchy(d)) { rdt_last_cmd_puts("Pseudo-locked region in hierarchy\n"); return -EINVAL; @@ -180,8 +182,7 @@ static int parse_cbm(struct rdt_parse_data *data, struc= t resctrl_schema *s, if (!cbm_validate(data->buf, &cbm_val, r)) return -EINVAL; =20 - if ((rdtgrp->mode =3D=3D RDT_MODE_EXCLUSIVE || - rdtgrp->mode =3D=3D RDT_MODE_SHAREABLE) && + if ((mode =3D=3D RDT_MODE_EXCLUSIVE || mode =3D=3D RDT_MODE_SHAREABLE) && rdtgroup_cbm_overlaps_pseudo_locked(d, cbm_val)) { rdt_last_cmd_puts("CBM overlaps with pseudo-locked region\n"); return -EINVAL; @@ -191,14 +192,14 @@ static int parse_cbm(struct rdt_parse_data *data, str= uct resctrl_schema *s, * The CBM may not overlap with the CBM of another closid if * either is exclusive. */ - if (rdtgroup_cbm_overlaps(s, d, cbm_val, rdtgrp->closid, true)) { + if (rdtgroup_cbm_overlaps(s, d, cbm_val, closid, true)) { rdt_last_cmd_puts("Overlaps with exclusive group\n"); return -EINVAL; } =20 - if (rdtgroup_cbm_overlaps(s, d, cbm_val, rdtgrp->closid, false)) { - if (rdtgrp->mode =3D=3D RDT_MODE_EXCLUSIVE || - rdtgrp->mode =3D=3D RDT_MODE_PSEUDO_LOCKSETUP) { + if (rdtgroup_cbm_overlaps(s, d, cbm_val, closid, false)) { + if (mode =3D=3D RDT_MODE_EXCLUSIVE || + mode =3D=3D RDT_MODE_PSEUDO_LOCKSETUP) { rdt_last_cmd_puts("Overlaps with other group\n"); return -EINVAL; } @@ -262,7 +263,8 @@ static int parse_line(char *line, struct resctrl_schema= *s, list_for_each_entry(d, &r->ctrl_domains, hdr.list) { if (d->hdr.id =3D=3D dom_id) { data.buf =3D dom; - data.rdtgrp =3D rdtgrp; + data.closid =3D rdtgrp->closid; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 00:59:05.9679 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5e7cfc33-58d5-46ef-34b8-08de224fd852 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD81.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4369 Content-Type: text/plain; charset="utf-8" The io_alloc feature in resctrl enables system software to configure the portion of the cache allocated for I/O traffic. When supported, the io_alloc_cbm file in resctrl provides access to capacity bitmasks (CBMs) allocated for I/O devices. Enable users to modify io_alloc CBMs by writing to the io_alloc_cbm resctrl file when the io_alloc feature is enabled. Mirror the CBMs between CDP_CODE and CDP_DATA when CDP is enabled to present consistent I/O allocation information to user space. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- v12: No changes. v11: Fixed the minor conflict in internal.h due to previous patch. Added Reviwed-by tag. v10: Updated the changelog. Updated the return code to EINVAL when feature is not enabled. Minor code comment update. v9: Rewrote the changelog. Removed duplicated rdt_last_cmd_clear(). Corrected rdt_staged_configs_clear() placement. Added one more example to update the schemata with multiple domains. Copied staged_config from peer when CDP is enabled. v8: Updated changelog. Moved resctrl_io_alloc_parse_line() and resctrl_io_alloc_cbm_write() to fs/resctrl/ctrlmondata.c. Added resctrl_arch_get_cdp_enabled() check inside resctrl_io_alloc_pars= e_line(). Made parse_cbm() static again as everything moved to ctrlmondata.c. v7: Updated changelog. Updated CBMs for both CDP_DATA and CDP_CODE when CDP is enabled. v6: Updated the user doc restctr.doc for minor texts. Changed the subject to fs/resctrl. v5: Changes due to FS/ARCH code restructure. The files monitor.c/rdtgroup.c have been split between FS and ARCH directories. Changed the code to access the CBMs via either L3CODE or L3DATA resourc= es. v4: Removed resctrl_io_alloc_parse_cbm and called parse_cbm() directly. v3: Minor changes due to changes in resctrl_arch_get_io_alloc_enabled() and resctrl_io_alloc_closid_get(). Taken care of handling the CBM update when CDP is enabled. Updated the commit log to make it generic. v2: Added more generic text in documentation. --- Documentation/filesystems/resctrl.rst | 12 ++++ fs/resctrl/ctrlmondata.c | 93 +++++++++++++++++++++++++++ fs/resctrl/internal.h | 2 + fs/resctrl/rdtgroup.c | 3 +- 4 files changed, 109 insertions(+), 1 deletion(-) diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesyst= ems/resctrl.rst index e7994538e0ce..bbc4b6cbb71d 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -196,6 +196,18 @@ related to allocation: # cat /sys/fs/resctrl/info/L3/io_alloc_cbm 0=3Dffff;1=3Dffff =20 + CBMs can be configured by writing to the interface. + + Example:: + + # echo 1=3Dff > /sys/fs/resctrl/info/L3/io_alloc_cbm + # cat /sys/fs/resctrl/info/L3/io_alloc_cbm + 0=3Dffff;1=3D00ff + + # echo "0=3Dff;1=3Df" > /sys/fs/resctrl/info/L3/io_alloc_cbm + # cat /sys/fs/resctrl/info/L3/io_alloc_cbm + 0=3D00ff;1=3D000f + When CDP is enabled "io_alloc_cbm" associated with the CDP_DATA and CDP_= CODE resources may reflect the same values. For example, values read from and written to /sys/fs/resctrl/info/L3DATA/io_alloc_cbm may be reflected by diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index c43bedea70d7..332918fc961a 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -864,3 +864,96 @@ int resctrl_io_alloc_cbm_show(struct kernfs_open_file = *of, struct seq_file *seq, cpus_read_unlock(); return ret; } + +static int resctrl_io_alloc_parse_line(char *line, struct rdt_resource *r, + struct resctrl_schema *s, u32 closid) +{ + enum resctrl_conf_type peer_type; + struct rdt_parse_data data; + struct rdt_ctrl_domain *d; + char *dom =3D NULL, *id; + unsigned long dom_id; + +next: + if (!line || line[0] =3D=3D '\0') + return 0; + + dom =3D strsep(&line, ";"); + id =3D strsep(&dom, "=3D"); + if (!dom || kstrtoul(id, 10, &dom_id)) { + rdt_last_cmd_puts("Missing '=3D' or non-numeric domain\n"); + return -EINVAL; + } + + dom =3D strim(dom); + list_for_each_entry(d, &r->ctrl_domains, hdr.list) { + if (d->hdr.id =3D=3D dom_id) { + data.buf =3D dom; + data.mode =3D RDT_MODE_SHAREABLE; + data.closid =3D closid; + if (parse_cbm(&data, s, d)) + return -EINVAL; + /* + * Keep io_alloc CLOSID's CBM of CDP_CODE and CDP_DATA + * in sync. + */ + if (resctrl_arch_get_cdp_enabled(r->rid)) { + peer_type =3D resctrl_peer_type(s->conf_type); + memcpy(&d->staged_config[peer_type], + &d->staged_config[s->conf_type], + sizeof(d->staged_config[0])); + } + goto next; + } + } + + return -EINVAL; +} + +ssize_t resctrl_io_alloc_cbm_write(struct kernfs_open_file *of, char *buf, + size_t nbytes, loff_t off) +{ + struct resctrl_schema *s =3D rdt_kn_parent_priv(of->kn); + struct rdt_resource *r =3D s->res; + u32 io_alloc_closid; + int ret =3D 0; + + /* Valid input requires a trailing newline */ + if (nbytes =3D=3D 0 || buf[nbytes - 1] !=3D '\n') + return -EINVAL; + + buf[nbytes - 1] =3D '\0'; + + cpus_read_lock(); + mutex_lock(&rdtgroup_mutex); + rdt_last_cmd_clear(); + + if (!r->cache.io_alloc_capable) { + rdt_last_cmd_printf("io_alloc is not supported on %s\n", s->name); + ret =3D -ENODEV; + goto out_unlock; + } + + if (!resctrl_arch_get_io_alloc_enabled(r)) { + rdt_last_cmd_printf("io_alloc is not enabled on %s\n", s->name); + ret =3D -EINVAL; + goto out_unlock; + } + + io_alloc_closid =3D resctrl_io_alloc_closid(r); + + rdt_staged_configs_clear(); + ret =3D resctrl_io_alloc_parse_line(buf, r, s, io_alloc_closid); + if (ret) + goto out_clear_configs; + + ret =3D resctrl_arch_update_domains(r, io_alloc_closid); + +out_clear_configs: + rdt_staged_configs_clear(); +out_unlock: + mutex_unlock(&rdtgroup_mutex); + cpus_read_unlock(); + + return ret ?: nbytes; +} diff --git a/fs/resctrl/internal.h b/fs/resctrl/internal.h index 779a575e0828..e1eda74881a9 100644 --- a/fs/resctrl/internal.h +++ b/fs/resctrl/internal.h @@ -440,6 +440,8 @@ ssize_t resctrl_io_alloc_write(struct kernfs_open_file = *of, char *buf, const char *rdtgroup_name_by_closid(u32 closid); int resctrl_io_alloc_cbm_show(struct kernfs_open_file *of, struct seq_file= *seq, void *v); +ssize_t resctrl_io_alloc_cbm_write(struct kernfs_open_file *of, char *buf, + size_t nbytes, loff_t off); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 00:59:16.6558 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e4839909-15f5-44c2-222d-08de224fdeb1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD83.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9229 Content-Type: text/plain; charset="utf-8" The "shareable_bits" and "bit_usage" resctrl files associated with cache resources give insight into how instances of a cache is used. Update the annotated capacity bitmasks displayed by "bit_usage" to include = the cache portions allocated for I/O via the "io_alloc" feature. "shareable_bit= s" is a global bitmask of shareable cache with I/O and can thus not present the per-domain I/O allocations possible with the "io_alloc" feature. Revise the "shareable_bits" documentation to direct users to "bit_usage" for accurate cache usage information. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- v12: No changes. v11: Fixed the minor conflict in internal.h. Added Reviewed-by tag. v10: Changelog update. Updated schematas to schemata. v9: Changelog update. Added code comments about CDP. Updated the "bit_usage" section of resctrl.rst for io_alloc. v8: Moved the patch to last after all the concepts are initialized. Updated user doc resctrl.rst. Simplified the CDT check in rdt_bit_usage_show() as CDP_DATA and CDP_C= ODE are in sync with io_alloc enabled. v7: New patch split from earlier patch #5. Added resctrl_io_alloc_closid() to return max COSID. --- Documentation/filesystems/resctrl.rst | 35 ++++++++++++++++----------- fs/resctrl/ctrlmondata.c | 2 +- fs/resctrl/internal.h | 1 + fs/resctrl/rdtgroup.c | 21 ++++++++++++++-- 4 files changed, 42 insertions(+), 17 deletions(-) diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesyst= ems/resctrl.rst index bbc4b6cbb71d..8c8ce678148a 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -96,12 +96,19 @@ related to allocation: must be set when writing a mask. =20 "shareable_bits": - Bitmask of shareable resource with other executing - entities (e.g. I/O). User can use this when - setting up exclusive cache partitions. Note that - some platforms support devices that have their - own settings for cache use which can over-ride - these bits. + Bitmask of shareable resource with other executing entities + (e.g. I/O). Applies to all instances of this resource. User + can use this when setting up exclusive cache partitions. + Note that some platforms support devices that have their + own settings for cache use which can over-ride these bits. + + When "io_alloc" is enabled, a portion of each cache instance can + be configured for shared use between hardware and software. + "bit_usage" should be used to see which portions of each cache + instance is configured for hardware use via "io_alloc" feature + because every cache instance can have its "io_alloc" bitmask + configured independently via "io_alloc_cbm". + "bit_usage": Annotated capacity bitmasks showing how all instances of the resource are used. The legend is: @@ -115,16 +122,16 @@ related to allocation: "H": Corresponding region is used by hardware only but available for software use. If a resource - has bits set in "shareable_bits" but not all - of these bits appear in the resource groups' - schematas then the bits appearing in - "shareable_bits" but no resource group will - be marked as "H". + has bits set in "shareable_bits" or "io_alloc_cbm" + but not all of these bits appear in the resource + groups' schemata then the bits appearing in + "shareable_bits" or "io_alloc_cbm" but no + resource group will be marked as "H". "X": Corresponding region is available for sharing and - used by hardware and software. These are the - bits that appear in "shareable_bits" as - well as a resource group's allocation. + used by hardware and software. These are the bits + that appear in "shareable_bits" or "io_alloc_cbm" + as well as a resource group's allocation. "S": Corresponding region is used by software and available for sharing. diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index 332918fc961a..b2d178d3556e 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -750,7 +750,7 @@ static int resctrl_io_alloc_init_cbm(struct resctrl_sch= ema *s, u32 closid) * resource. Note that if Code Data Prioritization (CDP) is enabled, the n= umber * of available CLOSIDs is reduced by half. */ -static u32 resctrl_io_alloc_closid(struct rdt_resource *r) +u32 resctrl_io_alloc_closid(struct rdt_resource *r) { if (resctrl_arch_get_cdp_enabled(r->rid)) return resctrl_arch_get_num_closid(r) / 2 - 1; diff --git a/fs/resctrl/internal.h b/fs/resctrl/internal.h index e1eda74881a9..bff4a54ae333 100644 --- a/fs/resctrl/internal.h +++ b/fs/resctrl/internal.h @@ -442,6 +442,7 @@ int resctrl_io_alloc_cbm_show(struct kernfs_open_file *= of, struct seq_file *seq, void *v); ssize_t resctrl_io_alloc_cbm_write(struct kernfs_open_file *of, char *buf, size_t nbytes, loff_t off); +u32 resctrl_io_alloc_closid(struct rdt_resource *r); =20 #ifdef CONFIG_RESCTRL_FS_PSEUDO_LOCK int rdtgroup_locksetup_enter(struct rdtgroup *rdtgrp); diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 3527bb8fa2ff..ea320dcf8aba 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -1062,15 +1062,17 @@ static int rdt_bit_usage_show(struct kernfs_open_fi= le *of, =20 cpus_read_lock(); mutex_lock(&rdtgroup_mutex); - hw_shareable =3D r->cache.shareable_bits; list_for_each_entry(dom, &r->ctrl_domains, hdr.list) { if (sep) seq_putc(seq, ';'); + hw_shareable =3D r->cache.shareable_bits; sw_shareable =3D 0; exclusive =3D 0; seq_printf(seq, "%d=3D", dom->hdr.id); for (i =3D 0; i < closids_supported(); i++) { - if (!closid_allocated(i)) + if (!closid_allocated(i) || + (resctrl_arch_get_io_alloc_enabled(r) && + i =3D=3D resctrl_io_alloc_closid(r))) continue; ctrl_val =3D resctrl_arch_get_config(r, dom, i, s->conf_type); @@ -1098,6 +1100,21 @@ static int rdt_bit_usage_show(struct kernfs_open_fil= e *of, break; } } + + /* + * When the "io_alloc" feature is enabled, a portion of the cache + * is configured for shared use between hardware and software. + * Also, when CDP is enabled the CBMs of CDP_CODE and CDP_DATA + * resources are kept in sync. So, the CBMs for "io_alloc" can + * be accessed through either resource. + */ + if (resctrl_arch_get_io_alloc_enabled(r)) { + ctrl_val =3D resctrl_arch_get_config(r, dom, + resctrl_io_alloc_closid(r), + s->conf_type); + hw_shareable |=3D ctrl_val; + } + for (i =3D r->cache.cbm_len - 1; i >=3D 0; i--) { pseudo_locked =3D dom->plr ? dom->plr->cbm : 0; hwb =3D test_bit(i, &hw_shareable); --=20 2.34.1