From nobody Sat Feb 7 17:20:12 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC3C42D193B; Fri, 17 Oct 2025 10:54:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760698486; cv=none; b=OCOclINaLAFDvL27K/VOJmldU629CYYr0O0QMzffIV5OqnwTywoC5SKOiwPsVeo5tQv6927NgYa3x0viH1EzAIposB6qMHjP4Lm0l/p8ouzl8EcQCSzTiyvQCuix1heclKF/t/rg+wVSy4tdE8ATHIxnA3mk/eO8It9xrQK1ZoA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760698486; c=relaxed/simple; bh=jhg0Kl+C/SFMuevm/DdOlKKUxSgsZOY5lKQgc5okIn4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pafvfTHig1iL8r5XjIT8MMcLmlqyBBB9egRae8QFzilBfnPy6WL7DhPL+rdMvBjSM41skU54J5ZfhKkaGvzBou8hhoUZ9Nhhd3lgh1SY+qd98kWw6JlyMoVD24YAo6Su5IDd+NXZxwtia/sbCYVyQF3IYJrDvf5/k5V62k3k95k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9BA9FC4CEFE; Fri, 17 Oct 2025 10:54:37 +0000 (UTC) From: Geert Uytterhoeven To: Michael Turquette , Stephen Boyd , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Giovanni Cabiddu , Herbert Xu , David Miller , Linus Walleij , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Crt Mori , Jonathan Cameron , Lars-Peter Clausen , Jacky Huang , Shan-Chun Hung , Yury Norov , Rasmus Villemoes , Jaroslav Kysela , Takashi Iwai , Johannes Berg , Jakub Kicinski , Alex Elder , David Laight , Vincent Mailhol , Jason Baron , Borislav Petkov , Tony Luck , Michael Hennerich , Kim Seer Paller , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Richard Genoud , Cosmin Tanislav , Biju Das , Jianping Shen Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-crypto@vger.kernel.org, linux-edac@vger.kernel.org, qat-linux@intel.com, linux-gpio@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-iio@vger.kernel.org, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v4 1/4] bitfield: Drop underscores from macro parameters Date: Fri, 17 Oct 2025 12:54:09 +0200 Message-ID: <792d176149bc4ffde2a7b78062388dc2466c23ca.1760696560.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There is no need to prefix macro parameters with underscores. Remove the underscores. Suggested-by: David Laight Signed-off-by: Geert Uytterhoeven --- v4: - Update recently introduced FIELD_MODIFY() macro, v3: - New. --- include/linux/bitfield.h | 106 +++++++++++++++++++-------------------- 1 file changed, 53 insertions(+), 53 deletions(-) diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h index 5355f8f806a97974..7ff817bdae19b468 100644 --- a/include/linux/bitfield.h +++ b/include/linux/bitfield.h @@ -60,68 +60,68 @@ =20 #define __bf_cast_unsigned(type, x) ((__unsigned_scalar_typeof(type))(x)) =20 -#define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ +#define __BF_FIELD_CHECK(mask, reg, val, pfx) \ ({ \ - BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \ - _pfx "mask is not constant"); \ - BUILD_BUG_ON_MSG((_mask) =3D=3D 0, _pfx "mask is zero"); \ - BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \ - ~((_mask) >> __bf_shf(_mask)) & \ - (0 + (_val)) : 0, \ - _pfx "value too large for the field"); \ - BUILD_BUG_ON_MSG(__bf_cast_unsigned(_mask, _mask) > \ - __bf_cast_unsigned(_reg, ~0ull), \ - _pfx "type of reg too small for mask"); \ - __BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \ - (1ULL << __bf_shf(_mask))); \ + BUILD_BUG_ON_MSG(!__builtin_constant_p(mask), \ + pfx "mask is not constant"); \ + BUILD_BUG_ON_MSG((mask) =3D=3D 0, pfx "mask is zero"); \ + BUILD_BUG_ON_MSG(__builtin_constant_p(val) ? \ + ~((mask) >> __bf_shf(mask)) & \ + (0 + (val)) : 0, \ + pfx "value too large for the field"); \ + BUILD_BUG_ON_MSG(__bf_cast_unsigned(mask, mask) > \ + __bf_cast_unsigned(reg, ~0ull), \ + pfx "type of reg too small for mask"); \ + __BUILD_BUG_ON_NOT_POWER_OF_2((mask) + \ + (1ULL << __bf_shf(mask))); \ }) =20 /** * FIELD_MAX() - produce the maximum value representable by a field - * @_mask: shifted mask defining the field's length and position + * @mask: shifted mask defining the field's length and position * * FIELD_MAX() returns the maximum value that can be held in the field - * specified by @_mask. + * specified by @mask. */ -#define FIELD_MAX(_mask) \ +#define FIELD_MAX(mask) \ ({ \ - __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_MAX: "); \ - (typeof(_mask))((_mask) >> __bf_shf(_mask)); \ + __BF_FIELD_CHECK(mask, 0ULL, 0ULL, "FIELD_MAX: "); \ + (typeof(mask))((mask) >> __bf_shf(mask)); \ }) =20 /** * FIELD_FIT() - check if value fits in the field - * @_mask: shifted mask defining the field's length and position - * @_val: value to test against the field + * @mask: shifted mask defining the field's length and position + * @val: value to test against the field * - * Return: true if @_val can fit inside @_mask, false if @_val is too big. + * Return: true if @val can fit inside @mask, false if @val is too big. */ -#define FIELD_FIT(_mask, _val) \ +#define FIELD_FIT(mask, val) \ ({ \ - __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_FIT: "); \ - !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \ + __BF_FIELD_CHECK(mask, 0ULL, 0ULL, "FIELD_FIT: "); \ + !((((typeof(mask))val) << __bf_shf(mask)) & ~(mask)); \ }) =20 /** * FIELD_PREP() - prepare a bitfield element - * @_mask: shifted mask defining the field's length and position - * @_val: value to put in the field + * @mask: shifted mask defining the field's length and position + * @val: value to put in the field * * FIELD_PREP() masks and shifts up the value. The result should * be combined with other fields of the bitfield using logical OR. */ -#define FIELD_PREP(_mask, _val) \ +#define FIELD_PREP(mask, val) \ ({ \ - __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ - ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \ + __BF_FIELD_CHECK(mask, 0ULL, val, "FIELD_PREP: "); \ + ((typeof(mask))(val) << __bf_shf(mask)) & (mask); \ }) =20 #define __BF_CHECK_POW2(n) BUILD_BUG_ON_ZERO(((n) & ((n) - 1)) !=3D 0) =20 /** * FIELD_PREP_CONST() - prepare a constant bitfield element - * @_mask: shifted mask defining the field's length and position - * @_val: value to put in the field + * @mask: shifted mask defining the field's length and position + * @val: value to put in the field * * FIELD_PREP_CONST() masks and shifts up the value. The result should * be combined with other fields of the bitfield using logical OR. @@ -130,47 +130,47 @@ * be used in initializers. Error checking is less comfortable for this * version, and non-constant masks cannot be used. */ -#define FIELD_PREP_CONST(_mask, _val) \ +#define FIELD_PREP_CONST(mask, val) \ ( \ /* mask must be non-zero */ \ - BUILD_BUG_ON_ZERO((_mask) =3D=3D 0) + \ + BUILD_BUG_ON_ZERO((mask) =3D=3D 0) + \ /* check if value fits */ \ - BUILD_BUG_ON_ZERO(~((_mask) >> __bf_shf(_mask)) & (_val)) + \ + BUILD_BUG_ON_ZERO(~((mask) >> __bf_shf(mask)) & (val)) + \ /* check if mask is contiguous */ \ - __BF_CHECK_POW2((_mask) + (1ULL << __bf_shf(_mask))) + \ + __BF_CHECK_POW2((mask) + (1ULL << __bf_shf(mask))) + \ /* and create the value */ \ - (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)) \ + (((typeof(mask))(val) << __bf_shf(mask)) & (mask)) \ ) =20 /** * FIELD_GET() - extract a bitfield element - * @_mask: shifted mask defining the field's length and position - * @_reg: value of entire bitfield + * @mask: shifted mask defining the field's length and position + * @reg: value of entire bitfield * - * FIELD_GET() extracts the field specified by @_mask from the - * bitfield passed in as @_reg by masking and shifting it down. + * FIELD_GET() extracts the field specified by @mask from the + * bitfield passed in as @reg by masking and shifting it down. */ -#define FIELD_GET(_mask, _reg) \ +#define FIELD_GET(mask, reg) \ ({ \ - __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \ - (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ + __BF_FIELD_CHECK(mask, reg, 0U, "FIELD_GET: "); \ + (typeof(mask))(((reg) & (mask)) >> __bf_shf(mask)); \ }) =20 /** * FIELD_MODIFY() - modify a bitfield element - * @_mask: shifted mask defining the field's length and position - * @_reg_p: pointer to the memory that should be updated - * @_val: value to store in the bitfield + * @mask: shifted mask defining the field's length and position + * @reg_p: pointer to the memory that should be updated + * @val: value to store in the bitfield * - * FIELD_MODIFY() modifies the set of bits in @_reg_p specified by @_mask, - * by replacing them with the bitfield value passed in as @_val. + * FIELD_MODIFY() modifies the set of bits in @reg_p specified by @mask, + * by replacing them with the bitfield value passed in as @val. */ -#define FIELD_MODIFY(_mask, _reg_p, _val) \ +#define FIELD_MODIFY(mask, reg_p, val) \ ({ \ - typecheck_pointer(_reg_p); \ - __BF_FIELD_CHECK(_mask, *(_reg_p), _val, "FIELD_MODIFY: "); \ - *(_reg_p) &=3D ~(_mask); \ - *(_reg_p) |=3D (((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask)); \ + typecheck_pointer(reg_p); \ + __BF_FIELD_CHECK(mask, *(reg_p), val, "FIELD_MODIFY: "); \ + *(reg_p) &=3D ~(mask); \ + *(reg_p) |=3D (((typeof(mask))(val) << __bf_shf(mask)) & (mask)); \ }) =20 extern void __compiletime_error("value doesn't fit into mask") --=20 2.43.0 From nobody Sat Feb 7 17:20:12 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1885D326D50; Fri, 17 Oct 2025 10:54:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760698496; cv=none; b=KqFa9I14Ve8e8VLc+Lxk6cgZqlXyPSx8NV4//bXg6bP6VZCQEm3SAH+w9XBzqHRUYF+IixfA9W1oae1aohXmvnpOMtOAplRMBGqUMrLeWa7EepCGu1VQcZcOpB6RNJhe7/0HL1mkxDm5hpKZvnOQDbHKoUMEnL53tzGxt2TvG6s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760698496; c=relaxed/simple; bh=nNXrMtZk3zYnmlXOuCh6SX9nUfQDOAFUF16LDju3VEQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aOS8iJcfvmNu5WddnnTM6M6Qa5+Or6RZ2AIhhFp92tUKaeiiCEbOsVcA71q/qV8qh7+YFTjyPFGzb0ywzQsJaij7yreHQuzAvT4sb+iprr4mb2ewLLoygE/mxMURRLej8EvOsmY3ElGVf7MfjGpUhStbxo1VKKjdnkBJ8gMJ56U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id B7FB8C4CEE7; Fri, 17 Oct 2025 10:54:46 +0000 (UTC) From: Geert Uytterhoeven To: Michael Turquette , Stephen Boyd , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Giovanni Cabiddu , Herbert Xu , David Miller , Linus Walleij , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Crt Mori , Jonathan Cameron , Lars-Peter Clausen , Jacky Huang , Shan-Chun Hung , Yury Norov , Rasmus Villemoes , Jaroslav Kysela , Takashi Iwai , Johannes Berg , Jakub Kicinski , Alex Elder , David Laight , Vincent Mailhol , Jason Baron , Borislav Petkov , Tony Luck , Michael Hennerich , Kim Seer Paller , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Richard Genoud , Cosmin Tanislav , Biju Das , Jianping Shen Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-crypto@vger.kernel.org, linux-edac@vger.kernel.org, qat-linux@intel.com, linux-gpio@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-iio@vger.kernel.org, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven , Jonathan Cameron Subject: [PATCH v4 2/4] bitfield: Add non-constant field_{prep,get}() helpers Date: Fri, 17 Oct 2025 12:54:10 +0200 Message-ID: <67c1998f144b3a21399672c8e4d58d3884ae2b3c.1760696560.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The existing FIELD_{GET,PREP}() macros are limited to compile-time constants. However, it is very common to prepare or extract bitfield elements where the bitfield mask is not a compile-time constant. To avoid this limitation, the AT91 clock driver and several other drivers already have their own non-const field_{prep,get}() macros. Make them available for general use by consolidating them in , and improve them slightly: 1. Avoid evaluating macro parameters more than once, 2. Replace "ffs() - 1" by "__ffs()", 3. Support 64-bit use on 32-bit architectures. This is deliberately not merged into the existing FIELD_{GET,PREP}() macros, as people expressed the desire to keep stricter variants for increased safety, or for performance critical paths. Signed-off-by: Geert Uytterhoeven Acked-by: Alexandre Belloni Acked-by: Jonathan Cameron Acked-by: Crt Mori Acked-by: Nuno S=C3=A1 Acked-by: Richard Genoud --- v4: - Add Acked-by, - Rebase on top of commit 7c68005a46108ffa ("crypto: qat - relocate power management debugfs helper APIs") in v6.17-rc1, - Convert more recently introduced upstream copies: - drivers/edac/ie31200_edac.c - drivers/iio/dac/ad3530r.c v3: - Add Acked-by, - Drop underscores from macro parameters, - Use __auto_type where possible, - Correctly cast reg to the mask type, - Introduces __val and __reg intermediates to simplify the actual operation, - Drop unneeded parentheses, - Clarify having both FIELD_{GET,PREP}() and field_{get,prep}(), v2: - Cast val resp. reg to the mask type, - Fix 64-bit use on 32-bit architectures, - Convert new upstream users: - drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c - drivers/gpio/gpio-aspeed.c - drivers/iio/temperature/mlx90614.c - drivers/pinctrl/nuvoton/pinctrl-ma35.c - sound/usb/mixer_quirks.c - Convert new user queued in renesas-devel for v6.15: - drivers/soc/renesas/rz-sysc.c --- drivers/clk/at91/clk-peripheral.c | 1 + drivers/clk/at91/pmc.h | 3 -- .../intel/qat/qat_common/adf_pm_dbgfs_utils.c | 8 +---- drivers/edac/ie31200_edac.c | 4 +-- drivers/gpio/gpio-aspeed.c | 5 +-- drivers/iio/dac/ad3530r.c | 3 -- drivers/iio/temperature/mlx90614.c | 5 +-- drivers/pinctrl/nuvoton/pinctrl-ma35.c | 4 --- drivers/soc/renesas/rz-sysc.c | 3 +- include/linux/bitfield.h | 36 +++++++++++++++++++ sound/usb/mixer_quirks.c | 4 --- 11 files changed, 42 insertions(+), 34 deletions(-) diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-perip= heral.c index e700f40fd87f9327..e7208c47268b6397 100644 --- a/drivers/clk/at91/clk-peripheral.c +++ b/drivers/clk/at91/clk-peripheral.c @@ -3,6 +3,7 @@ * Copyright (C) 2013 Boris BREZILLON */ =20 +#include #include #include #include diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 5daa32c4cf2540d7..543d7aee8d248cdb 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -117,9 +117,6 @@ struct at91_clk_pms { unsigned int parent; }; =20 -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - #define ndck(a, s) (a[s - 1].id + 1) #define nck(a) (a[ARRAY_SIZE(a) - 1].id + 1) =20 diff --git a/drivers/crypto/intel/qat/qat_common/adf_pm_dbgfs_utils.c b/dri= vers/crypto/intel/qat/qat_common/adf_pm_dbgfs_utils.c index 69295a9ddf0ac92f..4ccc94ed9493a64c 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_pm_dbgfs_utils.c +++ b/drivers/crypto/intel/qat/qat_common/adf_pm_dbgfs_utils.c @@ -1,18 +1,12 @@ // SPDX-License-Identifier: GPL-2.0-only /* Copyright(c) 2025 Intel Corporation */ +#include #include #include #include =20 #include "adf_pm_dbgfs_utils.h" =20 -/* - * This is needed because a variable is used to index the mask at - * pm_scnprint_table(), making it not compile time constant, so the compile - * asserts from FIELD_GET() or u32_get_bits() won't be fulfilled. - */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) - #define PM_INFO_MAX_KEY_LEN 21 =20 static int pm_scnprint_table(char *buff, const struct pm_status_row *table, diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c index 5a080ab65476dacf..dfc9a9cecd74207d 100644 --- a/drivers/edac/ie31200_edac.c +++ b/drivers/edac/ie31200_edac.c @@ -44,6 +44,7 @@ * but lo_hi_readq() ensures that we are safe across all e3-1200 processor= s. */ =20 +#include #include #include #include @@ -139,9 +140,6 @@ #define IE31200_CAPID0_DDPCD BIT(6) #define IE31200_CAPID0_ECC BIT(1) =20 -/* Non-constant mask variant of FIELD_GET() */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) - static int nr_channels; static struct pci_dev *mci_pdev; static int ie31200_registered =3D 1; diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index 7953a9c4e36d7550..3da999334971d501 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c @@ -5,6 +5,7 @@ * Joel Stanley */ =20 +#include #include #include #include @@ -31,10 +32,6 @@ #include #include "gpiolib.h" =20 -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - #define GPIO_G7_IRQ_STS_BASE 0x100 #define GPIO_G7_IRQ_STS_OFFSET(x) (GPIO_G7_IRQ_STS_BASE + (x) * 0x4) #define GPIO_G7_CTRL_REG_BASE 0x180 diff --git a/drivers/iio/dac/ad3530r.c b/drivers/iio/dac/ad3530r.c index 6134613777b8e1d4..b97b46090d808ee7 100644 --- a/drivers/iio/dac/ad3530r.c +++ b/drivers/iio/dac/ad3530r.c @@ -53,9 +53,6 @@ #define AD3530R_MAX_CHANNELS 8 #define AD3531R_MAX_CHANNELS 4 =20 -/* Non-constant mask variant of FIELD_PREP() */ -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - enum ad3530r_mode { AD3530R_NORMAL_OP, AD3530R_POWERDOWN_1K, diff --git a/drivers/iio/temperature/mlx90614.c b/drivers/iio/temperature/m= lx90614.c index 8a44a00bfd5ece38..1ad21b73e1b44cb0 100644 --- a/drivers/iio/temperature/mlx90614.c +++ b/drivers/iio/temperature/mlx90614.c @@ -22,6 +22,7 @@ * the "wakeup" GPIO is not given, power management will be disabled. */ =20 +#include #include #include #include @@ -68,10 +69,6 @@ #define MLX90614_CONST_SCALE 20 /* Scale in milliKelvin (0.02 * 1000) */ #define MLX90614_CONST_FIR 0x7 /* Fixed value for FIR part of low pass fil= ter */ =20 -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - struct mlx_chip_info { /* EEPROM offsets with 16-bit data, MSB first */ /* emissivity correction coefficient */ diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvot= on/pinctrl-ma35.c index cdad01d68a37e365..8d71dc53cc1de1f8 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c @@ -81,10 +81,6 @@ #define MVOLT_1800 0 #define MVOLT_3300 1 =20 -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - static const char * const gpio_group_name[] =3D { "gpioa", "gpiob", "gpioc", "gpiod", "gpioe", "gpiof", "gpiog", "gpioh", "gpioi", "gpioj", "gpiok", "gpiol", "gpiom", "gpion", diff --git a/drivers/soc/renesas/rz-sysc.c b/drivers/soc/renesas/rz-sysc.c index 9f79e299e6f41641..73eaf8b9d69f7208 100644 --- a/drivers/soc/renesas/rz-sysc.c +++ b/drivers/soc/renesas/rz-sysc.c @@ -5,6 +5,7 @@ * Copyright (C) 2024 Renesas Electronics Corp. */ =20 +#include #include #include #include @@ -16,8 +17,6 @@ =20 #include "rz-sysc.h" =20 -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) - /** * struct rz_sysc - RZ SYSC private data structure * @base: SYSC base address diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h index 7ff817bdae19b468..c999fe70076f6684 100644 --- a/include/linux/bitfield.h +++ b/include/linux/bitfield.h @@ -220,4 +220,40 @@ __MAKE_OP(64) #undef __MAKE_OP #undef ____MAKE_OP =20 +/** + * field_prep() - prepare a bitfield element + * @mask: shifted mask defining the field's length and position + * @val: value to put in the field + * + * field_prep() masks and shifts up the value. The result should be + * combined with other fields of the bitfield using logical OR. + * Unlike FIELD_PREP(), @mask is not limited to a compile-time constant. + */ +#define field_prep(mask, val) \ + ({ \ + __auto_type __mask =3D (mask); \ + typeof(mask) __val =3D (val); \ + unsigned int __shift =3D sizeof(mask) <=3D 4 ? \ + __ffs(__mask) : __ffs64(__mask); \ + (__val << __shift) & __mask; \ + }) + +/** + * field_get() - extract a bitfield element + * @mask: shifted mask defining the field's length and position + * @reg: value of entire bitfield + * + * field_get() extracts the field specified by @mask from the + * bitfield passed in as @reg by masking and shifting it down. + * Unlike FIELD_GET(), @mask is not limited to a compile-time constant. + */ +#define field_get(mask, reg) \ + ({ \ + __auto_type __mask =3D (mask); \ + typeof(mask) __reg =3D (reg); \ + unsigned int __shift =3D sizeof(mask) <=3D 4 ? \ + __ffs(__mask) : __ffs64(__mask); \ + (__reg & __mask) >> __shift; \ + }) + #endif diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 828af3095b86ee0a..6eee89cbc0867f2b 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -3311,10 +3311,6 @@ static int snd_bbfpro_controls_create(struct usb_mix= er_interface *mixer) #define RME_DIGIFACE_REGISTER(reg, mask) (((reg) << 16) | (mask)) #define RME_DIGIFACE_INVERT BIT(31) =20 -/* Nonconst helpers */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - static int snd_rme_digiface_write_reg(struct snd_kcontrol *kcontrol, int i= tem, u16 mask, u16 val) { struct usb_mixer_elem_list *list =3D snd_kcontrol_chip(kcontrol); --=20 2.43.0 From nobody Sat Feb 7 17:20:12 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5035D328625; Fri, 17 Oct 2025 10:55:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760698505; cv=none; b=A+whcF+jhKlDDtUD9ZpEd2340roJND9TcLQgXmpVcnJapxTSrHkZB2fgR/+vmgvUP2fOjqATahZ2K7rKsRgzbEXzUlrOwy51QHc/gi6enDDkh4rwSpLvubenIGXafuy7F0diNq62T3OmNMlKNwcSZHq0s47M3DoC9mxgWjvBs3M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760698505; c=relaxed/simple; bh=h1CBbndi5vjG2sunUGG3v0G/PrL6PmW48UBE7l/m+d4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Cl1aUwKjCenNpIqIEQp+Yn3g3XzOXqhubXPd4h5I2anSPVivOkmdNFuml2U0kpJPT8AqcQs1MIVRwJkZpdSGzsuR/dD5xW90K+sdfLefUqclFT+ggPYugzFI5DlEfLaGoU4hogoNVvyS16IANiBd/M8EhxxYGduiPHt8hE3yKjA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1B48CC4CEFE; Fri, 17 Oct 2025 10:54:55 +0000 (UTC) From: Geert Uytterhoeven To: Michael Turquette , Stephen Boyd , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Giovanni Cabiddu , Herbert Xu , David Miller , Linus Walleij , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Crt Mori , Jonathan Cameron , Lars-Peter Clausen , Jacky Huang , Shan-Chun Hung , Yury Norov , Rasmus Villemoes , Jaroslav Kysela , Takashi Iwai , Johannes Berg , Jakub Kicinski , Alex Elder , David Laight , Vincent Mailhol , Jason Baron , Borislav Petkov , Tony Luck , Michael Hennerich , Kim Seer Paller , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Richard Genoud , Cosmin Tanislav , Biju Das , Jianping Shen Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-crypto@vger.kernel.org, linux-edac@vger.kernel.org, qat-linux@intel.com, linux-gpio@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-iio@vger.kernel.org, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v4 3/4] clk: renesas: Use bitfield helpers Date: Fri, 17 Oct 2025 12:54:11 +0200 Message-ID: <33827880afe233a54a817cff9730f59dc7e73def.1760696560.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the FIELD_{GET,PREP}() and field_{get,prep}() helpers for const respective non-const bitfields, instead of open-coding the same operations. Signed-off-by: Geert Uytterhoeven --- v4: - No changes, v3: - No changes, v2: - Rebase on top of commit 470e3f0d0b1529ab ("clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver"). --- drivers/clk/renesas/clk-div6.c | 6 +++--- drivers/clk/renesas/rcar-gen3-cpg.c | 15 +++++---------- drivers/clk/renesas/rcar-gen4-cpg.c | 9 +++------ 3 files changed, 11 insertions(+), 19 deletions(-) diff --git a/drivers/clk/renesas/clk-div6.c b/drivers/clk/renesas/clk-div6.c index 3abd6e5400aded6a..f7b827b5e9b2dd32 100644 --- a/drivers/clk/renesas/clk-div6.c +++ b/drivers/clk/renesas/clk-div6.c @@ -7,6 +7,7 @@ * Contact: Laurent Pinchart */ =20 +#include #include #include #include @@ -171,8 +172,7 @@ static u8 cpg_div6_clock_get_parent(struct clk_hw *hw) if (clock->src_mask =3D=3D 0) return 0; =20 - hw_index =3D (readl(clock->reg) & clock->src_mask) >> - __ffs(clock->src_mask); + hw_index =3D field_get(clock->src_mask, readl(clock->reg)); for (i =3D 0; i < clk_hw_get_num_parents(hw); i++) { if (clock->parents[i] =3D=3D hw_index) return i; @@ -191,7 +191,7 @@ static int cpg_div6_clock_set_parent(struct clk_hw *hw,= u8 index) if (index >=3D clk_hw_get_num_parents(hw)) return -EINVAL; =20 - src =3D clock->parents[index] << __ffs(clock->src_mask); + src =3D field_prep(clock->src_mask, clock->parents[index]); writel((readl(clock->reg) & ~clock->src_mask) | src, clock->reg); return 0; } diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar= -gen3-cpg.c index 10ae20489df9abd8..b954278ddd9d8aa8 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.c +++ b/drivers/clk/renesas/rcar-gen3-cpg.c @@ -54,10 +54,8 @@ static unsigned long cpg_pll_clk_recalc_rate(struct clk_= hw *hw, { struct cpg_pll_clk *pll_clk =3D to_pll_clk(hw); unsigned int mult; - u32 val; =20 - val =3D readl(pll_clk->pllcr_reg) & CPG_PLLnCR_STC_MASK; - mult =3D (val >> __ffs(CPG_PLLnCR_STC_MASK)) + 1; + mult =3D FIELD_GET(CPG_PLLnCR_STC_MASK, readl(pll_clk->pllcr_reg)) + 1; =20 return parent_rate * mult * pll_clk->fixed_mult; } @@ -94,7 +92,7 @@ static int cpg_pll_clk_set_rate(struct clk_hw *hw, unsign= ed long rate, =20 val =3D readl(pll_clk->pllcr_reg); val &=3D ~CPG_PLLnCR_STC_MASK; - val |=3D (mult - 1) << __ffs(CPG_PLLnCR_STC_MASK); + val |=3D FIELD_PREP(CPG_PLLnCR_STC_MASK, mult - 1); writel(val, pll_clk->pllcr_reg); =20 for (i =3D 1000; i; i--) { @@ -176,11 +174,7 @@ static unsigned long cpg_z_clk_recalc_rate(struct clk_= hw *hw, unsigned long parent_rate) { struct cpg_z_clk *zclk =3D to_z_clk(hw); - unsigned int mult; - u32 val; - - val =3D readl(zclk->reg) & zclk->mask; - mult =3D 32 - (val >> __ffs(zclk->mask)); + unsigned int mult =3D 32 - field_get(zclk->mask, readl(zclk->reg)); =20 return DIV_ROUND_CLOSEST_ULL((u64)parent_rate * mult, 32 * zclk->fixed_div); @@ -231,7 +225,8 @@ static int cpg_z_clk_set_rate(struct clk_hw *hw, unsign= ed long rate, if (readl(zclk->kick_reg) & CPG_FRQCRB_KICK) return -EBUSY; =20 - cpg_reg_modify(zclk->reg, zclk->mask, (32 - mult) << __ffs(zclk->mask)); + cpg_reg_modify(zclk->reg, zclk->mask, + field_prep(zclk->mask, 32 - mult)); =20 /* * Set KICK bit in FRQCRB to update hardware setting and wait for diff --git a/drivers/clk/renesas/rcar-gen4-cpg.c b/drivers/clk/renesas/rcar= -gen4-cpg.c index fb9a876aaba5cbcd..db3a0b8ef2b936bb 100644 --- a/drivers/clk/renesas/rcar-gen4-cpg.c +++ b/drivers/clk/renesas/rcar-gen4-cpg.c @@ -279,11 +279,7 @@ static unsigned long cpg_z_clk_recalc_rate(struct clk_= hw *hw, unsigned long parent_rate) { struct cpg_z_clk *zclk =3D to_z_clk(hw); - unsigned int mult; - u32 val; - - val =3D readl(zclk->reg) & zclk->mask; - mult =3D 32 - (val >> __ffs(zclk->mask)); + unsigned int mult =3D 32 - field_get(zclk->mask, readl(zclk->reg)); =20 return DIV_ROUND_CLOSEST_ULL((u64)parent_rate * mult, 32 * zclk->fixed_div); @@ -334,7 +330,8 @@ static int cpg_z_clk_set_rate(struct clk_hw *hw, unsign= ed long rate, if (readl(zclk->kick_reg) & CPG_FRQCRB_KICK) return -EBUSY; =20 - cpg_reg_modify(zclk->reg, zclk->mask, (32 - mult) << __ffs(zclk->mask)); + cpg_reg_modify(zclk->reg, zclk->mask, + field_prep(zclk->mask, 32 - mult)); =20 /* * Set KICK bit in FRQCRB to update hardware setting and wait for --=20 2.43.0 From nobody Sat Feb 7 17:20:12 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E1C4320CB6; Fri, 17 Oct 2025 10:55:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760698514; cv=none; b=bD1rHmmMGI3u2zqsOyACuZoQtwUOcFi9uafdIiy/BeUeh8sQq4bO+qKvs/e5VhATV1LIa96gWsn7zQYp0AWOK/LB1RzOXGZ2z9YlFUcyo7Vftu3FoNoiP6pk6JZE/H70RZCKZPNZNjBHZyQ0MId+Q7thzlW9LFvxJUz8PGUByqo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760698514; c=relaxed/simple; bh=YhNStRN+RN3qBLGJrZXY7hU9RUoPioJIdGPZbOpDi+Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZU5eDxJStkFypkBS+TjYMHBT5LmiTdzzHEI7ZkNwz48R3EyAwwoCSfpUCf0g3DsxtzGZpzj2u6vkEAVH40dPT9+/5TNX/NjXAdGxU2+9wdzIDExYworkQcnUMya1wxb5OEmcKfPdCd9eeSDFrWMLofxPLNnvwk6kIlBjSthpDBw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 442C9C4CEFB; Fri, 17 Oct 2025 10:55:05 +0000 (UTC) From: Geert Uytterhoeven To: Michael Turquette , Stephen Boyd , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Giovanni Cabiddu , Herbert Xu , David Miller , Linus Walleij , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Crt Mori , Jonathan Cameron , Lars-Peter Clausen , Jacky Huang , Shan-Chun Hung , Yury Norov , Rasmus Villemoes , Jaroslav Kysela , Takashi Iwai , Johannes Berg , Jakub Kicinski , Alex Elder , David Laight , Vincent Mailhol , Jason Baron , Borislav Petkov , Tony Luck , Michael Hennerich , Kim Seer Paller , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Richard Genoud , Cosmin Tanislav , Biju Das , Jianping Shen Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-crypto@vger.kernel.org, linux-edac@vger.kernel.org, qat-linux@intel.com, linux-gpio@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-iio@vger.kernel.org, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v4 4/4] soc: renesas: Use bitfield helpers Date: Fri, 17 Oct 2025 12:54:12 +0200 Message-ID: <5182a66c22d80efd3fa7ccedf62554d9f95c0a40.1760696560.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the field_get() helper, instead of open-coding the same operation. Signed-off-by: Geert Uytterhoeven --- v4: - No changes, v3: - No changes, v2: - Drop RFC, as a dependency was applied. --- drivers/soc/renesas/renesas-soc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soc/renesas/renesas-soc.c b/drivers/soc/renesas/renesa= s-soc.c index 1eb52356b996bdd7..ee4f17bb4db45db7 100644 --- a/drivers/soc/renesas/renesas-soc.c +++ b/drivers/soc/renesas/renesas-soc.c @@ -5,6 +5,7 @@ * Copyright (C) 2014-2016 Glider bvba */ =20 +#include #include #include #include @@ -524,8 +525,7 @@ static int __init renesas_soc_init(void) eshi, eslo); } =20 - if (soc->id && - ((product & id->mask) >> __ffs(id->mask)) !=3D soc->id) { + if (soc->id && field_get(id->mask, product) !=3D soc->id) { pr_warn("SoC mismatch (product =3D 0x%x)\n", product); ret =3D -ENODEV; goto free_soc_dev_attr; --=20 2.43.0