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Sun, 12 Oct 2025 17:05:28 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v1 01/20] iommu: Lock group->mutex in iommu_deferred_attach() Date: Sun, 12 Oct 2025 17:04:58 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3C:EE_|IA1PR12MB6556:EE_ X-MS-Office365-Filtering-Correlation-Id: 3b9185ca-84aa-4a27-39a7-08de09ec478c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?vN3bJGBS3zeTYl+olBOIhGmJi9yfUmB5qaGsuPfMuTZcVgfm9sMXo4I9LaSK?= =?us-ascii?Q?sks4M6VCj1HGRubXgmBby7Oy4AfKFJQFTiOWV4YaOyivXdix80OUCRSDxxtH?= =?us-ascii?Q?TmuHxXuOwdHJ/4kcATM5F8fhqE1kEL0CsVW3XaQOw/MSQu/m0wO1k8FEvLqD?= =?us-ascii?Q?IvhzfpHb7I9zCExaV+tXWI4owUFCPcelqTHsMe48heLBGzuMj+fQh3COrABy?= =?us-ascii?Q?wARBbq2j6AA43s/VStsUm0VFhgSHj26/SQP/eyjI+2Y4BbZbK1WTxbFYviFK?= =?us-ascii?Q?W1kTXM6RBCGPGZvVevcXHTPpZdVOGRL6HVg9lEqWBdTuRMV//6b2HW6+Hzpe?= =?us-ascii?Q?MuCtfF0dO2b+0jlRcaZ9moNN5cI1ozl3ZRnAh+p/1n6BCcypVy2lzBcKtrDO?= =?us-ascii?Q?iyDSkQLaJStjJwDDW/2N1HwtS+Z8xodQRASMoqVSc8HlD6zvPF5JyeEjmnnc?= =?us-ascii?Q?aFOtHTjHf/jkDi9bErnB46sfFJfoWVNtLwSbY/u4mgezT2a+KyY3zx0kSPzo?= =?us-ascii?Q?uDPr19c+7jEET9bpMDizfEsFKVn8RAUw1sIHqrZETZNaxlqYVAUOus/aAJyX?= =?us-ascii?Q?GqN4jnJZoPNmi0Af17IbKq8XG5LP0/Fyv0WB8iqve/BfHjBSa5/1RgS55vvZ?= =?us-ascii?Q?+oHI7umtXQKLRhdlJDK0Go2nlXbnJAKn1T3ZoCP2AsQ0Wny1X+VQOIBszYMb?= =?us-ascii?Q?eJSRD+Q6vbnY/o+b2T/3MDF+4Rn5HRme5WUAK5ncYfqMKLa7L+AVdqShgkI7?= =?us-ascii?Q?LgZX5avVFT3Sxt0d62xFczMaXVP7dz23GZRnnnVlnDwwLB3Tu5fWx10ZSEbj?= =?us-ascii?Q?2pQRB6w7nzFPPbZd3300VjFW4dWFk1bFj1BSYlzIBNVZTqGujdxJO6bpmXuE?= =?us-ascii?Q?YwO34sSSMFZcTeEik0uektpquzTTrVLPEuFARDYMtxpUIDZOHF7h7EN1RJIV?= =?us-ascii?Q?IykmYfLTJ35o0Q+TQbjm8EzoAulv/J51Rmh7H1EvMeVjayIgnzGThJmoBj75?= =?us-ascii?Q?h8mLzaj+s8cD+jmoqYZpxixItS7dPVYw4RrSnw9BEmgCbGX8Xz9UY56OCh/4?= =?us-ascii?Q?kh1ENnSqCKgqOrr6ejq27/KhybZl/2dxTujSkYlKIZYwdtfwGdeNfhXAXT9s?= =?us-ascii?Q?Csxifs6G28tf0KcU74YFe9bIQvmVwZNwzkpRugVIspzI+1RnzZS8tu2xHMSO?= =?us-ascii?Q?bha5t/NNV+gEms/VIn/yMxlS1rI0BlPaXDIT+WR4Zw1HhVTdGbkK1pzBTpEp?= =?us-ascii?Q?w0zvgPNSu3pp1sR4YL7vW0pqbUXwtKWeiLCU6Af9EXrfT1y8PgF8LInn0pp/?= =?us-ascii?Q?26EKYigrnCDWdS54xgkxTu4vkCOPzxheg3HxlsOOuOpaSmSfnmbpDPI7QNzG?= =?us-ascii?Q?0UApKNReF3KH26hTZPomfRK4fky7K7zXUoVCSt32TKLGVfoc85lx611b94E0?= =?us-ascii?Q?5ExA8uNtvAD8aCcYWFKr7oPWxce82x5YCAJSzAyUk3nq08iZ/8+nnMGEBPRi?= =?us-ascii?Q?hB0Owwj9seGqWiHVU/VyE/SMcTUt8OlX/dH7RhoLL5YPpHnGUjQfz1/GJU1y?= =?us-ascii?Q?/u7ZM+LPpy0beowxg6g=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(7416014)(376014)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:05:54.9746 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3b9185ca-84aa-4a27-39a7-08de09ec478c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3C.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6556 Content-Type: text/plain; charset="utf-8" The iommu_deferred_attach() function invokes __iommu_attach_device() while not holding the group->mutex, like other __iommu_attach_device() callers. Though there is no pratical bug being triggered so far, it would be better to apply the same locking to this __iommu_attach_device(), since the IOMMU drivers nowaday are more aware of the group->mutex -- some of them use the iommu_group_mutex_assert() function that could be potentially in the path of an attach_dev callback function invoked by the __iommu_attach_device(). The iommu_deferred_attach() will soon need to invoke a new domain op that must be locked with __iommu_attach_device under group->mutex. So, grab the mutex to guard __iommu_attach_device() like other callers. Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- drivers/iommu/iommu.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 2ca990dfbb884..170e522b5bda4 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -2185,10 +2185,17 @@ EXPORT_SYMBOL_GPL(iommu_attach_device); =20 int iommu_deferred_attach(struct device *dev, struct iommu_domain *domain) { - if (dev->iommu && dev->iommu->attach_deferred) - return __iommu_attach_device(domain, dev, NULL); + /* + * This is called on the dma mapping fast path so avoid locking. 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:05:56.3213 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 78946808-a7f5-4dd5-b571-08de09ec4859 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3C.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6949 Content-Type: text/plain; charset="utf-8" Add a new test_dev domain op for driver to test the compatibility between a domain and a device at the driver level, before calling into the actual attachment/replacement of a domain. Support pasid for set_dev_pasid call. Move existing core-level compatibility tests to a helper function. Invoke it prior to: * __iommu_attach_device() or its wrapper __iommu_device_set_domain() * __iommu_set_group_pasid() And keep them within the group->mutex, so drivers can simply move all the sanity and compatibility tests from their attach_dev callbacks to the new test_dev callbacks without concerning about a race condition. This may be a public API someday for VFIO/IOMMUFD to run a list of attach tests without doing any actual attachment, which may result in a list of failed tests. So encourage drivers to avoid printks to prevent kernel log spam. Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen Reviewed-by: Niklas Schnelle --- include/linux/iommu.h | 17 +++++-- drivers/iommu/iommu.c | 111 ++++++++++++++++++++++++++++++------------ 2 files changed, 93 insertions(+), 35 deletions(-) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 801b2bd9e8d49..2ec99502dc29c 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -714,7 +714,12 @@ struct iommu_ops { =20 /** * struct iommu_domain_ops - domain specific operations - * @attach_dev: attach an iommu domain to a device + * @test_dev: Test compatibility prior to an @attach_dev or @set_dev_pasid= call. + * A driver-level callback of this op should do a thorough sani= ty, to + * make sure a device is compatible with the domain. So the fol= lowing + * @attach_dev and @set_dev_pasid functions would likely succee= d with + * only one exception due to a temporary failure like out of me= mory. + * It's suggested to avoid the kernel prints in this op. * Return: * * 0 - success * * EINVAL - can indicate that device and domain are incompatible due to @@ -722,11 +727,15 @@ struct iommu_ops { * driver shouldn't log an error, since it is legitimate for a * caller to test reuse of existing domains. Otherwise, it may * still represent some other fundamental problem - * * ENOMEM - out of memory - * * ENOSPC - non-ENOMEM type of resource allocation failures * * EBUSY - device is attached to a domain and cannot be changed * * ENODEV - device specific errors, not able to be attached * * - treated as ENODEV by the caller. Use is discouraged + * @attach_dev: attach an iommu domain to a device + * Return: + * * 0 - success + * * ENOMEM - out of memory + * * ENOSPC - non-ENOMEM type of resource allocation failures + * * - Use is discouraged * @set_dev_pasid: set or replace an iommu domain to a pasid of device. Th= e pasid of * the device should be left in the old config in error ca= se. * @map_pages: map a physically contiguous set of pages of the same size to @@ -751,6 +760,8 @@ struct iommu_ops { * @free: Release the domain after use. */ struct iommu_domain_ops { + int (*test_dev)(struct iommu_domain *domain, struct device *dev, + ioasid_t pasid, struct iommu_domain *old); int (*attach_dev)(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old); int (*set_dev_pasid)(struct iommu_domain *domain, struct device *dev, diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 170e522b5bda4..95f0e2898b6b5 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -99,6 +99,9 @@ static int bus_iommu_probe(const struct bus_type *bus); static int iommu_bus_notifier(struct notifier_block *nb, unsigned long action, void *data); static void iommu_release_device(struct device *dev); +static int __iommu_domain_test_device(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old); static int __iommu_attach_device(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old); static int __iommu_attach_group(struct iommu_domain *domain, @@ -642,6 +645,10 @@ static int __iommu_probe_device(struct device *dev, st= ruct list_head *group_list if (group->default_domain) iommu_create_device_direct_mappings(group->default_domain, dev); if (group->domain) { + ret =3D __iommu_domain_test_device(group->domain, dev, + IOMMU_NO_PASID, NULL); + if (ret) + goto err_remove_gdev; ret =3D __iommu_device_set_domain(group, dev, group->domain, NULL, 0); if (ret) @@ -2185,6 +2192,8 @@ EXPORT_SYMBOL_GPL(iommu_attach_device); =20 int iommu_deferred_attach(struct device *dev, struct iommu_domain *domain) { + int ret; + /* * This is called on the dma mapping fast path so avoid locking. This is * racy, but we have an expectation that the driver will setup its DMAs @@ -2195,6 +2204,10 @@ int iommu_deferred_attach(struct device *dev, struct= iommu_domain *domain) =20 guard(mutex)(&dev->iommu_group->mutex); =20 + ret =3D __iommu_domain_test_device(domain, dev, IOMMU_NO_PASID, NULL); + if (ret) + return ret; + return __iommu_attach_device(domain, dev, NULL); } =20 @@ -2262,6 +2275,53 @@ static bool domain_iommu_ops_compatible(const struct= iommu_ops *ops, return false; } =20 +/* + * Test if a future attach for a domain to the device will always fail. Th= is may + * indicate that the device and the domain are incompatible in some way. A= ctual + * attach may still fail for some temporary failure like out of memory. + * + * If pasid !=3D IOMMU_NO_PASID, it is meant to test a future set_dev_pasi= d call. + */ +static int __iommu_domain_test_device(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + const struct iommu_ops *ops =3D dev_iommu_ops(dev); + struct iommu_group *group =3D dev->iommu_group; + + lockdep_assert_held(&group->mutex); + + if (!domain_iommu_ops_compatible(ops, domain)) + return -EINVAL; + + if (pasid !=3D IOMMU_NO_PASID) { + struct group_device *gdev; + + if (!domain->ops->set_dev_pasid || !ops->blocked_domain || + !ops->blocked_domain->ops->set_dev_pasid) + return -EOPNOTSUPP; + /* + * Skip PASID validation for devices without PASID support + * (max_pasids =3D 0). These devices cannot issue transactions + * with PASID, so they don't affect group's PASID usage. + */ + for_each_group_device(group, gdev) { + if (gdev->dev->iommu->max_pasids > 0 && + pasid >=3D gdev->dev->iommu->max_pasids) + return -EINVAL; + } + } + + /* + * Domains that don't implement a test_dev callback function must have a + * simple domain attach behavior. The sanity above should be enough. + */ + if (!domain->ops->test_dev) + return 0; + + return domain->ops->test_dev(domain, dev, pasid, old); +} + static int __iommu_attach_group(struct iommu_domain *domain, struct iommu_group *group) { @@ -2272,8 +2332,7 @@ static int __iommu_attach_group(struct iommu_domain *= domain, return -EBUSY; =20 dev =3D iommu_group_first_dev(group); - if (!dev_has_iommu(dev) || - !domain_iommu_ops_compatible(dev_iommu_ops(dev), domain)) + if (!dev_has_iommu(dev)) return -EINVAL; =20 return __iommu_group_set_domain(group, domain); @@ -2381,6 +2440,13 @@ static int __iommu_group_set_domain_internal(struct = iommu_group *group, if (WARN_ON(!new_domain)) return -EINVAL; =20 + for_each_group_device(group, gdev) { + ret =3D __iommu_domain_test_device(new_domain, gdev->dev, + IOMMU_NO_PASID, group->domain); + if (ret) + return ret; + } + /* * Changing the domain is done by calling attach_dev() on the new * domain. This switch does not have to be atomic and DMA can be @@ -3479,38 +3545,19 @@ int iommu_attach_device_pasid(struct iommu_domain *= domain, { /* Caller must be a probed driver on dev */ struct iommu_group *group =3D dev->iommu_group; - struct group_device *device; - const struct iommu_ops *ops; void *entry; int ret; =20 if (!group) return -ENODEV; - - ops =3D dev_iommu_ops(dev); - - if (!domain->ops->set_dev_pasid || - !ops->blocked_domain || - !ops->blocked_domain->ops->set_dev_pasid) - return -EOPNOTSUPP; - - if (!domain_iommu_ops_compatible(ops, domain) || - pasid =3D=3D IOMMU_NO_PASID) + if (pasid =3D=3D IOMMU_NO_PASID) return -EINVAL; =20 mutex_lock(&group->mutex); - for_each_group_device(group, device) { - /* - * Skip PASID validation for devices without PASID support - * (max_pasids =3D 0). These devices cannot issue transactions - * with PASID, so they don't affect group's PASID usage. - */ - if ((device->dev->iommu->max_pasids > 0) && - (pasid >=3D device->dev->iommu->max_pasids)) { - ret =3D -EINVAL; - goto out_unlock; - } - } + + ret =3D __iommu_domain_test_device(domain, dev, pasid, NULL); + if (ret) + goto out_unlock; =20 entry =3D iommu_make_pasid_array_entry(domain, handle); =20 @@ -3573,12 +3620,7 @@ int iommu_replace_device_pasid(struct iommu_domain *= domain, =20 if (!group) return -ENODEV; - - if (!domain->ops->set_dev_pasid) - return -EOPNOTSUPP; - - if (!domain_iommu_ops_compatible(dev_iommu_ops(dev), domain) || - pasid =3D=3D IOMMU_NO_PASID || !handle) + if (pasid =3D=3D IOMMU_NO_PASID || !handle) return -EINVAL; =20 mutex_lock(&group->mutex); @@ -3615,6 +3657,11 @@ int iommu_replace_device_pasid(struct iommu_domain *= domain, ret =3D 0; =20 if (curr_domain !=3D domain) { + ret =3D __iommu_domain_test_device(domain, dev, pasid, + curr_domain); + if (ret) + goto out_unlock; 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Sun, 12 Oct 2025 17:05:34 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v1 03/20] iommu/arm-smmu-v3: Implement arm_smmu_domain_test_dev Date: Sun, 12 Oct 2025 17:05:00 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F6E:EE_|SJ2PR12MB8881:EE_ X-MS-Office365-Filtering-Correlation-Id: 8ac1a793-973b-40e7-9948-08de09ec4549 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|7416014|376014|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?xhsdQx3rW29xTC6K6kz9QpFrrlAk20RfkCnfvlQo5okLGvQyPS3yiUU+6m1J?= =?us-ascii?Q?go8yaUwEWmOjn0Ddoh+9fKpPYCclHk44OC32n9oRMERTm54xqxi9mHOwGeYT?= =?us-ascii?Q?4x/5u81B15IbmdjNKMR9gxa8f7z9MdButm4Z6QJR2iAWiVH6V7QZlJwGpoRQ?= =?us-ascii?Q?WJheR/x5rIVG484dVCM65NCq4v2YHIMVqHwzeK3tcbNHQK6dYFY1RtGPhFfk?= =?us-ascii?Q?NzwbYiQjAo1Kqq1HmR2KXvw+EEEHhdpyfso3oJxONhkOlZCoT0qfMguTEDV5?= =?us-ascii?Q?V3RfzikCVDnjni4j1mNsfBCcBFwBYwCopgu7auFRk55OdfLJXfW7xOH8aW3O?= =?us-ascii?Q?0jzrXtNpkaVw6wMK4Due6DN3lUtxihFlIQvc4Glf8+D+Z3TAcIZ+MaJiWC/K?= =?us-ascii?Q?MwZ/ESgMkgZktBqgM3ElYEGYfxUWuUeX7TURA/X8cXxmJkGcTDhWlRPwHAAK?= =?us-ascii?Q?/2KsugD5BPJDvkJFOdaEX6vAVw9XtjJCzY4V7JI2uaor18ey6HJ30LVipK/M?= =?us-ascii?Q?oyc/KSL6StVaOd/97I6qZAkjSEfcytF6xgrK76aXN6M+vZUESjfe+U27r6+A?= =?us-ascii?Q?Mj3q62CDmddVpzvi/C6/YqnSyspm+i/a9fyCGC44c4ZSSRIP6iJcl8bCwMIi?= =?us-ascii?Q?wYT4vXk7O6Z5orKJLtkF9cGMZr6RSWw8yGwW70mhbJGyxzm8ktCMOjLdl7xQ?= =?us-ascii?Q?V5iN7cyRY4eZlUZ7lopy7F2WELj/WoIebVlLBwS/C47cv/QZCgGq+QU1QOC6?= =?us-ascii?Q?HQ7+cxFqiNi4QqZPbgUYtBC63VRrWNfx4wQ9UT2F4ydLLxSYqlnyPGIeRj4o?= =?us-ascii?Q?SH8mzFNIbt305QjTI4GlNOz8FGQYKlTqp2DcjLU1P1enHCLaZPoik7hGC6NX?= =?us-ascii?Q?K7hd+jF0c82hyvwmS1hyr4dftIPBo6U1DU9C2/W3fuZ1yPKQmzG2v1P93yy8?= =?us-ascii?Q?Xgczy+dQtVXzfFMScgHEr1WSXmoyeH+ySdEgF5hJr9VmAByS0CYln3R59vy2?= =?us-ascii?Q?SkIQ3wy5PVQXiSEhHcFUa00ilr9A1+MtSWR+ybdiiQe0PQJttrCSWIle4MFb?= =?us-ascii?Q?qN7FDhR4VJlbc8j27nK2mQHNTpcC6QYu3EWrEWe+UYIwm77Y3VBjPVVFUbiA?= =?us-ascii?Q?cn7NqH2NivREWKj848d5qFocGBaY1+Xmh8TGREVnWWl8TW5RqpEkjHdRvf3o?= =?us-ascii?Q?SjfaIlAFWp0YnFByoa/F0Q9NU6XEnPBe5UZdy+Axo30Fkjivw9rKT5uT1ah4?= =?us-ascii?Q?3CsKkR92GFxksgfuCTE4iR1mdVxe+1vRBvhDwLipasdkGx68aBmPH4PrJYn5?= =?us-ascii?Q?nBuFvr0yw8t5Qao1O+WKDea45elBMFNQoVNJ43kh9x+j5ybq0PUIGHpY3RkN?= =?us-ascii?Q?gshNtTPON3uykwJK6nq6dRmLanbKEC/kI2HddLgE96ogUm+62gjcznFpffCA?= =?us-ascii?Q?QC5h3Ol026o/0cGp9YBCQIPT+lLJkg7GfwGGDi764TEj5EEP1tNOgHdUc3ZF?= =?us-ascii?Q?A8ABCw3PRINht/eGoDLgIxOdVqhHEVAmAywjj5PFkt8BWd0RKKJULwIYuF6T?= =?us-ascii?Q?hEPiLVPudpAiwixk7Tc=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(7416014)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:05:51.1083 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8ac1a793-973b-40e7-9948-08de09ec4549 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8881 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callbacks to this new test_dev callback function. The IOMMU core makes sure an attach_dev() must be invoked after a successful test_dev callback. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 2 + .../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 6 +- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 4 +- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 113 +++++++++++------- 4 files changed, 74 insertions(+), 51 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index ae23aacc38402..acb1dbc592cf0 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -963,6 +963,8 @@ void arm_smmu_write_cd_entry(struct arm_smmu_master *ma= ster, int ssid, struct arm_smmu_cd *cdptr, const struct arm_smmu_cd *target); =20 +int arm_smmu_domain_test_dev(struct iommu_domain *domain, struct device *d= ev, + ioasid_t pasid, struct iommu_domain *old_domain); int arm_smmu_set_pasid(struct arm_smmu_master *master, struct arm_smmu_domain *smmu_domain, ioasid_t pasid, struct arm_smmu_cd *cd, struct iommu_domain *old); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c b/drivers/= iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c index 313201a616991..a253f9c8bb290 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c @@ -152,11 +152,6 @@ static int arm_smmu_attach_dev_nested(struct iommu_dom= ain *domain, struct arm_smmu_ste ste; int ret; =20 - if (nested_domain->vsmmu->smmu !=3D master->smmu) - return -EINVAL; - if (arm_smmu_ssids_in_use(&master->cd_table)) - return -EBUSY; - mutex_lock(&arm_smmu_asid_lock); /* * The VM has to control the actual ATS state at the PCI device because @@ -187,6 +182,7 @@ static void arm_smmu_domain_nested_free(struct iommu_do= main *domain) } =20 static const struct iommu_domain_ops arm_smmu_nested_ops =3D { + .test_dev =3D arm_smmu_domain_test_dev, .attach_dev =3D arm_smmu_attach_dev_nested, .free =3D arm_smmu_domain_nested_free, }; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iomm= u/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 59a480974d80f..610d9e826c07e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -276,9 +276,6 @@ static int arm_smmu_sva_set_dev_pasid(struct iommu_doma= in *domain, struct arm_smmu_cd target; int ret; =20 - if (!(master->smmu->features & ARM_SMMU_FEAT_SVA)) - return -EOPNOTSUPP; - /* Prevent arm_smmu_mm_release from being called while we are attaching */ if (!mmget_not_zero(domain->mm)) return -EINVAL; @@ -319,6 +316,7 @@ static void arm_smmu_sva_domain_free(struct iommu_domai= n *domain) } =20 static const struct iommu_domain_ops arm_smmu_sva_domain_ops =3D { + .test_dev =3D arm_smmu_domain_test_dev, .set_dev_pasid =3D arm_smmu_sva_set_dev_pasid, .free =3D arm_smmu_sva_domain_free }; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index a33fbd12a0dd9..3448e55bbcdbb 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2765,9 +2765,6 @@ static int arm_smmu_enable_iopf(struct arm_smmu_maste= r *master, =20 iommu_group_mutex_assert(master->dev); =20 - if (!IS_ENABLED(CONFIG_ARM_SMMU_V3_SVA)) - return -EOPNOTSUPP; - /* * Drivers for devices supporting PRI or stall require iopf others have * device-specific fault handlers and don't need IOPF, so this is not a @@ -2776,10 +2773,6 @@ static int arm_smmu_enable_iopf(struct arm_smmu_mast= er *master, if (!master->stall_enabled) return 0; =20 - /* We're not keeping track of SIDs in fault events */ - if (master->num_streams !=3D 1) - return -EOPNOTSUPP; - if (master->iopf_refcount) { master->iopf_refcount++; master_domain->using_iopf =3D true; @@ -2937,14 +2930,6 @@ int arm_smmu_attach_prepare(struct arm_smmu_attach_s= tate *state, * one of them. */ spin_lock_irqsave(&smmu_domain->devices_lock, flags); - if (smmu_domain->enforce_cache_coherency && - !arm_smmu_master_canwbs(master)) { - spin_unlock_irqrestore(&smmu_domain->devices_lock, - flags); - ret =3D -EINVAL; - goto err_iopf; - } - if (state->ats_enabled) atomic_inc(&smmu_domain->nr_ats_masters); list_add(&master_domain->devices_elm, &smmu_domain->devices); @@ -2962,8 +2947,6 @@ int arm_smmu_attach_prepare(struct arm_smmu_attach_st= ate *state, } return 0; =20 -err_iopf: - arm_smmu_disable_iopf(master, master_domain); err_free_master_domain: kfree(master_domain); err_free_vmaster: @@ -3002,13 +2985,79 @@ void arm_smmu_attach_commit(struct arm_smmu_attach_= state *state) master->ats_enabled =3D state->ats_enabled; } =20 +int arm_smmu_domain_test_dev(struct iommu_domain *domain, struct device *d= ev, + ioasid_t pasid, struct iommu_domain *old_domain) +{ + struct arm_smmu_domain *device_domain =3D to_smmu_domain_devices(domain); + struct arm_smmu_master *master =3D dev_iommu_priv_get(dev); + + if (!dev_iommu_fwspec_get(dev)) + return -ENOENT; + + switch (domain->type) { + case IOMMU_DOMAIN_NESTED: { + struct arm_smmu_nested_domain *nested_domain =3D + to_smmu_nested_domain(domain); + + if (WARN_ON(pasid !=3D IOMMU_NO_PASID)) + return -EOPNOTSUPP; + if (nested_domain->vsmmu->smmu !=3D master->smmu) + return -EINVAL; + if (arm_smmu_ssids_in_use(&master->cd_table)) + return -EBUSY; + break; + } + case IOMMU_DOMAIN_SVA: + if (!(master->smmu->features & ARM_SMMU_FEAT_SVA)) + return -EOPNOTSUPP; + break; + default: { + struct arm_smmu_domain *smmu_domain =3D to_smmu_domain(domain); + + if (smmu_domain->smmu !=3D master->smmu) + return -EINVAL; + if (smmu_domain->stage =3D=3D ARM_SMMU_DOMAIN_S2 && + arm_smmu_ssids_in_use(&master->cd_table)) + return -EBUSY; + if (pasid !=3D IOMMU_NO_PASID) { + struct iommu_domain *sid_domain =3D + iommu_get_domain_for_dev(master->dev); + + if (smmu_domain->stage !=3D ARM_SMMU_DOMAIN_S1) + return -EINVAL; + if (!master->cd_table.in_ste && + sid_domain->type !=3D IOMMU_DOMAIN_IDENTITY && + sid_domain->type !=3D IOMMU_DOMAIN_BLOCKED) + return -EINVAL; + } + break; + } + } + + if (domain->iopf_handler) { + if (!IS_ENABLED(CONFIG_ARM_SMMU_V3_SVA)) + return -EOPNOTSUPP; + /* We're not keeping track of SIDs in fault events */ + if (master->stall_enabled && master->num_streams !=3D 1) + return -EOPNOTSUPP; + } + + if (device_domain) { + scoped_guard(spinlock_irqsave, &device_domain->devices_lock) { + if (device_domain->enforce_cache_coherency && + !arm_smmu_master_canwbs(master)) + return -EINVAL; + } + } + + return 0; +} + static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device = *dev, struct iommu_domain *old_domain) { int ret =3D 0; struct arm_smmu_ste target; - struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); - struct arm_smmu_device *smmu; struct arm_smmu_domain *smmu_domain =3D to_smmu_domain(domain); struct arm_smmu_attach_state state =3D { .old_domain =3D old_domain, @@ -3017,21 +3066,13 @@ static int arm_smmu_attach_dev(struct iommu_domain = *domain, struct device *dev, struct arm_smmu_master *master; struct arm_smmu_cd *cdptr; =20 - if (!fwspec) - return -ENOENT; - state.master =3D master =3D dev_iommu_priv_get(dev); - smmu =3D master->smmu; - - if (smmu_domain->smmu !=3D smmu) - return -EINVAL; =20 if (smmu_domain->stage =3D=3D ARM_SMMU_DOMAIN_S1) { cdptr =3D arm_smmu_alloc_cd_ptr(master, IOMMU_NO_PASID); if (!cdptr) return -ENOMEM; - } else if (arm_smmu_ssids_in_use(&master->cd_table)) - return -EBUSY; + } =20 /* * Prevent arm_smmu_share_asid() from trying to change the ASID @@ -3078,15 +3119,8 @@ static int arm_smmu_s1_set_dev_pasid(struct iommu_do= main *domain, { struct arm_smmu_domain *smmu_domain =3D to_smmu_domain(domain); struct arm_smmu_master *master =3D dev_iommu_priv_get(dev); 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:05:59.8461 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 72735675-3d61-4672-9007-08de09ec4a73 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3E.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7956 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callbacks to the new test_dev callback functions. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Following the test_dev guideline, replace dev_err with dev_dbg. Signed-off-by: Nicolin Chen --- drivers/iommu/intel/iommu.c | 66 +++++++++++++++++++++--------------- drivers/iommu/intel/nested.c | 29 +++++++++++----- drivers/iommu/intel/svm.c | 11 +++--- 3 files changed, 67 insertions(+), 39 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index f0396591cd9bb..10d422bd463a2 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -3537,6 +3537,26 @@ int paging_domain_compatible(struct iommu_domain *do= main, struct device *dev) return 0; } =20 +static int intel_iommu_test_device(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct device_domain_info *info =3D dev_iommu_priv_get(dev); + struct intel_iommu *iommu =3D info->iommu; + + if (pasid !=3D IOMMU_NO_PASID) { + if (WARN_ON_ONCE(!(domain->type & __IOMMU_DOMAIN_PAGING))) + return -EINVAL; + if (!pasid_supported(iommu) || dev_is_real_dma_subdevice(dev)) + return -EOPNOTSUPP; + if (domain->dirty_ops) + return -EINVAL; + if (context_copied(iommu, info->bus, info->devfn)) + return -EBUSY; + } + return paging_domain_compatible(domain, dev); +} + static int intel_iommu_attach_device(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old) @@ -3545,10 +3565,6 @@ static int intel_iommu_attach_device(struct iommu_do= main *domain, =20 device_block_translation(dev); =20 - ret =3D paging_domain_compatible(domain, dev); - if (ret) - return ret; - ret =3D iopf_for_domain_set(domain, dev); if (ret) return ret; @@ -4151,22 +4167,6 @@ static int intel_iommu_set_dev_pasid(struct iommu_do= main *domain, struct dev_pasid_info *dev_pasid; int ret; =20 - if (WARN_ON_ONCE(!(domain->type & __IOMMU_DOMAIN_PAGING))) - return -EINVAL; - - if (!pasid_supported(iommu) || dev_is_real_dma_subdevice(dev)) - return -EOPNOTSUPP; - - if (domain->dirty_ops) - return -EINVAL; - - if (context_copied(iommu, info->bus, info->devfn)) - return -EBUSY; - - ret =3D paging_domain_compatible(domain, dev); - if (ret) - return ret; - dev_pasid =3D domain_add_dev_pasid(domain, dev, pasid); if (IS_ERR(dev_pasid)) return PTR_ERR(dev_pasid); @@ -4178,12 +4178,9 @@ static int intel_iommu_set_dev_pasid(struct iommu_do= main *domain, if (intel_domain_is_fs_paging(dmar_domain)) ret =3D domain_setup_first_level(iommu, dmar_domain, dev, pasid, old); - else if (intel_domain_is_ss_paging(dmar_domain)) + else /* paging_domain_compatible() made sure it's ss_paging */ ret =3D domain_setup_second_level(iommu, dmar_domain, dev, pasid, old); - else if (WARN_ON(true)) - ret =3D -EINVAL; - if (ret) goto out_unwind_iopf; =20 @@ -4403,6 +4400,21 @@ static int device_setup_pass_through(struct device *= dev) context_setup_pass_through_cb, dev); } =20 +static int identity_domain_test_dev(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + if (pasid !=3D IOMMU_NO_PASID) { + struct device_domain_info *info =3D dev_iommu_priv_get(dev); + struct intel_iommu *iommu =3D info->iommu; + + if (!pasid_supported(iommu) || dev_is_real_dma_subdevice(dev)) + return -EOPNOTSUPP; + } + + return 0; +} + static int identity_domain_attach_dev(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old) @@ -4440,9 +4452,6 @@ static int identity_domain_set_dev_pasid(struct iommu= _domain *domain, struct intel_iommu *iommu =3D info->iommu; int ret; =20 - if (!pasid_supported(iommu) || dev_is_real_dma_subdevice(dev)) - return -EOPNOTSUPP; - ret =3D iopf_for_domain_replace(domain, old, dev); if (ret) return ret; @@ -4460,12 +4469,14 @@ static int identity_domain_set_dev_pasid(struct iom= mu_domain *domain, static struct iommu_domain identity_domain =3D { .type =3D IOMMU_DOMAIN_IDENTITY, .ops =3D &(const struct iommu_domain_ops) { + .test_dev =3D identity_domain_test_dev, .attach_dev =3D identity_domain_attach_dev, .set_dev_pasid =3D identity_domain_set_dev_pasid, }, }; =20 const struct iommu_domain_ops intel_fs_paging_domain_ops =3D { + .test_dev =3D intel_iommu_test_device, .attach_dev =3D intel_iommu_attach_device, .set_dev_pasid =3D intel_iommu_set_dev_pasid, .map_pages =3D intel_iommu_map_pages, @@ -4479,6 +4490,7 @@ const struct iommu_domain_ops intel_fs_paging_domain_= ops =3D { }; =20 const struct iommu_domain_ops intel_ss_paging_domain_ops =3D { + .test_dev =3D intel_iommu_test_device, .attach_dev =3D intel_iommu_attach_device, .set_dev_pasid =3D intel_iommu_set_dev_pasid, .map_pages =3D intel_iommu_map_pages, diff --git a/drivers/iommu/intel/nested.c b/drivers/iommu/intel/nested.c index 760d7aa2ade84..708b8e653d5cd 100644 --- a/drivers/iommu/intel/nested.c +++ b/drivers/iommu/intel/nested.c @@ -18,19 +18,17 @@ #include "iommu.h" #include "pasid.h" =20 -static int intel_nested_attach_dev(struct iommu_domain *domain, - struct device *dev, struct iommu_domain *old) +static int intel_nested_test_dev(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) { struct device_domain_info *info =3D dev_iommu_priv_get(dev); struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); struct intel_iommu *iommu =3D info->iommu; - unsigned long flags; - int ret =3D 0; - - device_block_translation(dev); + int ret; =20 if (iommu->agaw < dmar_domain->s2_domain->agaw) { - dev_err_ratelimited(dev, "Adjusted guest address width not compatible\n"= ); + dev_dbg_ratelimited(dev, "Adjusted guest address width not compatible\n"= ); return -ENODEV; } =20 @@ -41,10 +39,24 @@ static int intel_nested_attach_dev(struct iommu_domain = *domain, */ ret =3D paging_domain_compatible(&dmar_domain->s2_domain->domain, dev); if (ret) { - dev_err_ratelimited(dev, "s2 domain is not compatible\n"); + dev_dbg_ratelimited(dev, "s2 domain is not compatible\n"); return ret; } =20 + return 0; +} + +static int intel_nested_attach_dev(struct iommu_domain *domain, + struct device *dev, struct iommu_domain *old) +{ + struct device_domain_info *info =3D dev_iommu_priv_get(dev); + struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); + struct intel_iommu *iommu =3D info->iommu; + unsigned long flags; + int ret =3D 0; + + device_block_translation(dev); + ret =3D domain_attach_iommu(dmar_domain, iommu); if (ret) { dev_err_ratelimited(dev, "Failed to attach domain to iommu\n"); @@ -192,6 +204,7 @@ static int intel_nested_set_dev_pasid(struct iommu_doma= in *domain, } =20 static const struct iommu_domain_ops intel_nested_domain_ops =3D { + .test_dev =3D intel_nested_test_dev, .attach_dev =3D intel_nested_attach_dev, .set_dev_pasid =3D intel_nested_set_dev_pasid, .free =3D intel_nested_domain_free, diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index e147f71f91b72..5901caa4ceebc 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -145,6 +145,12 @@ static int intel_iommu_sva_supported(struct device *de= v) return 0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:02.9886 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d1bcd165-1730-4bbc-92dc-08de09ec4c53 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3C.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6356 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callbacks to the new test_dev callback functions. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Correct the errno upon malloc failure. Also, drop the function prototype of iommu_sva_set_dev_pasid() from the header and make it static, as only pasid.c uses it. Signed-off-by: Nicolin Chen --- drivers/iommu/amd/amd_iommu.h | 3 --- drivers/iommu/amd/iommu.c | 27 +++++++++++++++++++-------- drivers/iommu/amd/pasid.c | 29 +++++++++++++++++++---------- 3 files changed, 38 insertions(+), 21 deletions(-) diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h index 9b4b589a54b57..f99fa4da34996 100644 --- a/drivers/iommu/amd/amd_iommu.h +++ b/drivers/iommu/amd/amd_iommu.h @@ -52,9 +52,6 @@ struct protection_domain *protection_domain_alloc(void); struct iommu_domain *amd_iommu_domain_alloc_sva(struct device *dev, struct mm_struct *mm); void amd_iommu_domain_free(struct iommu_domain *dom); -int iommu_sva_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t pasid, - struct iommu_domain *old); void amd_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid, struct iommu_domain *domain); =20 diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index e16ad510c8c8a..dc0406427dcf8 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -70,6 +70,8 @@ int amd_iommu_max_glx_val =3D -1; */ DEFINE_IDA(pdom_ids); =20 +static int amd_iommu_test_device(struct iommu_domain *dom, struct device *= dev, + ioasid_t pasid, struct iommu_domain *old); static int amd_iommu_attach_device(struct iommu_domain *dom, struct device= *dev, struct iommu_domain *old); =20 @@ -2670,6 +2672,7 @@ static struct iommu_domain blocked_domain =3D { static struct protection_domain identity_domain; =20 static const struct iommu_domain_ops identity_domain_ops =3D { + .test_dev =3D amd_iommu_test_device, .attach_dev =3D amd_iommu_attach_device, }; =20 @@ -2686,12 +2689,26 @@ void amd_iommu_init_identity_domain(void) protection_domain_init(&identity_domain); } =20 +static int amd_iommu_test_device(struct iommu_domain *dom, struct device *= dev, + ioasid_t pasid, struct iommu_domain *old) +{ + struct amd_iommu *iommu =3D get_amd_iommu_from_dev(dev); + + /* + * Restrict to devices with compatible IOMMU hardware support + * when enforcement of dirty tracking is enabled. + */ + if (dom->dirty_ops && !amd_iommu_hd_support(iommu)) + return -EINVAL; + + return 0; +} + static int amd_iommu_attach_device(struct iommu_domain *dom, struct device= *dev, struct iommu_domain *old) { struct iommu_dev_data *dev_data =3D dev_iommu_priv_get(dev); struct protection_domain *domain =3D to_pdomain(dom); - struct amd_iommu *iommu =3D get_amd_iommu_from_dev(dev); int ret; =20 /* @@ -2703,13 +2720,6 @@ static int amd_iommu_attach_device(struct iommu_doma= in *dom, struct device *dev, =20 dev_data->defer_attach =3D false; =20 - /* - * Restrict to devices with compatible IOMMU hardware support - * when enforcement of dirty tracking is enabled. - */ - if (dom->dirty_ops && !amd_iommu_hd_support(iommu)) - return -EINVAL; - if (dev_data->domain) detach_device(dev); =20 @@ -3047,6 +3057,7 @@ const struct iommu_ops amd_iommu_ops =3D { .def_domain_type =3D amd_iommu_def_domain_type, .page_response =3D amd_iommu_page_response, .default_domain_ops =3D &(const struct iommu_domain_ops) { + .test_dev =3D amd_iommu_test_device, .attach_dev =3D amd_iommu_attach_device, .map_pages =3D amd_iommu_map_pages, .unmap_pages =3D amd_iommu_unmap_pages, diff --git a/drivers/iommu/amd/pasid.c b/drivers/iommu/amd/pasid.c index 77c8e9a91cbca..474494a66dd40 100644 --- a/drivers/iommu/amd/pasid.c +++ b/drivers/iommu/amd/pasid.c @@ -99,31 +99,39 @@ static const struct mmu_notifier_ops sva_mn =3D { .release =3D sva_mn_release, }; =20 -int iommu_sva_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t pasid, - struct iommu_domain *old) +static int iommu_sva_test_dev(struct iommu_domain *domain, struct device *= dev, + ioasid_t pasid, struct iommu_domain *old) { - struct pdom_dev_data *pdom_dev_data; - struct protection_domain *sva_pdom =3D to_pdomain(domain); struct iommu_dev_data *dev_data =3D dev_iommu_priv_get(dev); - unsigned long flags; - int ret =3D -EINVAL; =20 if (old) return -EOPNOTSUPP; =20 /* PASID zero is used for requests from the I/O device without PASID */ if (!is_pasid_valid(dev_data, pasid)) - return ret; + return -EINVAL; =20 /* Make sure PASID is enabled */ if (!is_pasid_enabled(dev_data)) - return ret; + return -EINVAL; + + return 0; +} + +static int iommu_sva_set_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct iommu_dev_data *dev_data =3D dev_iommu_priv_get(dev); + struct protection_domain *sva_pdom =3D to_pdomain(domain); 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:00.0566 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9f53487a-5098-4eee-5aa2-08de09ec4a9f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F69.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV9PR12MB9760 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu/arm-smmu.c | 116 ++++++++++++++++---------- 1 file changed, 71 insertions(+), 45 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-= smmu/arm-smmu.c index 5e690cf85ec96..5752eecc1d434 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -672,6 +672,37 @@ static int arm_smmu_alloc_context_bank(struct arm_smmu= _domain *smmu_domain, return __arm_smmu_alloc_bitmap(smmu->context_map, start, smmu->num_contex= t_banks); } =20 +static enum arm_smmu_context_fmt +arm_smmu_get_context_fmt(struct arm_smmu_domain *smmu_domain) +{ + struct arm_smmu_device *smmu =3D smmu_domain->smmu; + struct arm_smmu_cfg *cfg =3D &smmu_domain->cfg; + enum arm_smmu_context_fmt fmt =3D cfg->fmt; + + /* + * Choosing a suitable context format is even more fiddly. Until we + * grow some way for the caller to express a preference, and/or move + * the decision into the io-pgtable code where it arguably belongs, + * just aim for the closest thing to the rest of the system, and hope + * that the hardware isn't esoteric enough that we can't assume AArch64 + * support to be a superset of AArch32 support... + */ + if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_L) + fmt =3D ARM_SMMU_CTX_FMT_AARCH32_L; + if (IS_ENABLED(CONFIG_IOMMU_IO_PGTABLE_ARMV7S) && + !IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_ARM_LPAE) && + (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_S) && + (smmu_domain->stage =3D=3D ARM_SMMU_DOMAIN_S1)) + fmt =3D ARM_SMMU_CTX_FMT_AARCH32_S; + if ((IS_ENABLED(CONFIG_64BIT) || cfg->fmt =3D=3D ARM_SMMU_CTX_FMT_NONE) && + (smmu->features & (ARM_SMMU_FEAT_FMT_AARCH64_64K | + ARM_SMMU_FEAT_FMT_AARCH64_16K | + ARM_SMMU_FEAT_FMT_AARCH64_4K))) + fmt =3D ARM_SMMU_CTX_FMT_AARCH64; + + return fmt; +} + static int arm_smmu_init_domain_context(struct arm_smmu_domain *smmu_domai= n, struct arm_smmu_device *smmu, struct device *dev) @@ -712,31 +743,8 @@ static int arm_smmu_init_domain_context(struct arm_smm= u_domain *smmu_domain, if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S2)) smmu_domain->stage =3D ARM_SMMU_DOMAIN_S1; =20 - /* - * Choosing a suitable context format is even more fiddly. Until we - * grow some way for the caller to express a preference, and/or move - * the decision into the io-pgtable code where it arguably belongs, - * just aim for the closest thing to the rest of the system, and hope - * that the hardware isn't esoteric enough that we can't assume AArch64 - * support to be a superset of AArch32 support... - */ - if (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_L) - cfg->fmt =3D ARM_SMMU_CTX_FMT_AARCH32_L; - if (IS_ENABLED(CONFIG_IOMMU_IO_PGTABLE_ARMV7S) && - !IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_ARM_LPAE) && - (smmu->features & ARM_SMMU_FEAT_FMT_AARCH32_S) && - (smmu_domain->stage =3D=3D ARM_SMMU_DOMAIN_S1)) - cfg->fmt =3D ARM_SMMU_CTX_FMT_AARCH32_S; - if ((IS_ENABLED(CONFIG_64BIT) || cfg->fmt =3D=3D ARM_SMMU_CTX_FMT_NONE) && - (smmu->features & (ARM_SMMU_FEAT_FMT_AARCH64_64K | - ARM_SMMU_FEAT_FMT_AARCH64_16K | - ARM_SMMU_FEAT_FMT_AARCH64_4K))) - cfg->fmt =3D ARM_SMMU_CTX_FMT_AARCH64; - - if (cfg->fmt =3D=3D ARM_SMMU_CTX_FMT_NONE) { - ret =3D -EINVAL; - goto out_unlock; - } + cfg->fmt =3D arm_smmu_get_context_fmt(smmu_domain); + WARN_ON(cfg->fmt =3D=3D ARM_SMMU_CTX_FMT_NONE); =20 switch (smmu_domain->stage) { case ARM_SMMU_DOMAIN_S1: @@ -1165,14 +1173,11 @@ static void arm_smmu_master_install_s2crs(struct ar= m_smmu_master_cfg *cfg, } } =20 -static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device = *dev, - struct iommu_domain *old) +static int arm_smmu_test_dev(struct iommu_domain *domain, struct device *d= ev, + ioasid_t pasid, struct iommu_domain *old) { - struct arm_smmu_domain *smmu_domain =3D to_smmu_domain(domain); - struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); - struct arm_smmu_master_cfg *cfg; - struct arm_smmu_device *smmu; - int ret; + struct arm_smmu_master_cfg *cfg =3D dev_iommu_priv_get(dev); + struct arm_smmu_domain *smmu_domain; =20 /* * FIXME: The arch/arm DMA API code tries to attach devices to its own @@ -1181,11 +1186,40 @@ static int arm_smmu_attach_dev(struct iommu_domain = *domain, struct device *dev, * domains, just say no (but more politely than by dereferencing NULL). * This should be at least a WARN_ON once that's sorted. */ - cfg =3D dev_iommu_priv_get(dev); if (!cfg) return -ENODEV; =20 - smmu =3D cfg->smmu; + if (domain =3D=3D arm_smmu_ops.identity_domain || + domain =3D=3D arm_smmu_ops.blocked_domain) + return 0; + + smmu_domain =3D to_smmu_domain(domain); + scoped_guard(mutex, &smmu_domain->init_mutex) { + /* arm_smmu_init_domain_context() will initialize it */ + if (!smmu_domain->smmu) + return 0; + /* + * Sanity check the domain. We don't support domains across + * different SMMUs. + */ + if (smmu_domain->smmu !=3D cfg->smmu) + return -EINVAL; + if (arm_smmu_get_context_fmt(smmu_domain) =3D=3D + ARM_SMMU_CTX_FMT_NONE) + return -EINVAL; + } + + return 0; +} + +static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device = *dev, + struct iommu_domain *old) +{ + struct arm_smmu_domain *smmu_domain =3D to_smmu_domain(domain); + struct arm_smmu_master_cfg *cfg =3D dev_iommu_priv_get(dev); + struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); + struct arm_smmu_device *smmu =3D cfg->smmu; + int ret; =20 ret =3D arm_smmu_rpm_get(smmu); if (ret < 0) @@ -1196,15 +1230,6 @@ static int arm_smmu_attach_dev(struct iommu_domain *= domain, struct device *dev, if (ret < 0) goto rpm_put; =20 - /* - * Sanity check the domain. We don't support domains across - * different SMMUs. - */ - if (smmu_domain->smmu !=3D smmu) { - ret =3D -EINVAL; - goto rpm_put; - } - /* Looks ok, so add the device to the domain */ arm_smmu_master_install_s2crs(cfg, S2CR_TYPE_TRANS, smmu_domain->cfg.cbndx, fwspec); @@ -1221,8 +1246,6 @@ static int arm_smmu_attach_dev_type(struct device *de= v, struct arm_smmu_device *smmu; int ret; =20 - if (!cfg) - return -ENODEV; smmu =3D cfg->smmu; =20 ret =3D arm_smmu_rpm_get(smmu); @@ -1242,6 +1265,7 @@ static int arm_smmu_attach_dev_identity(struct iommu_= domain *domain, } =20 static const struct iommu_domain_ops arm_smmu_identity_ops =3D { + .test_dev =3D arm_smmu_test_dev, .attach_dev =3D arm_smmu_attach_dev_identity, }; =20 @@ -1258,6 +1282,7 @@ static int arm_smmu_attach_dev_blocked(struct iommu_d= omain *domain, } =20 static const struct iommu_domain_ops arm_smmu_blocked_ops =3D { + .test_dev =3D arm_smmu_test_dev, .attach_dev =3D arm_smmu_attach_dev_blocked, }; =20 @@ -1647,6 +1672,7 @@ static const struct iommu_ops arm_smmu_ops =3D { .def_domain_type =3D arm_smmu_def_domain_type, .owner =3D THIS_MODULE, .default_domain_ops =3D &(const struct iommu_domain_ops) { + .test_dev =3D arm_smmu_test_dev, .attach_dev =3D arm_smmu_attach_dev, .map_pages =3D arm_smmu_map_pages, .unmap_pages =3D arm_smmu_unmap_pages, --=20 2.43.0 From nobody Fri Dec 19 14:03:43 2025 Received: from SN4PR2101CU001.outbound.protection.outlook.com (mail-southcentralusazon11012028.outbound.protection.outlook.com [40.93.195.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D0FF8219E8C; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:07.4880 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 00dd7a17-2c7f-414b-b769-08de09ec4f01 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3C.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB7072 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callbacks to the new test_dev callback functions. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Following the test_dev guideline, replace dev_err with dev_dbg. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu/qcom_iommu.c | 46 ++++++++++++++++++------- 1 file changed, 34 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/ar= m-smmu/qcom_iommu.c index 9222a4a48bb33..53b1c279563ba 100644 --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c @@ -359,18 +359,36 @@ static void qcom_iommu_domain_free(struct iommu_domai= n *domain) kfree(qcom_domain); } =20 -static int qcom_iommu_attach_dev(struct iommu_domain *domain, - struct device *dev, struct iommu_domain *old) +static int qcom_iommu_domain_test_dev(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) { struct qcom_iommu_dev *qcom_iommu =3D dev_iommu_priv_get(dev); struct qcom_iommu_domain *qcom_domain =3D to_qcom_iommu_domain(domain); - int ret; =20 if (!qcom_iommu) { - dev_err(dev, "cannot attach to IOMMU, is it on the same bus?\n"); + dev_dbg(dev, "cannot attach to IOMMU, is it on the same bus?\n"); return -ENXIO; } =20 + scoped_guard(mutex, &qcom_domain->init_mutex) { + /* + * Sanity check the domain. We don't support domains across + * different IOMMUs. + */ + if (qcom_domain->iommu && qcom_domain->iommu !=3D qcom_iommu) + return -EINVAL; + } + + return 0; +} + +static int qcom_iommu_attach_dev(struct iommu_domain *domain, + struct device *dev, struct iommu_domain *old) +{ + struct qcom_iommu_dev *qcom_iommu =3D dev_iommu_priv_get(dev); + int ret; + /* Ensure that the domain is finalized */ pm_runtime_get_sync(qcom_iommu->dev); ret =3D qcom_iommu_init_domain(domain, qcom_iommu, dev); @@ -378,13 +396,17 @@ static int qcom_iommu_attach_dev(struct iommu_domain = *domain, if (ret < 0) return ret; =20 - /* - * Sanity check the domain. We don't support domains across - * different IOMMUs. - */ - if (qcom_domain->iommu !=3D qcom_iommu) - return -EINVAL; + return 0; +} =20 +static int qcom_iommu_identity_test(struct iommu_domain *identity_domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + if (old =3D=3D identity_domain || !old) + return 0; + if (WARN_ON(!to_qcom_iommu_domain(old)->iommu)) + return -EINVAL; return 0; } =20 @@ -401,8 +423,6 @@ static int qcom_iommu_identity_attach(struct iommu_doma= in *identity_domain, return 0; =20 qcom_domain =3D to_qcom_iommu_domain(old); - if (WARN_ON(!qcom_domain->iommu)) - return -EINVAL; =20 pm_runtime_get_sync(qcom_iommu->dev); for (i =3D 0; i < fwspec->num_ids; i++) { @@ -418,6 +438,7 @@ static int qcom_iommu_identity_attach(struct iommu_doma= in *identity_domain, } =20 static struct iommu_domain_ops qcom_iommu_identity_ops =3D { + .test_dev =3D qcom_iommu_identity_test, .attach_dev =3D qcom_iommu_identity_attach, }; =20 @@ -599,6 +620,7 @@ static const struct iommu_ops qcom_iommu_ops =3D { .device_group =3D generic_device_group, .of_xlate =3D qcom_iommu_of_xlate, .default_domain_ops =3D &(const struct iommu_domain_ops) { + .test_dev =3D qcom_iommu_domain_test_dev, .attach_dev =3D qcom_iommu_attach_dev, .map_pages =3D qcom_iommu_map, .unmap_pages =3D qcom_iommu_unmap, --=20 2.43.0 From nobody Fri Dec 19 14:03:43 2025 Received: from CH4PR04CU002.outbound.protection.outlook.com (mail-northcentralusazon11013023.outbound.protection.outlook.com [40.107.201.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3FEC15539A; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:10.7766 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7becf227-8728-4d92-6f71-08de09ec50f7 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3E.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB9003 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Signed-off-by: Nicolin Chen --- drivers/iommu/riscv/iommu.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c index d9429097a2b51..6613ece2c9f41 100644 --- a/drivers/iommu/riscv/iommu.c +++ b/drivers/iommu/riscv/iommu.c @@ -1320,6 +1320,18 @@ static bool riscv_iommu_pt_supported(struct riscv_io= mmu_device *iommu, int pgd_m return false; } =20 +static int riscv_iommu_test_paging_domain(struct iommu_domain *iommu_domai= n, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct riscv_iommu_domain *domain =3D iommu_domain_to_riscv(iommu_domain); + struct riscv_iommu_device *iommu =3D dev_to_iommu(dev); + + if (!riscv_iommu_pt_supported(iommu, domain->pgd_mode)) + return -ENODEV; + return 0; +} + static int riscv_iommu_attach_paging_domain(struct iommu_domain *iommu_dom= ain, struct device *dev, struct iommu_domain *old) @@ -1329,9 +1341,6 @@ static int riscv_iommu_attach_paging_domain(struct io= mmu_domain *iommu_domain, struct riscv_iommu_info *info =3D dev_iommu_priv_get(dev); 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:05.6446 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3ed24eb3-349b-47dd-6a46-08de09ec4df3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN6PR12MB8567 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Signed-off-by: Nicolin Chen --- drivers/iommu/mtk_iommu.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index 9747ef1644138..0cfcd0d08ae64 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -704,6 +704,20 @@ static void mtk_iommu_domain_free(struct iommu_domain = *domain) kfree(to_mtk_domain(domain)); } =20 +static int mtk_iommu_test_device(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct mtk_iommu_data *data =3D dev_iommu_priv_get(dev); + int region_id; + + region_id =3D mtk_iommu_get_iova_region_id(dev, data->plat_data); + if (region_id < 0) + return region_id; + + return 0; +} + static int mtk_iommu_attach_device(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old) { @@ -716,8 +730,6 @@ static int mtk_iommu_attach_device(struct iommu_domain = *domain, int ret, region_id; =20 region_id =3D mtk_iommu_get_iova_region_id(dev, data->plat_data); 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:07.2276 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 699abd7f-dc73-43d3-1561-08de09ec4ee5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6086 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callbacks to the new test_dev callback functions. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Note the apple_dart_finalize_domain() has another caller than attach_dev so it has to duplicate the pgsize sanity too. Signed-off-by: Nicolin Chen --- drivers/iommu/apple-dart.c | 50 +++++++++++++++++++++++++++++--------- 1 file changed, 39 insertions(+), 11 deletions(-) diff --git a/drivers/iommu/apple-dart.c b/drivers/iommu/apple-dart.c index b5848770ef482..fb63dcb7462a7 100644 --- a/drivers/iommu/apple-dart.c +++ b/drivers/iommu/apple-dart.c @@ -593,9 +593,6 @@ static int apple_dart_finalize_domain(struct apple_dart= _domain *dart_domain, int ret =3D 0; int i, j; =20 - if (dart->pgsize > PAGE_SIZE) - return -EINVAL; - mutex_lock(&dart_domain->init_lock); =20 if (dart_domain->finalized) @@ -643,11 +640,6 @@ apple_dart_mod_streams(struct apple_dart_atomic_stream= _map *domain_maps, { int i, j; =20 - for (i =3D 0; i < MAX_DARTS_PER_DEVICE; ++i) { - if (domain_maps[i].dart !=3D master_maps[i].dart) - return -EINVAL; - } - for (i =3D 0; i < MAX_DARTS_PER_DEVICE; ++i) { if (!domain_maps[i].dart) break; @@ -671,6 +663,29 @@ static int apple_dart_domain_add_streams(struct apple_= dart_domain *domain, true); } =20 +static int apple_dart_test_dev_paging(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct apple_dart_domain *dart_domain =3D to_dart_domain(domain); + struct apple_dart_master_cfg *cfg =3D dev_iommu_priv_get(dev); + struct apple_dart *dart =3D cfg->stream_maps[0].dart; + + if (dart->pgsize > PAGE_SIZE) + return -EINVAL; + if (dart_domain->finalized) { + int i; + + for (i =3D 0; i < MAX_DARTS_PER_DEVICE; ++i) { + if (dart_domain->stream_maps[i].dart !=3D + cfg->stream_maps[i].dart) + return -EINVAL; + } + } + + return 0; +} + static int apple_dart_attach_dev_paging(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old) @@ -693,6 +708,17 @@ static int apple_dart_attach_dev_paging(struct iommu_d= omain *domain, return 0; } =20 +static int apple_dart_test_dev_identity(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct apple_dart_master_cfg *cfg =3D dev_iommu_priv_get(dev); + + if (!cfg->supports_bypass) + return -EINVAL; + return 0; +} + static int apple_dart_attach_dev_identity(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old) @@ -701,15 +727,13 @@ static int apple_dart_attach_dev_identity(struct iomm= u_domain *domain, struct apple_dart_stream_map *stream_map; int i; =20 - if (!cfg->supports_bypass) - return -EINVAL; - for_each_stream_map(i, cfg, stream_map) apple_dart_hw_enable_bypass(stream_map); return 0; } =20 static const struct iommu_domain_ops apple_dart_identity_ops =3D { + .test_dev =3D apple_dart_test_dev_identity, .attach_dev =3D apple_dart_attach_dev_identity, }; =20 @@ -776,8 +800,11 @@ static struct iommu_domain *apple_dart_domain_alloc_pa= ging(struct device *dev) =20 if (dev) { struct apple_dart_master_cfg *cfg =3D dev_iommu_priv_get(dev); + struct apple_dart *dart =3D cfg->stream_maps[0].dart; int ret; =20 + if (dart->pgsize > PAGE_SIZE) + return ERR_PTR(-EINVAL); ret =3D apple_dart_finalize_domain(dart_domain, cfg); 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:08.5351 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d29668f7-b0f3-4d4d-7a7a-08de09ec4fac X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6168 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Signed-off-by: Nicolin Chen --- drivers/iommu/ipmmu-vmsa.c | 38 ++++++++++++++++++++++++++------------ 1 file changed, 26 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c index 6667ecc331f01..fdbb26ec6c632 100644 --- a/drivers/iommu/ipmmu-vmsa.c +++ b/drivers/iommu/ipmmu-vmsa.c @@ -589,6 +589,30 @@ static void ipmmu_domain_free(struct iommu_domain *io_= domain) kfree(domain); } =20 +static int ipmmu_domain_test_device(struct iommu_domain *io_domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct ipmmu_vmsa_domain *domain =3D to_vmsa_domain(io_domain); + struct ipmmu_vmsa_device *mmu =3D to_ipmmu(dev); + + if (!mmu) { + dev_dbg(dev, "Cannot attach to IPMMU\n"); + return -ENXIO; + } + + scoped_guard(mutex, &domain->mutex) { + /* + * Something is wrong, we can't attach two devices using different + * IOMMUs to the same domain. + */ + if (domain->mmu && domain->mmu !=3D mmu) + return -EINVAL; + } + + return 0; +} + static int ipmmu_attach_device(struct iommu_domain *io_domain, struct device *dev, struct iommu_domain *old) { @@ -598,11 +622,6 @@ static int ipmmu_attach_device(struct iommu_domain *io= _domain, unsigned int i; int ret =3D 0; =20 - if (!mmu) { - dev_err(dev, "Cannot attach to IPMMU\n"); - return -ENXIO; - } - mutex_lock(&domain->mutex); =20 if (!domain->mmu) { @@ -616,13 +635,7 @@ static int ipmmu_attach_device(struct iommu_domain *io= _domain, dev_info(dev, "Using IPMMU context %u\n", domain->context_id); } - } else if (domain->mmu !=3D mmu) { - /* - * Something is wrong, we can't attach two devices using - * different IOMMUs to the same domain. - */ - ret =3D -EINVAL; - } else + } else /* domain->mmu =3D=3D mmu */ dev_info(dev, "Reusing IPMMU context %u\n", domain->context_id); =20 mutex_unlock(&domain->mutex); @@ -885,6 +898,7 @@ static const struct iommu_ops ipmmu_ops =3D { ? generic_device_group : generic_single_device_group, .of_xlate =3D ipmmu_of_xlate, .default_domain_ops =3D &(const struct iommu_domain_ops) { + .test_dev =3D ipmmu_domain_test_device, .attach_dev =3D ipmmu_attach_device, .map_pages =3D ipmmu_map, .unmap_pages =3D ipmmu_unmap, --=20 2.43.0 From nobody Fri Dec 19 14:03:43 2025 Received: from SN4PR0501CU005.outbound.protection.outlook.com (mail-southcentralusazon11011025.outbound.protection.outlook.com [40.93.194.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 172D1224AF2; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:09.8977 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 707bbbf8-04d5-44fc-8d33-08de09ec507c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F69.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PPF946CC24FA Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Signed-off-by: Nicolin Chen --- drivers/iommu/sun50i-iommu.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/sun50i-iommu.c b/drivers/iommu/sun50i-iommu.c index d3b190be18b5a..d7517cfb260d5 100644 --- a/drivers/iommu/sun50i-iommu.c +++ b/drivers/iommu/sun50i-iommu.c @@ -797,16 +797,21 @@ static struct iommu_domain sun50i_iommu_identity_doma= in =3D { .ops =3D &sun50i_iommu_identity_ops, }; =20 +static int sun50i_iommu_domain_test_device(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + if (!sun50i_iommu_from_dev(dev)) + return -ENODEV; + return 0; +} + static int sun50i_iommu_attach_device(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old) { struct sun50i_iommu_domain *sun50i_domain =3D to_sun50i_domain(domain); - struct sun50i_iommu *iommu; - - iommu =3D sun50i_iommu_from_dev(dev); - if (!iommu) - return -ENODEV; + struct sun50i_iommu *iommu =3D sun50i_iommu_from_dev(dev); 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:19.7447 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0b1f14b6-419a-495b-da9a-08de09ec564f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3E.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5754 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Signed-off-by: Nicolin Chen --- drivers/iommu/rockchip-iommu.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index 85f3667e797c3..89cb65f76fe52 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -959,20 +959,25 @@ static int rk_iommu_enable(struct rk_iommu *iommu) return ret; } =20 +static int rk_iommu_identity_test_dev(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + /* Allow 'virtual devices' (eg drm) to detach from domain */ + if (!rk_iommu_from_dev(dev)) + return -ENODEV; + return 0; +} + static int rk_iommu_identity_attach(struct iommu_domain *identity_domain, struct device *dev, struct iommu_domain *old) { - struct rk_iommu *iommu; + struct rk_iommu *iommu =3D rk_iommu_from_dev(dev); struct rk_iommu_domain *rk_domain; unsigned long flags; int ret; =20 - /* Allow 'virtual devices' (eg drm) to detach from domain */ - iommu =3D rk_iommu_from_dev(dev); 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:15.4873 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d5b78e84-93e9-44c5-5cf8-08de09ec53d1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6967 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Following the test_dev guideline, replace -EEXIST with -EBUSY. Signed-off-by: Nicolin Chen --- drivers/iommu/msm_iommu.c | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c index 819add75a6652..b7b21c97d1bd7 100644 --- a/drivers/iommu/msm_iommu.c +++ b/drivers/iommu/msm_iommu.c @@ -391,6 +391,31 @@ static struct iommu_device *msm_iommu_probe_device(str= uct device *dev) return &iommu->iommu; } =20 +static int msm_iommu_domain_test_dev(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct msm_iommu_dev *iommu; + + guard(spinlock_irqsave)(&msm_iommu_lock); + + list_for_each_entry(iommu, &qcom_iommu_devices, dev_node) { + struct msm_iommu_ctx_dev *master =3D list_first_entry( + &iommu->ctx_list, struct msm_iommu_ctx_dev, list); + + if (master->of_node !=3D dev->of_node) + continue; + list_for_each_entry(master, &iommu->ctx_list, list) { + if (master->num) { + dev_dbg(dev, "domain already attached"); + return -EBUSY; + } + } + } + + return 0; +} + static int msm_iommu_attach_dev(struct iommu_domain *domain, struct device= *dev, struct iommu_domain *old) { @@ -414,11 +439,6 @@ static int msm_iommu_attach_dev(struct iommu_domain *d= omain, struct device *dev, goto fail; =20 list_for_each_entry(master, &iommu->ctx_list, list) { - if (master->num) { - dev_err(dev, "domain already attached"); - ret =3D -EEXIST; - goto fail; - } master->num =3D msm_iommu_alloc_ctx(iommu->context_map, 0, iommu->ncb); @@ -695,6 +715,7 @@ static struct iommu_ops msm_iommu_ops =3D { .device_group =3D generic_device_group, .of_xlate =3D qcom_iommu_of_xlate, .default_domain_ops =3D &(const struct iommu_domain_ops) { + .test_dev =3D msm_iommu_domain_test_dev, .attach_dev =3D msm_iommu_attach_dev, .map_pages =3D msm_iommu_map, .unmap_pages =3D msm_iommu_unmap, --=20 2.43.0 From nobody Fri Dec 19 14:03:43 2025 Received: from BN1PR04CU002.outbound.protection.outlook.com (mail-eastus2azon11010032.outbound.protection.outlook.com [52.101.56.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F30B52727F0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:21.7879 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 648676e8-fa86-4032-ba1c-08de09ec5787 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3B.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4383 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Signed-off-by: Nicolin Chen --- drivers/iommu/fsl_pamu_domain.c | 50 +++++++++++++++++++++++++-------- 1 file changed, 38 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/fsl_pamu_domain.c b/drivers/iommu/fsl_pamu_domai= n.c index 9664ef9840d2c..fbdaa74936394 100644 --- a/drivers/iommu/fsl_pamu_domain.c +++ b/drivers/iommu/fsl_pamu_domain.c @@ -237,6 +237,43 @@ static int update_domain_stash(struct fsl_dma_domain *= dma_domain, u32 val) return ret; } =20 +static int fsl_pamu_domain_test_device(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct fsl_dma_domain *dma_domain =3D to_fsl_dma_domain(domain); + const u32 *liodn; + int len, i; + + /* Use LIODN of the PCI controller while attaching a PCI device. */ + if (dev_is_pci(dev)) { + /* + * make dev point to pci controller device so we can get the + * LIODN programmed by u-boot. + */ + dev =3D pci_bus_to_host(to_pci_dev(dev)->bus)->parent; + } + + liodn =3D of_get_property(dev->of_node, "fsl,liodn", &len); + if (!liodn) { + pr_debug("missing fsl,liodn property at %pOF\n", dev->of_node); + return -ENODEV; + } + + guard(spin_lock_irqsave)(&dma_domain->domain_lock); + + for (i =3D 0; i < len / sizeof(u32); i++) { + /* Ensure that LIODN value is valid */ + if (liodn[i] < PAACE_NUMBER_ENTRIES) + continue; + pr_debug("Invalid liodn %d, attach device failed for %pOF\n", + liodn[i], dev->of_node); + return -ENODEV; + } + + return 0; +} + static int fsl_pamu_attach_device(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old) { @@ -263,21 +300,9 @@ static int fsl_pamu_attach_device(struct iommu_domain = *domain, } =20 liodn =3D of_get_property(dev->of_node, "fsl,liodn", &len); - if (!liodn) { - pr_debug("missing fsl,liodn property at %pOF\n", dev->of_node); - return -ENODEV; - } =20 spin_lock_irqsave(&dma_domain->domain_lock, flags); for (i =3D 0; i < len / sizeof(u32); i++) { - /* Ensure that LIODN value is valid */ - if (liodn[i] >=3D PAACE_NUMBER_ENTRIES) { - pr_debug("Invalid liodn %d, attach device failed for %pOF\n", - liodn[i], dev->of_node); - ret =3D -ENODEV; - break; - } - attach_device(dma_domain, liodn[i], dev); ret =3D pamu_set_liodn(dma_domain, dev, liodn[i]); if (ret) @@ -434,6 +459,7 @@ static const struct iommu_ops fsl_pamu_ops =3D { .probe_device =3D fsl_pamu_probe_device, .device_group =3D fsl_pamu_device_group, .default_domain_ops =3D &(const struct iommu_domain_ops) { + .test_dev =3D fsl_pamu_domain_test_device, .attach_dev =3D fsl_pamu_attach_device, .iova_to_phys =3D fsl_pamu_iova_to_phys, .free =3D fsl_pamu_domain_free, --=20 2.43.0 From nobody Fri Dec 19 14:03:43 2025 Received: from CO1PR03CU002.outbound.protection.outlook.com (mail-westus2azon11010007.outbound.protection.outlook.com [52.101.46.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BE770274669; Mon, 13 Oct 2025 00:06:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.46.7 ARC-Seal: i=2; a=rsa-sha256; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:23.0369 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bbac575b-5806-481b-3825-08de09ec5846 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3A.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB9176 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Following the test_dev guideline, replace dev_err with dev_dbg. Signed-off-by: Nicolin Chen --- drivers/iommu/omap-iommu.c | 41 ++++++++++++++++++++++++-------------- 1 file changed, 26 insertions(+), 15 deletions(-) diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c index 9f0057ccea573..26a7803e4144f 100644 --- a/drivers/iommu/omap-iommu.c +++ b/drivers/iommu/omap-iommu.c @@ -1392,9 +1392,6 @@ static int omap_iommu_attach_init(struct device *dev, int i; =20 odomain->num_iommus =3D omap_iommu_count(dev); - if (!odomain->num_iommus) - return -ENODEV; - odomain->iommus =3D kcalloc(odomain->num_iommus, sizeof(*iommu), GFP_ATOMIC); if (!odomain->iommus) @@ -1431,6 +1428,31 @@ static void omap_iommu_detach_fini(struct omap_iommu= _domain *odomain) odomain->iommus =3D NULL; } =20 +static int omap_iommu_domain_test_dev(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct omap_iommu_arch_data *arch_data =3D dev_iommu_priv_get(dev); + struct omap_iommu_domain *omap_domain =3D to_omap_domain(domain); + + if (!arch_data || !arch_data->iommu_dev) { + dev_dbg(dev, "device doesn't have an associated iommu\n"); + return -ENODEV; + } + + scoped_guard(spinlock, &omap_domain->lock) { + /* only a single client device can be attached to a domain */ + if (omap_domain->dev) { + dev_dbg(dev, "iommu domain is already attached\n"); + return -EINVAL; + } + if (!omap_iommu_count(dev)) + return -ENODEV; + } + + return 0; +} + static int omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old) { @@ -1441,20 +1463,8 @@ static int omap_iommu_attach_dev(struct iommu_domain= *domain, int ret =3D 0; int i; =20 - if (!arch_data || !arch_data->iommu_dev) { - dev_err(dev, "device doesn't have an associated iommu\n"); - return -ENODEV; - } - spin_lock(&omap_domain->lock); =20 - /* only a single client device can be attached to a domain */ - if (omap_domain->dev) { - dev_err(dev, "iommu domain is already attached\n"); - ret =3D -EINVAL; - goto out; - } - ret =3D omap_iommu_attach_init(dev, omap_domain); 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:24.0454 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 62766a9d-148d-428f-3aae-08de09ec58e0 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3A.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB6799 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Signed-off-by: Nicolin Chen Reviewed-by: Niklas Schnelle --- drivers/iommu/s390-iommu.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/iommu/s390-iommu.c b/drivers/iommu/s390-iommu.c index 366e47978ac07..3c6141a4a1faf 100644 --- a/drivers/iommu/s390-iommu.c +++ b/drivers/iommu/s390-iommu.c @@ -694,6 +694,20 @@ static int blocking_domain_attach_device(struct iommu_= domain *domain, return 0; } =20 +static int s390_iommu_domain_test_device(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct zpci_dev *zdev =3D to_zpci_dev(dev); + + if (!zdev) + return -ENODEV; + if (WARN_ON(domain->geometry.aperture_start > zdev->end_dma || + domain->geometry.aperture_end < zdev->start_dma)) + return -EINVAL; + return 0; +} + static int s390_iommu_attach_device(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old) @@ -704,13 +718,6 @@ static int s390_iommu_attach_device(struct iommu_domai= n *domain, u8 status; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:25.0482 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b7c00cf5-9244-42ad-f1e0-08de09ec5978 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3E.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6209 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/selftest.c | 45 +++++++++++++++++++++++++------- 1 file changed, 36 insertions(+), 9 deletions(-) diff --git a/drivers/iommu/iommufd/selftest.c b/drivers/iommu/iommufd/selft= est.c index 5661d2da2b679..f9c871a280b03 100644 --- a/drivers/iommu/iommufd/selftest.c +++ b/drivers/iommu/iommufd/selftest.c @@ -58,6 +58,7 @@ enum { MOCK_PFN_HUGE_IOVA =3D _MOCK_PFN_START << 2, }; =20 +static struct iopf_queue *mock_iommu_iopf_queue; static int mock_dev_enable_iopf(struct device *dev, struct iommu_domain *d= omain); static void mock_dev_disable_iopf(struct device *dev, struct iommu_domain = *domain); =20 @@ -215,6 +216,37 @@ static inline struct selftest_obj *to_selftest_obj(str= uct iommufd_object *obj) return container_of(obj, struct selftest_obj, obj); } =20 +static int mock_domain_nop_test(struct iommu_domain *domain, struct device= *dev, + ioasid_t pasid, struct iommu_domain *old) +{ + struct mock_dev *mdev =3D to_mock_dev(dev); + + if (domain->dirty_ops && (mdev->flags & MOCK_FLAGS_DEVICE_NO_DIRTY)) + return -EINVAL; + + iommu_group_mutex_assert(dev); + if (domain->type =3D=3D IOMMU_DOMAIN_NESTED) { + struct mock_viommu *viommu =3D + to_mock_nested(domain)->mock_viommu; + unsigned long vdev_id =3D 0; + int rc; + + if (viommu) { + rc =3D iommufd_viommu_get_vdev_id(&viommu->core, dev, + &vdev_id); + if (rc) + return rc; + } + } + + if (domain->iopf_handler) { + if (!mock_iommu_iopf_queue) + return -ENODEV; + } + + return 0; +} + static int mock_domain_nop_attach(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old) { @@ -223,16 +255,13 @@ static int mock_domain_nop_attach(struct iommu_domain= *domain, unsigned long vdev_id =3D 0; int rc; =20 - if (domain->dirty_ops && (mdev->flags & MOCK_FLAGS_DEVICE_NO_DIRTY)) - return -EINVAL; - iommu_group_mutex_assert(dev); if (domain->type =3D=3D IOMMU_DOMAIN_NESTED) { new_viommu =3D to_mock_nested(domain)->mock_viommu; if (new_viommu) { rc =3D iommufd_viommu_get_vdev_id(&new_viommu->core, dev, &vdev_id); - if (rc) + if (WARN_ON(rc)) return rc; } } @@ -296,6 +325,7 @@ static int mock_domain_set_dev_pasid_nop(struct iommu_d= omain *domain, } =20 static const struct iommu_domain_ops mock_blocking_ops =3D { + .test_dev =3D mock_domain_nop_test, .attach_dev =3D mock_domain_nop_attach, .set_dev_pasid =3D mock_domain_set_dev_pasid_nop }; @@ -630,8 +660,6 @@ static bool mock_domain_capable(struct device *dev, enu= m iommu_cap cap) return false; } =20 -static struct iopf_queue *mock_iommu_iopf_queue; - static struct mock_iommu_device { struct iommu_device iommu_dev; struct completion complete; @@ -658,9 +686,6 @@ static int mock_dev_enable_iopf(struct device *dev, str= uct iommu_domain *domain) if (!domain || !domain->iopf_handler) return 0; =20 - if (!mock_iommu_iopf_queue) - return -ENODEV; - if (mdev->iopf_refcount) { mdev->iopf_refcount++; return 0; @@ -958,6 +983,7 @@ static const struct iommu_ops mock_ops =3D { .default_domain_ops =3D &(struct iommu_domain_ops){ .free =3D mock_domain_free, + .test_dev =3D mock_domain_nop_test, .attach_dev =3D mock_domain_nop_attach, .map_pages =3D mock_domain_map_pages, .unmap_pages =3D mock_domain_unmap_pages, @@ -1021,6 +1047,7 @@ mock_domain_cache_invalidate_user(struct iommu_domain= *domain, =20 static struct iommu_domain_ops domain_nested_ops =3D { .free =3D mock_domain_free_nested, + .test_dev =3D mock_domain_nop_test, .attach_dev =3D mock_domain_nop_attach, .cache_invalidate_user =3D mock_domain_cache_invalidate_user, .set_dev_pasid =3D mock_domain_set_dev_pasid_nop, --=20 2.43.0 From nobody Fri Dec 19 14:03:43 2025 Received: from SN4PR2101CU001.outbound.protection.outlook.com (mail-southcentralusazon11012071.outbound.protection.outlook.com [40.93.195.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 638D02F1FC9; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:28.4377 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b2ff0e49-a48a-4535-974a-08de09ec5b89 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F69.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY3PR12MB9703 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Signed-off-by: Nicolin Chen --- drivers/iommu/virtio-iommu.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/virtio-iommu.c b/drivers/iommu/virtio-iommu.c index d314fa5cd8476..766dded8fc8a6 100644 --- a/drivers/iommu/virtio-iommu.c +++ b/drivers/iommu/virtio-iommu.c @@ -730,6 +730,18 @@ static struct iommu_domain *viommu_domain_alloc_identi= ty(struct device *dev) return domain; } =20 +static int viommu_domain_test_dev(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct viommu_endpoint *vdev =3D dev_iommu_priv_get(dev); + struct viommu_domain *vdomain =3D to_viommu_domain(domain); + + if (vdomain->viommu !=3D vdev->viommu) + return -EINVAL; + return 0; +} + static int viommu_attach_dev(struct iommu_domain *domain, struct device *d= ev, struct iommu_domain *old) { @@ -738,9 +750,6 @@ static int viommu_attach_dev(struct iommu_domain *domai= n, struct device *dev, struct viommu_endpoint *vdev =3D dev_iommu_priv_get(dev); struct viommu_domain *vdomain =3D to_viommu_domain(domain); =20 - if (vdomain->viommu !=3D vdev->viommu) - return -EINVAL; - /* * In the virtio-iommu device, when attaching the endpoint to a new * domain, it is detached from the old one and, if as a result the @@ -1099,6 +1108,7 @@ static const struct iommu_ops viommu_ops =3D { .of_xlate =3D viommu_of_xlate, .owner =3D THIS_MODULE, .default_domain_ops =3D &(const struct iommu_domain_ops) { + .test_dev =3D viommu_domain_test_dev, .attach_dev =3D viommu_attach_dev, .map_pages =3D viommu_map_pages, .unmap_pages =3D viommu_unmap_pages, --=20 2.43.0 From nobody Fri Dec 19 14:03:43 2025 Received: from PH0PR06CU001.outbound.protection.outlook.com (mail-westus3azon11011005.outbound.protection.outlook.com [40.107.208.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2AFF32F25E8; Mon, 13 Oct 2025 00:06:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:30.8053 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d9bb0a35-4e89-446e-67cf-08de09ec5ce7 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3C.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY3PR12MB9704 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callback to the new test_dev callback function. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Signed-off-by: Nicolin Chen --- drivers/iommu/tegra-smmu.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 336e0a3ff41fb..cfbe67678a426 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -489,6 +489,18 @@ static void tegra_smmu_as_unprepare(struct tegra_smmu = *smmu, mutex_unlock(&smmu->lock); } =20 +static int tegra_smmu_domain_test_dev(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); + + if (!fwspec || !fwspec->num_ids) + return -ENOENT; + + return 0; +} + static int tegra_smmu_attach_dev(struct iommu_domain *domain, struct device *dev, struct iommu_domain *old) { @@ -498,9 +510,6 @@ static int tegra_smmu_attach_dev(struct iommu_domain *d= omain, unsigned int index; int err; =20 - if (!fwspec) - return -ENOENT; - for (index =3D 0; index < fwspec->num_ids; index++) { err =3D tegra_smmu_as_prepare(smmu, as); if (err) @@ -509,9 +518,6 @@ static int tegra_smmu_attach_dev(struct iommu_domain *d= omain, tegra_smmu_enable(smmu, fwspec->ids[index], as->id); } =20 - if (index =3D=3D 0) - return -ENODEV; - return 0; =20 disable: @@ -532,9 +538,6 @@ static int tegra_smmu_identity_attach(struct iommu_doma= in *identity_domain, struct tegra_smmu *smmu; unsigned int index; =20 - if (!fwspec) - return -ENODEV; - if (old =3D=3D identity_domain || !old) return 0; =20 @@ -548,6 +551,7 @@ static int tegra_smmu_identity_attach(struct iommu_doma= in *identity_domain, } =20 static struct iommu_domain_ops tegra_smmu_identity_ops =3D { + .test_dev =3D tegra_smmu_domain_test_dev, .attach_dev =3D tegra_smmu_identity_attach, }; =20 @@ -1005,6 +1009,7 @@ static const struct iommu_ops tegra_smmu_ops =3D { .device_group =3D tegra_smmu_device_group, .of_xlate =3D tegra_smmu_of_xlate, .default_domain_ops =3D &(const struct iommu_domain_ops) { + .test_dev =3D tegra_smmu_domain_test_dev, .attach_dev =3D tegra_smmu_attach_dev, .map_pages =3D tegra_smmu_map, .unmap_pages =3D tegra_smmu_unmap, --=20 2.43.0