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Mon, 15 Sep 2025 15:16:22 -0700 (PDT) From: Marilene Andrade Garcia To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Marilene Andrade Garcia , Kim Seer Paller , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marcelo Schmitt , Marcelo Schmitt , Ceclan Dumitru , Jonathan Santos , Dragos Bogdan Subject: [PATCH v11 1/3] dt-bindings: iio: adc: add max14001 Date: Mon, 15 Sep 2025 19:16:12 -0300 Message-Id: <30f33a64da0339eccc1474406afb2b1d02a0cd6b.1757971454.git.marilene.agarcia@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add device-tree documentation for MAX14001/MAX14002 ADCs. The MAX14001/MAX14002 are isolated, single-channel analog-to-digital converters with programmable voltage comparators and inrush current control optimized for configurable binary input applications. They share the same features, but in the MAX14001 the inrush trigger threshold, current magnitude, and current duration are all programmable, whereas in the MAX14002 these parameters are fixed. Co-developed-by: Kim Seer Paller Signed-off-by: Kim Seer Paller Signed-off-by: Marilene Andrade Garcia --- I have addressed almost all of the comments, thank you very much for the=20 review. I would like to highlight some of them: Changes since v10: - Changed the name to refin-supply. - Added interrupt-names property. - Added minItems in the interrupt property and shortened the descriptions. - Added the fallback in the compatible property. Change I was not able to do: - Add the spi-lsb-first required property, even though I totally agree that it needs to be used. However, the SPI controller that I am using does not support SPI_LSB_FIRST, and this was leading to errors. Therefore, I suggest keeping it without the property for now and using bitrev16 in the driver code. As soon as I finish working on this driver, I intend to submit patches to the SPI kernel code to handle bit reverse operation when the SPI controller does not support it. Once that is integrated into the kernel, I will update the driver code accordingly; I have left a TODO message in the ADC driver code about it. Notes: Since v10, I have not used exactly the same approach as Kim did in v9, nor=20 the same approach as in my v1. Instead, I merged both implementations, and=20 this v11 is quite different from both. Therefore, I have dropped the review=20 by Krzysztof Kozlowski. I am not very familiar with the kernel=E2=80=99s re= view=20 process, should I add it back? Should I list your names as Reviewed-by?=20 Thanks. The MAX14001 and MAX14002 both have the COUT output pin and the FAULT output pin, and work the same. I have decided to declare them as interrupts because I think some action should be done when they are hit. However, the implementation of these features is not present in the v11 driver code, as it was not in v9. But I plan to submit it in the next steps. .../bindings/iio/adc/adi,max14001.yaml | 87 +++++++++++++++++++ MAINTAINERS | 8 ++ 2 files changed, 95 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,max14001.= yaml diff --git a/Documentation/devicetree/bindings/iio/adc/adi,max14001.yaml b/= Documentation/devicetree/bindings/iio/adc/adi,max14001.yaml new file mode 100644 index 000000000000..c61119b16cf5 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,max14001.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023-2025 Analog Devices Inc. +# Copyright 2023 Kim Seer Paller +# Copyright 2025 Marilene Andrade Garcia +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,max14001.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices MAX14001-MAX14002 ADC + +maintainers: + - Kim Seer Paller + - Marilene Andrade Garcia + +description: | + Single channel 10 bit ADC with SPI interface. + Datasheet can be found here + https://www.analog.com/media/en/technical-documentation/data-sheets/= MAX14001-MAX14002.pdf + +$ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + oneOf: + - const: adi,max14002 + - items: + - const: adi,max14001 + - const: adi,max14002 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 5000000 + + vdd-supply: + description: + Isolated DC-DC power supply input voltage. + + vddl-supply: + description: + Logic power supply. + + refin-supply: + description: + ADC voltage reference supply. + + interrupts: + minItems: 1 + items: + - description: | + Asserts high when ADC readings exceed the upper threshold and low + when below the lower threshold. Must be connected to the COUT pi= n. + - description: | + Alert output that asserts low during a number of different error + conditions. The interrupt source must be attached to FAULT pin. + + interrupt-names: + minItems: 1 + items: + - const: cout + - const: fault + +required: + - compatible + - reg + - vdd-supply + - vddl-supply + +unevaluatedProperties: false + +examples: + - | + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + max14001: adc@0 { + compatible =3D "adi,max14001", "adi,max14002"; + reg =3D <0>; + spi-max-frequency =3D <5000000>; + vdd-supply =3D <&vdd>; + vddl-supply =3D <&vddl>; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index d53a536288ca..0bae420caa63 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14991,6 +14991,14 @@ S: Maintained F: Documentation/devicetree/bindings/sound/max9860.txt F: sound/soc/codecs/max9860.* =20 +MAX14001/MAX14002 IIO ADC DRIVER +M: Kim Seer Paller +M: Marilene Andrade Garcia +L: linux-iio@vger.kernel.org +S: Maintained +W: https://ez.analog.com/linux-software-drivers +F: Documentation/devicetree/bindings/iio/adc/adi,max14001.yaml + MAXBOTIX ULTRASONIC RANGER IIO DRIVER M: Andreas Klinger L: linux-iio@vger.kernel.org --=20 2.34.1 From nobody Thu Oct 2 14:10:16 2025 Received: from mail-pj1-f45.google.com (mail-pj1-f45.google.com [209.85.216.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8FC321CC4D for ; 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charset="utf-8" The MAX14001/MAX14002 is configurable, isolated 10-bit ADCs for multi-range binary inputs. In addition to ADC readings, the MAX14001/MAX14002 offers more features, like a binary comparator, a filtered reading that can provide the average of the last 2, 4, or 8 ADC readings, and an inrush comparator that triggers the inrush current. There is also a fault feature that can diagnose seven possible fault conditions. And an option to select an external or internal ADC voltage reference. MAX14001/MAX14002 features implemented so far: - Raw ADC reading. - Filtered ADC average reading with the default configuration. - MV fault disable. - Selection of external or internal ADC voltage reference, depending on whether it is declared in the device tree. Co-developed-by: Kim Seer Paller Signed-off-by: Kim Seer Paller Signed-off-by: Marilene Andrade Garcia --- I have addressed almost all of the comments, thank you very much for the=20 review. I would like to highlight some of them: Changes since v10: - Dropped the kernel.h include - Add the cleanup.h, mutex.h, regmap.h and units.h includes - Renamed the reg_addr variable name to reg - Renamed the reg_data variable name to val - Added the regmap implementation - Used scoped_guard() - Refactored the get refin voltage code - Replace max14001_chip_model with data structures separated - Added debugfs_reg_access Change I was not able to do: - I could not remove bitrev16 because I am using an SPI controller that does not support SPI_LSB_FIRST. So I suggest keeping bitrev16 and not using the spi-lsb-first devicetree property for now, since this driver currently works for both types of controllers: those that support it and those that do not. I left a TODO comment to address this issue as soon as the SPI kernel code starts handling the bit-reverse operation for controllers that do not have this support. Once I finish my work on this driver, if the SPI code still does not include this handling, I can submit patches to add it. MAINTAINERS | 1 + drivers/iio/adc/Kconfig | 10 ++ drivers/iio/adc/Makefile | 1 + drivers/iio/adc/max14001.c | 356 +++++++++++++++++++++++++++++++++++++ 4 files changed, 368 insertions(+) create mode 100644 drivers/iio/adc/max14001.c diff --git a/MAINTAINERS b/MAINTAINERS index 0bae420caa63..a9cf93ba8b21 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14998,6 +14998,7 @@ L: linux-iio@vger.kernel.org S: Maintained W: https://ez.analog.com/linux-software-drivers F: Documentation/devicetree/bindings/iio/adc/adi,max14001.yaml +F: drivers/iio/adc/max14001.c =20 MAXBOTIX ULTRASONIC RANGER IIO DRIVER M: Andreas Klinger diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 237fa2061329..a1f2afce60ad 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -991,6 +991,16 @@ config MAX11410 To compile this driver as a module, choose M here: the module will be called max11410. =20 +config MAX14001 + tristate "Analog Devices MAX14001/MAX14002 ADC driver" + depends on SPI + help + Say yes here to build support for Analog Devices MAX14001/MAX14002 + Configurable, Isolated 10-bit ADCs for Multi-Range Binary Inputs. + + To compile this driver as a module, choose M here: the module will be + called max14001. + config MAX1241 tristate "Maxim max1241 ADC driver" depends on SPI_MASTER diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index 611c16430621..9c4ceb527db7 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -87,6 +87,7 @@ obj-$(CONFIG_MAX11100) +=3D max11100.o obj-$(CONFIG_MAX1118) +=3D max1118.o obj-$(CONFIG_MAX11205) +=3D max11205.o obj-$(CONFIG_MAX11410) +=3D max11410.o +obj-$(CONFIG_MAX14001) +=3D max14001.o obj-$(CONFIG_MAX1241) +=3D max1241.o obj-$(CONFIG_MAX1363) +=3D max1363.o obj-$(CONFIG_MAX34408) +=3D max34408.o diff --git a/drivers/iio/adc/max14001.c b/drivers/iio/adc/max14001.c new file mode 100644 index 000000000000..2ade57970064 --- /dev/null +++ b/drivers/iio/adc/max14001.c @@ -0,0 +1,356 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +/* + * Analog Devices MAX14001/MAX14002 ADC driver + * + * Copyright (C) 2023-2025 Analog Devices Inc. + * Copyright (C) 2023 Kim Seer Paller + * Copyright (c) 2025 Marilene Andrade Garcia + * + * Datasheet: https://www.analog.com/media/en/technical-documentation/data= -sheets/MAX14001-MAX14002.pdf + */ + +/* + * TODO: + * Replace bitrev16 with SPI_LSB_FIRST once the SPI kernel code supports h= andling + * SPI controllers that lack LSB-first support. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +/* MAX14001 Registers Address */ +#define MAX14001_REG_ADC 0x00 +#define MAX14001_REG_FADC 0x01 +#define MAX14001_REG_FLAGS 0x02 +#define MAX14001_REG_FLTEN 0x03 +#define MAX14001_REG_THL 0x04 +#define MAX14001_REG_THU 0x05 +#define MAX14001_REG_INRR 0x06 +#define MAX14001_REG_INRT 0x07 +#define MAX14001_REG_INRP 0x08 +#define MAX14001_REG_CFG 0x09 +#define MAX14001_REG_ENBL 0x0A +#define MAX14001_REG_ACT 0x0B +#define MAX14001_REG_WEN 0x0C + +#define MAX14001_REG_VERIFICATION(x) ((x) + 0x10) + +#define MAX14001_REG_CFG_BIT_EXRF BIT(5) + +#define MAX14001_REG_WEN_VALUE_WRITE 0x294 + +#define MAX14001_MASK_ADDR GENMASK(15, 11) +#define MAX14001_MASK_WR BIT(10) +#define MAX14001_MASK_DATA GENMASK(9, 0) + +struct max14001_state { + const struct max14001_chip_info *chip_info; + struct spi_device *spi; + struct regmap *regmap; + int vref_mV; + /* + * lock protect against multiple concurrent accesses, RMW sequence, + * and SPI transfer. + */ + struct mutex lock; + /* + * The following buffers will be bit-reversed during device + * communication, because the device transmits and receives data + * LSB-first. + * DMA (thus cache coherency maintenance) requires the transfer + * buffers to live in their own cache lines. + */ + __be16 spi_tx_buffer __aligned(IIO_DMA_MINALIGN); + __be16 spi_rx_buffer; +}; + +struct max14001_chip_info { + const char *name; +}; + +static struct max14001_chip_info max14001_chip_info =3D { + .name =3D "max14001", +}; + +static struct max14001_chip_info max14002_chip_info =3D { + .name =3D "max14002", +}; + +static int max14001_read(void *context, unsigned int reg, unsigned int *va= l) +{ + struct max14001_state *st =3D context; + struct spi_transfer xfers[] =3D { + { + .tx_buf =3D &st->spi_tx_buffer, + .len =3D sizeof(st->spi_tx_buffer), + .cs_change =3D 1, + }, { + .rx_buf =3D &st->spi_rx_buffer, + .len =3D sizeof(st->spi_rx_buffer), + }, + }; + int ret; + + /* + * Prepare SPI transmit buffer 16 bit-value big-endian format and + * reverses bit order to align with the LSB-first input on SDI port + * in order to meet the device communication requirements. + */ + st->spi_tx_buffer =3D cpu_to_be16(bitrev16(FIELD_PREP(MAX14001_MASK_ADDR,= reg))); + + ret =3D spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); + if (ret) + return ret; + + /* + * Convert received 16-bit value from big-endian to cpu-endian format + * and reverses bit order. + */ + *val =3D FIELD_GET(MAX14001_MASK_DATA, bitrev16(be16_to_cpu(st->spi_rx_bu= ffer))); + + return 0; +} + +static int max14001_write(struct max14001_state *st, unsigned int reg, uns= igned int val) +{ + /* + * Prepare SPI transmit buffer 16 bit-value big-endian format and + * reverses bit order to align with the LSB-first input on SDI port + * in order to meet the device communication requirements. + */ + st->spi_tx_buffer =3D cpu_to_be16(bitrev16(FIELD_PREP(MAX14001_MASK_ADDR,= reg) | + FIELD_PREP(MAX14001_MASK_WR, 1) | + FIELD_PREP(MAX14001_MASK_DATA, val))); + + return spi_write(st->spi, &st->spi_tx_buffer, sizeof(st->spi_tx_buffer)); +} + +static int max14001_write_single_reg(void *context, unsigned int reg, unsi= gned int val) +{ + struct max14001_state *st =3D context; + int ret; + + /* Enable writing to the SPI register */ + ret =3D max14001_write(st, MAX14001_REG_WEN, MAX14001_REG_WEN_VALUE_WRITE= ); + if (ret) + return ret; + + /* Writing data into SPI register */ + ret =3D max14001_write(st, reg, val); + if (ret) + return ret; + + /* Disable writing to the SPI register */ + return max14001_write(st, MAX14001_REG_WEN, 0); +} + +static int max14001_write_verification_reg(struct max14001_state *st, unsi= gned int reg) +{ + unsigned int val; + int ret; + + ret =3D regmap_read(st->regmap, reg, &val); + if (ret) + return ret; + + return max14001_write(st, MAX14001_REG_VERIFICATION(reg), val); +} + +static int max14001_disable_mv_fault(struct max14001_state *st) +{ + unsigned int reg; + int ret; + + /* Enable writing to the SPI registers */ + ret =3D max14001_write(st, MAX14001_REG_WEN, MAX14001_REG_WEN_VALUE_WRITE= ); + if (ret) + return ret; + + /* + * Reads all registers and writes the values to their appropriate + * verification registers to clear the Memory Validation fault. + */ + for (reg =3D MAX14001_REG_FLTEN; reg <=3D MAX14001_REG_ENBL; reg++) { + ret =3D max14001_write_verification_reg(st, reg); + if (ret) + return ret; + } + + /* Disable writing to the SPI registers */ + return max14001_write(st, MAX14001_REG_WEN, 0); +} + +static int max14001_debugfs_reg_access(struct iio_dev *indio_dev, + unsigned int reg, unsigned int writeval, + unsigned int *readval) +{ + struct max14001_state *st =3D iio_priv(indio_dev); + + if (readval) + return regmap_read(st->regmap, reg, readval); + + return regmap_write(st->regmap, reg, writeval); +} + +static int max14001_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct max14001_state *st =3D iio_priv(indio_dev); + int ret; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + scoped_guard(mutex, &st->lock) + ret =3D regmap_read(st->regmap, MAX14001_REG_ADC, val); + if (ret) + return ret; + + return IIO_VAL_INT; + case IIO_CHAN_INFO_AVERAGE_RAW: + scoped_guard(mutex, &st->lock) + ret =3D regmap_read(st->regmap, MAX14001_REG_FADC, val); + if (ret) + return ret; + + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + *val =3D st->vref_mV; + *val2 =3D 10; + + return IIO_VAL_FRACTIONAL_LOG2; + default: + return -EINVAL; + } +} + +static const struct regmap_config max14001_regmap_config =3D { + .reg_read =3D max14001_read, + .reg_write =3D max14001_write_single_reg, +}; + +static const struct iio_info max14001_info =3D { + .read_raw =3D max14001_read_raw, + .debugfs_reg_access =3D max14001_debugfs_reg_access, +}; + +static const struct iio_chan_spec max14001_channel[] =3D { + { + .type =3D IIO_VOLTAGE, + .indexed =3D 1, + .channel =3D 0, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_AVERAGE_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + }, +}; + +static int max14001_probe(struct spi_device *spi) +{ + struct device *dev =3D &spi->dev; + struct iio_dev *indio_dev; + struct max14001_state *st; + int ret, ext_vrefin =3D 0; + + indio_dev =3D devm_iio_device_alloc(dev, sizeof(*st)); + if (!indio_dev) + return -ENOMEM; + + st =3D iio_priv(indio_dev); + st->spi =3D spi; + st->chip_info =3D spi_get_device_match_data(spi); + if (!st->chip_info) + return dev_err_probe(dev, -ENODEV, "Failed to get match data\n"); + + indio_dev->name =3D st->chip_info->name; + indio_dev->info =3D &max14001_info; + indio_dev->channels =3D max14001_channel; + indio_dev->num_channels =3D ARRAY_SIZE(max14001_channel); + indio_dev->modes =3D INDIO_DIRECT_MODE; + + st->regmap =3D devm_regmap_init(dev, NULL, st, &max14001_regmap_config); + if (IS_ERR(st->regmap)) + return dev_err_probe(dev, PTR_ERR(st->regmap), "Failed to initialize reg= map\n"); + + ret =3D devm_mutex_init(dev, &st->lock); + if (ret) + return ret; + + ret =3D devm_regulator_get_enable(dev, "vdd"); + if (ret) + return dev_err_probe(dev, ret, "Failed to enable Vdd supply\n"); + + ret =3D devm_regulator_get_enable(dev, "vddl"); + if (ret) + return dev_err_probe(dev, ret, "Failed to enable Vddl supply\n"); + + ret =3D devm_regulator_get_enable_read_voltage(dev, "refin"); + if (ret < 0 && ret !=3D -ENODEV) + return dev_err_probe(dev, ret, "Failed to get REFIN voltage\n"); + + if (ret < 0) + ret =3D 1250000; + else + ext_vrefin =3D 1; + st->vref_mV =3D ret / (MICRO / MILLI); + + if (ext_vrefin) { + /* + * Configure the MAX14001/MAX14002 to use an external voltage reference = source + * by setting the bit 5 of the configuration register + */ + ret =3D regmap_update_bits(st->regmap, MAX14001_REG_CFG, MAX14001_REG_CF= G_BIT_EXRF, MAX14001_REG_CFG_BIT_EXRF); + if (ret) + return dev_err_probe(dev, ret, "Failed to set External REFIN in Configu= ration Register\n"); + } + + ret =3D max14001_disable_mv_fault(st); + if (ret) + return dev_err_probe(dev, ret, "Failed to disable MV Fault\n"); + + return devm_iio_device_register(dev, indio_dev); +} + +static const struct spi_device_id max14001_id_table[] =3D { + { "max14001", (kernel_ulong_t)&max14001_chip_info }, + { "max14002", (kernel_ulong_t)&max14002_chip_info }, + { } +}; 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charset="utf-8" Add the missing in_voltageY_mean_raw attribute for the average of voltage measurements. Signed-off-by: Marilene Andrade Garcia --- When I use _mean_raw (IIO_CHAN_INFO_AVERAGE_RAW), I get a file called=20 in_voltageY_mean_raw, so I added it to the documentation.=20 Thanks. Documentation/ABI/testing/sysfs-bus-iio | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/te= sting/sysfs-bus-iio index 89b4740dcfa1..6dd67bd4e73d 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -422,6 +422,7 @@ Description: Scaled humidity measurement in milli percent. =20 What: /sys/bus/iio/devices/iio:deviceX/in_Y_mean_raw +What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_mean_raw KernelVersion: 3.5 Contact: linux-iio@vger.kernel.org Description: --=20 2.34.1