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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jul 2025 14:12:44.9528 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1c0f7bfe-87dd-4818-407c-08ddc860a9fe X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A6735.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7269 Content-Type: text/plain; charset="utf-8" From: Ashish Kalra Define new bit-field definitions returned by SNP_PLATFORM_STATUS command such as new capabilities like SNP_FEATURE_INFO command availability, ciphertext hiding enabled and capability. Reviewed-by: Tom Lendacky Signed-off-by: Ashish Kalra Suggested-by: Sean Christopherson --- include/uapi/linux/psp-sev.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/include/uapi/linux/psp-sev.h b/include/uapi/linux/psp-sev.h index eeb20dfb1fda..c2fd324623c4 100644 --- a/include/uapi/linux/psp-sev.h +++ b/include/uapi/linux/psp-sev.h @@ -185,6 +185,10 @@ struct sev_user_data_get_id2 { * @mask_chip_id: whether chip id is present in attestation reports or not * @mask_chip_key: whether attestation reports are signed or not * @vlek_en: VLEK (Version Loaded Endorsement Key) hashstick is loaded + * @feature_info: whether SNP_FEATURE_INFO command is available + * @rapl_dis: whether RAPL is disabled + * @ciphertext_hiding_cap: whether platform has ciphertext hiding capabili= ty + * @ciphertext_hiding_en: whether ciphertext hiding is enabled * @rsvd1: reserved * @guest_count: the number of guest currently managed by the firmware * @current_tcb_version: current TCB version @@ -200,7 +204,11 @@ struct sev_user_data_snp_status { __u32 mask_chip_id:1; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jul 2025 14:13:05.6937 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c79e4e61-5591-476f-9a4d-08ddc860b65a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A6730.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4488 Content-Type: text/plain; charset="utf-8" From: Ashish Kalra Cache the SEV platform status into sev_device structure and use this cached SEV platform status for api_major/minor/build. The platform state is unique between SEV and SNP and hence needs to be tracked independently. Remove the state field from sev_device structure and instead track SEV state from the cached SEV platform status. Suggested-by: Tom Lendacky Reviewed-by: Tom Lendacky Signed-off-by: Ashish Kalra Suggested-by: Sean Christopherson --- drivers/crypto/ccp/sev-dev.c | 22 ++++++++++++---------- drivers/crypto/ccp/sev-dev.h | 3 ++- 2 files changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index e058ba027792..528013be1c0a 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -1286,7 +1286,7 @@ static int __sev_platform_init_locked(int *error) =20 sev =3D psp_master->sev_data; =20 - if (sev->state =3D=3D SEV_STATE_INIT) + if (sev->sev_plat_status.state =3D=3D SEV_STATE_INIT) return 0; =20 __sev_platform_init_handle_tmr(sev); @@ -1318,7 +1318,7 @@ static int __sev_platform_init_locked(int *error) return rc; } =20 - sev->state =3D SEV_STATE_INIT; + sev->sev_plat_status.state =3D SEV_STATE_INIT; =20 /* Prepare for first SEV guest launch after INIT */ wbinvd_on_all_cpus(); @@ -1347,7 +1347,7 @@ static int _sev_platform_init_locked(struct sev_platf= orm_init_args *args) =20 sev =3D psp_master->sev_data; =20 - if (sev->state =3D=3D SEV_STATE_INIT) + if (sev->sev_plat_status.state =3D=3D SEV_STATE_INIT) return 0; =20 rc =3D __sev_snp_init_locked(&args->error); @@ -1384,7 +1384,7 @@ static int __sev_platform_shutdown_locked(int *error) =20 sev =3D psp->sev_data; =20 - if (sev->state =3D=3D SEV_STATE_UNINIT) + if (sev->sev_plat_status.state =3D=3D SEV_STATE_UNINIT) return 0; =20 ret =3D __sev_do_cmd_locked(SEV_CMD_SHUTDOWN, NULL, error); @@ -1394,7 +1394,7 @@ static int __sev_platform_shutdown_locked(int *error) return ret; } =20 - sev->state =3D SEV_STATE_UNINIT; + sev->sev_plat_status.state =3D SEV_STATE_UNINIT; dev_dbg(sev->dev, "SEV firmware shutdown\n"); =20 return ret; @@ -1502,7 +1502,7 @@ static int sev_ioctl_do_pek_pdh_gen(int cmd, struct s= ev_issue_cmd *argp, bool wr if (!writable) return -EPERM; =20 - if (sev->state =3D=3D SEV_STATE_UNINIT) { + if (sev->sev_plat_status.state =3D=3D SEV_STATE_UNINIT) { rc =3D sev_move_to_init_state(argp, &shutdown_required); if (rc) return rc; @@ -1551,7 +1551,7 @@ static int sev_ioctl_do_pek_csr(struct sev_issue_cmd = *argp, bool writable) data.len =3D input.length; =20 cmd: - if (sev->state =3D=3D SEV_STATE_UNINIT) { + if (sev->sev_plat_status.state =3D=3D SEV_STATE_UNINIT) { ret =3D sev_move_to_init_state(argp, &shutdown_required); if (ret) goto e_free_blob; @@ -1606,10 +1606,12 @@ static int sev_get_api_version(void) return 1; } =20 + /* Cache SEV platform status */ + sev->sev_plat_status =3D status; + sev->api_major =3D status.api_major; sev->api_minor =3D status.api_minor; sev->build =3D status.build; - sev->state =3D status.state; =20 return 0; } @@ -1837,7 +1839,7 @@ static int sev_ioctl_do_pek_import(struct sev_issue_c= md *argp, bool writable) data.oca_cert_len =3D input.oca_cert_len; =20 /* If platform is not in INIT state then transition it to INIT */ - if (sev->state !=3D SEV_STATE_INIT) { + if (sev->sev_plat_status.state !=3D SEV_STATE_INIT) { ret =3D sev_move_to_init_state(argp, &shutdown_required); if (ret) goto e_free_oca; @@ -2008,7 +2010,7 @@ static int sev_ioctl_do_pdh_export(struct sev_issue_c= md *argp, bool writable) =20 cmd: /* If platform is not in INIT state then transition it to INIT. */ - if (sev->state !=3D SEV_STATE_INIT) { + if (sev->sev_plat_status.state !=3D SEV_STATE_INIT) { if (!writable) { ret =3D -EPERM; goto e_free_cert; diff --git a/drivers/crypto/ccp/sev-dev.h b/drivers/crypto/ccp/sev-dev.h index 3e4e5574e88a..24dd8ff8afaa 100644 --- a/drivers/crypto/ccp/sev-dev.h +++ b/drivers/crypto/ccp/sev-dev.h @@ -42,7 +42,6 @@ struct sev_device { =20 struct sev_vdata *vdata; =20 - int state; unsigned int int_rcvd; wait_queue_head_t int_queue; struct sev_misc_dev *misc; @@ -57,6 +56,8 @@ struct sev_device { bool cmd_buf_backup_active; =20 bool snp_initialized; + + struct sev_user_data_status sev_plat_status; }; =20 int sev_dev_init(struct psp_device *psp); --=20 2.34.1 From nobody Mon Oct 6 13:17:36 2025 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2078.outbound.protection.outlook.com [40.107.94.78]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7C722DAFCF; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jul 2025 14:13:23.5378 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ef7c0922-5ce3-42e3-2c66-08ddc860c0fd X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A6732.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6255 Content-Type: text/plain; charset="utf-8" From: Ashish Kalra The FEATURE_INFO command provides hypervisors with a programmatic means to learn about the supported features of the currently loaded firmware. This command mimics the CPUID instruction relative to sub-leaf input and the four unsigned integer output values. To obtain information regarding the features present in the currently loaded SEV firmware, use the SNP_FEATURE_INFO command. Cache the SNP platform status and feature information from CPUID 0x8000_0024 in the sev_device structure. If SNP is enabled, utilize this cached SNP platform status for the API major, minor and build version. Reviewed-by: Tom Lendacky Signed-off-by: Ashish Kalra Suggested-by: Sean Christopherson --- drivers/crypto/ccp/sev-dev.c | 72 ++++++++++++++++++++++++++++++++++++ drivers/crypto/ccp/sev-dev.h | 3 ++ include/linux/psp-sev.h | 29 +++++++++++++++ 3 files changed, 104 insertions(+) diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index 528013be1c0a..a3941254d61f 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -233,6 +233,7 @@ static int sev_cmd_buffer_len(int cmd) case SEV_CMD_SNP_GUEST_REQUEST: return sizeof(struct sev_data_snp_guest_= request); case SEV_CMD_SNP_CONFIG: return sizeof(struct sev_user_data_snp_config); case SEV_CMD_SNP_COMMIT: return sizeof(struct sev_data_snp_commit); + case SEV_CMD_SNP_FEATURE_INFO: return sizeof(struct sev_data_snp_feature= _info); default: return 0; } =20 @@ -1073,6 +1074,67 @@ static void snp_set_hsave_pa(void *arg) wrmsrq(MSR_VM_HSAVE_PA, 0); } =20 +static int snp_get_platform_data(struct sev_device *sev, int *error) +{ + struct sev_data_snp_feature_info snp_feat_info; + struct snp_feature_info *feat_info; + struct sev_data_snp_addr buf; + struct page *page; + int rc; + + /* + * This function is expected to be called before SNP is + * initialized. + */ + if (sev->snp_initialized) + return -EINVAL; + + buf.address =3D __psp_pa(&sev->snp_plat_status); + rc =3D sev_do_cmd(SEV_CMD_SNP_PLATFORM_STATUS, &buf, error); + if (rc) { + dev_err(sev->dev, "SNP PLATFORM_STATUS command failed, ret =3D %d, error= =3D %#x\n", + rc, *error); + return rc; + } + + sev->api_major =3D sev->snp_plat_status.api_major; + sev->api_minor =3D sev->snp_plat_status.api_minor; + sev->build =3D sev->snp_plat_status.build_id; + + /* + * Do feature discovery of the currently loaded firmware, + * and cache feature information from CPUID 0x8000_0024, + * sub-function 0. + */ + if (!sev->snp_plat_status.feature_info) + return 0; + + /* + * Use dynamically allocated structure for the SNP_FEATURE_INFO + * command to ensure structure is 8-byte aligned, and does not + * cross a page boundary. + */ + page =3D alloc_page(GFP_KERNEL); + if (!page) + return -ENOMEM; + + feat_info =3D page_address(page); + snp_feat_info.length =3D sizeof(snp_feat_info); + snp_feat_info.ecx_in =3D 0; + snp_feat_info.feature_info_paddr =3D __psp_pa(feat_info); + + rc =3D sev_do_cmd(SEV_CMD_SNP_FEATURE_INFO, &snp_feat_info, error); + if (!rc) + sev->snp_feat_info_0 =3D *feat_info; + else + dev_err(sev->dev, "SNP FEATURE_INFO command failed, ret =3D %d, error = =3D %#x\n", + rc, *error); + + __free_page(page); + + return rc; +} + static int snp_filter_reserved_mem_regions(struct resource *rs, void *arg) { struct sev_data_range_list *range_list =3D arg; @@ -1599,6 +1661,16 @@ static int sev_get_api_version(void) struct sev_user_data_status status; int error =3D 0, ret; =20 + /* + * Cache SNP platform status and SNP feature information + * if SNP is available. + */ + if (cc_platform_has(CC_ATTR_HOST_SEV_SNP)) { + ret =3D snp_get_platform_data(sev, &error); + if (ret) + return 1; + } + ret =3D sev_platform_status(&status, &error); if (ret) { dev_err(sev->dev, diff --git a/drivers/crypto/ccp/sev-dev.h b/drivers/crypto/ccp/sev-dev.h index 24dd8ff8afaa..5aed2595c9ae 100644 --- a/drivers/crypto/ccp/sev-dev.h +++ b/drivers/crypto/ccp/sev-dev.h @@ -58,6 +58,9 @@ struct sev_device { bool snp_initialized; =20 struct sev_user_data_status sev_plat_status; + + struct sev_user_data_snp_status snp_plat_status; + struct snp_feature_info snp_feat_info_0; }; =20 int sev_dev_init(struct psp_device *psp); diff --git a/include/linux/psp-sev.h b/include/linux/psp-sev.h index 0f5f94137f6d..5fb6ae0f51cc 100644 --- a/include/linux/psp-sev.h +++ b/include/linux/psp-sev.h @@ -107,6 +107,7 @@ enum sev_cmd { SEV_CMD_SNP_DOWNLOAD_FIRMWARE_EX =3D 0x0CA, SEV_CMD_SNP_COMMIT =3D 0x0CB, SEV_CMD_SNP_VLEK_LOAD =3D 0x0CD, + SEV_CMD_SNP_FEATURE_INFO =3D 0x0CE, =20 SEV_CMD_MAX, }; @@ -814,6 +815,34 @@ struct sev_data_snp_commit { u32 len; } __packed; =20 +/** + * struct sev_data_snp_feature_info - SEV_SNP_FEATURE_INFO structure + * + * @length: len of the command buffer read by the PSP + * @ecx_in: subfunction index + * @feature_info_paddr : System Physical Address of the FEATURE_INFO struc= ture + */ +struct sev_data_snp_feature_info { + u32 length; + u32 ecx_in; + u64 feature_info_paddr; +} __packed; + +/** + * struct feature_info - FEATURE_INFO structure + * + * @eax: output of SNP_FEATURE_INFO command + * @ebx: output of SNP_FEATURE_INFO command + * @ecx: output of SNP_FEATURE_INFO command + * #edx: output of SNP_FEATURE_INFO command + */ +struct snp_feature_info { + u32 eax; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jul 2025 14:13:41.1016 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c78c2737-6bb0-43be-ebf2-08ddc860cb76 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A6732.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6753 Content-Type: text/plain; charset="utf-8" From: Ashish Kalra Implement an API that checks the overall feature support for SEV-SNP ciphertext hiding. This API verifies both the support of the SEV firmware for the feature and its enablement in the platform's BIOS. Reviewed-by: Tom Lendacky Signed-off-by: Ashish Kalra Suggested-by: Sean Christopherson --- drivers/crypto/ccp/sev-dev.c | 21 +++++++++++++++++++++ include/linux/psp-sev.h | 5 +++++ 2 files changed, 26 insertions(+) diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index a3941254d61f..58c9e040e9ac 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -1074,6 +1074,27 @@ static void snp_set_hsave_pa(void *arg) wrmsrq(MSR_VM_HSAVE_PA, 0); } =20 +bool sev_is_snp_ciphertext_hiding_supported(void) +{ + struct psp_device *psp =3D psp_master; + struct sev_device *sev; + + if (!psp || !psp->sev_data) + return false; + + sev =3D psp->sev_data; + + /* + * Feature information indicates if CipherTextHiding feature is + * supported by the SEV firmware and additionally platform status + * indicates if CipherTextHiding feature is enabled in the + * Platform BIOS. + */ + return ((sev->snp_feat_info_0.ecx & SNP_CIPHER_TEXT_HIDING_SUPPORTED) && + sev->snp_plat_status.ciphertext_hiding_cap); +} +EXPORT_SYMBOL_GPL(sev_is_snp_ciphertext_hiding_supported); + static int snp_get_platform_data(struct sev_device *sev, int *error) { struct sev_data_snp_feature_info snp_feat_info; diff --git a/include/linux/psp-sev.h b/include/linux/psp-sev.h index 5fb6ae0f51cc..d83185b4268b 100644 --- a/include/linux/psp-sev.h +++ b/include/linux/psp-sev.h @@ -843,6 +843,8 @@ struct snp_feature_info { u32 edx; } __packed; =20 +#define SNP_CIPHER_TEXT_HIDING_SUPPORTED BIT(3) + #ifdef CONFIG_CRYPTO_DEV_SP_PSP =20 /** @@ -986,6 +988,7 @@ void *psp_copy_user_blob(u64 uaddr, u32 len); void *snp_alloc_firmware_page(gfp_t mask); void snp_free_firmware_page(void *addr); void sev_platform_shutdown(void); +bool sev_is_snp_ciphertext_hiding_supported(void); =20 #else /* !CONFIG_CRYPTO_DEV_SP_PSP */ =20 @@ -1022,6 +1025,8 @@ static inline void snp_free_firmware_page(void *addr)= { } =20 static inline void sev_platform_shutdown(void) { } =20 +static inline bool sev_is_snp_ciphertext_hiding_supported(void) { return f= alse; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jul 2025 14:14:09.5554 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c498c03c-1640-4892-3d72-08ddc860dc6b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A6731.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB7893 Content-Type: text/plain; charset="utf-8" From: Ashish Kalra To enable ciphertext hiding, it must be specified in the SNP_INIT_EX command as part of SNP initialization. Modify the sev_platform_init_args structure, which is used as input to sev_platform_init(), to include a field that, when non-zero, indicates that ciphertext hiding should be enabled and specifies the maximum ASID that can be used for an SEV-SNP guest. Reviewed-by: Tom Lendacky Signed-off-by: Ashish Kalra Suggested-by: Sean Christopherson --- drivers/crypto/ccp/sev-dev.c | 12 +++++++++--- include/linux/psp-sev.h | 10 ++++++++-- 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c index 58c9e040e9ac..334405461657 100644 --- a/drivers/crypto/ccp/sev-dev.c +++ b/drivers/crypto/ccp/sev-dev.c @@ -1186,7 +1186,7 @@ static int snp_filter_reserved_mem_regions(struct res= ource *rs, void *arg) return 0; } =20 -static int __sev_snp_init_locked(int *error) +static int __sev_snp_init_locked(int *error, unsigned int max_snp_asid) { struct psp_device *psp =3D psp_master; struct sev_data_snp_init_ex data; @@ -1247,6 +1247,12 @@ static int __sev_snp_init_locked(int *error) } =20 memset(&data, 0, sizeof(data)); + + if (max_snp_asid) { + data.ciphertext_hiding_en =3D 1; + data.max_snp_asid =3D max_snp_asid; + } + data.init_rmp =3D 1; data.list_paddr_en =3D 1; data.list_paddr =3D __psp_pa(snp_range_list); @@ -1433,7 +1439,7 @@ static int _sev_platform_init_locked(struct sev_platf= orm_init_args *args) if (sev->sev_plat_status.state =3D=3D SEV_STATE_INIT) return 0; =20 - rc =3D __sev_snp_init_locked(&args->error); + rc =3D __sev_snp_init_locked(&args->error, args->max_snp_asid); if (rc && rc !=3D -ENODEV) return rc; =20 @@ -1516,7 +1522,7 @@ static int snp_move_to_init_state(struct sev_issue_cm= d *argp, bool *shutdown_req { int error, rc; =20 - rc =3D __sev_snp_init_locked(&error); + rc =3D __sev_snp_init_locked(&error, 0); if (rc) { argp->error =3D SEV_RET_INVALID_PLATFORM_STATE; return rc; diff --git a/include/linux/psp-sev.h b/include/linux/psp-sev.h index d83185b4268b..e0dbcb4b4fd9 100644 --- a/include/linux/psp-sev.h +++ b/include/linux/psp-sev.h @@ -748,10 +748,13 @@ struct sev_data_snp_guest_request { struct sev_data_snp_init_ex { u32 init_rmp:1; u32 list_paddr_en:1; - u32 rsvd:30; + u32 rapl_dis:1; + u32 ciphertext_hiding_en:1; + u32 rsvd:28; u32 rsvd1; u64 list_paddr; - u8 rsvd2[48]; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jul 2025 14:14:27.6264 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: adb777bf-3967-40bd-921a-08ddc860e730 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A672E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4208 Content-Type: text/plain; charset="utf-8" From: Ashish Kalra Introduce new min, max sev_es_asid and sev_snp_asid variables. The new {min,max}_{sev_es,snp}_asid variables along with existing {min,max}_sev_asid variable simplifies partitioning of the SEV and SEV-ES+ ASID space. Suggested-by: Sean Christopherson Reviewed-by: Tom Lendacky Signed-off-by: Ashish Kalra --- arch/x86/kvm/svm/sev.c | 36 +++++++++++++++++++++++++++--------- 1 file changed, 27 insertions(+), 9 deletions(-) diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index 2fbdebf79fbb..b5f4e69ff579 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -85,6 +85,10 @@ static DECLARE_RWSEM(sev_deactivate_lock); static DEFINE_MUTEX(sev_bitmap_lock); unsigned int max_sev_asid; static unsigned int min_sev_asid; +static unsigned int max_sev_es_asid; +static unsigned int min_sev_es_asid; +static unsigned int max_snp_asid; +static unsigned int min_snp_asid; static unsigned long sev_me_mask; static unsigned int nr_asids; static unsigned long *sev_asid_bitmap; @@ -173,20 +177,31 @@ static void sev_misc_cg_uncharge(struct kvm_sev_info = *sev) misc_cg_uncharge(type, sev->misc_cg, 1); } =20 -static int sev_asid_new(struct kvm_sev_info *sev) +static int sev_asid_new(struct kvm_sev_info *sev, unsigned long vm_type) { /* * SEV-enabled guests must use asid from min_sev_asid to max_sev_asid. * SEV-ES-enabled guest can use from 1 to min_sev_asid - 1. - * Note: min ASID can end up larger than the max if basic SEV support is - * effectively disabled by disallowing use of ASIDs for SEV guests. */ - unsigned int min_asid =3D sev->es_active ? 1 : min_sev_asid; - unsigned int max_asid =3D sev->es_active ? min_sev_asid - 1 : max_sev_asi= d; - unsigned int asid; + unsigned int min_asid, max_asid, asid; bool retry =3D true; int ret; =20 + if (vm_type =3D=3D KVM_X86_SNP_VM) { + min_asid =3D min_snp_asid; + max_asid =3D max_snp_asid; + } else if (sev->es_active) { + min_asid =3D min_sev_es_asid; + max_asid =3D max_sev_es_asid; + } else { + min_asid =3D min_sev_asid; + max_asid =3D max_sev_asid; + } + + /* + * The min ASID can end up larger than the max if basic SEV support is + * effectively disabled by disallowing use of ASIDs for SEV guests. + */ if (min_asid > max_asid) return -ENOTTY; =20 @@ -440,7 +455,7 @@ static int __sev_guest_init(struct kvm *kvm, struct kvm= _sev_cmd *argp, if (vm_type =3D=3D KVM_X86_SNP_VM) sev->vmsa_features |=3D SVM_SEV_FEAT_SNP_ACTIVE; =20 - ret =3D sev_asid_new(sev); + ret =3D sev_asid_new(sev, vm_type); if (ret) goto e_no_asid; =20 @@ -3042,6 +3057,9 @@ void __init sev_hardware_setup(void) if (min_sev_asid =3D=3D 1) goto out; =20 + min_sev_es_asid =3D min_snp_asid =3D 1; + max_sev_es_asid =3D max_snp_asid =3D min_sev_asid - 1; + sev_es_asid_count =3D min_sev_asid - 1; WARN_ON_ONCE(misc_cg_set_capacity(MISC_CG_RES_SEV_ES, sev_es_asid_count)); sev_es_supported =3D true; @@ -3065,11 +3083,11 @@ void __init sev_hardware_setup(void) if (boot_cpu_has(X86_FEATURE_SEV_ES)) pr_info("SEV-ES %s (ASIDs %u - %u)\n", str_enabled_disabled(sev_es_supported), - min_sev_asid > 1 ? 1 : 0, min_sev_asid - 1); + min_sev_es_asid, max_sev_es_asid); if (boot_cpu_has(X86_FEATURE_SEV_SNP)) pr_info("SEV-SNP %s (ASIDs %u - %u)\n", str_enabled_disabled(sev_snp_supported), - min_sev_asid > 1 ? 1 : 0, min_sev_asid - 1); + min_snp_asid, max_snp_asid); =20 sev_enabled =3D sev_supported; sev_es_enabled =3D sev_es_supported; --=20 2.34.1 From nobody Mon Oct 6 13:17:36 2025 Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2048.outbound.protection.outlook.com [40.107.223.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 351C62DA756; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jul 2025 14:14:47.3228 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a569ea05-6df9-4635-22ed-08ddc860f2e3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00026368.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6449 Content-Type: text/plain; charset="utf-8" From: Ashish Kalra Ciphertext hiding prevents host accesses from reading the ciphertext of SNP guest private memory. Instead of reading ciphertext, the host reads will see constant default values (0xff). The SEV ASID space is split into SEV and SEV-ES/SEV-SNP ASID ranges. Enabling ciphertext hiding further splits the SEV-ES/SEV-SNP ASID space into separate ASID ranges for SEV-ES and SEV-SNP guests. Add new module parameter to the KVM module to enable ciphertext hiding support and a user configurable system-wide maximum SNP ASID value. If the module parameter value is "max" then the complete SEV-ES/SEV-SNP ASID space is allocated to SEV-SNP guests. Suggested-by: Sean Christopherson Reviewed-by: Tom Lendacky Signed-off-by: Ashish Kalra Reviewed-by: Kim Phillips --- .../admin-guide/kernel-parameters.txt | 18 ++++++ arch/x86/kvm/svm/sev.c | 60 ++++++++++++++++++- 2 files changed, 77 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index eb2fab9bd0dc..379350d7ae19 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -2942,6 +2942,24 @@ (enabled). Disable by KVM if hardware lacks support for NPT. =20 + kvm-amd.ciphertext_hiding_asids=3D + [KVM,AMD] Ciphertext hiding prevents host accesses from reading + the ciphertext of SNP guest private memory. Instead of reading + ciphertext, the host will see constant default values (0xff). + The SEV ASID space is split into SEV and joint SEV-ES and SEV-SNP + ASID space. Ciphertext hiding further partitions the joint + SEV-ES/SEV-SNP ASID space into separate SEV-ES and SEV-SNP ASID + ranges with the SEV-SNP ASID range starting at 1. For SEV-ES/ + SEV-SNP guests the maximum ASID available is MIN_SEV_ASID - 1 + where MIN_SEV_ASID value is discovered by CPUID Fn8000_001F[EDX]. + + Format: { | "max" } + A non-zero value enables SEV-SNP ciphertext hiding feature and sets + the ASID range available for SEV-SNP guests. + A Value of "max" assigns all ASIDs available in the joint SEV-ES + and SEV-SNP ASID range to SNP guests, effectively disabling + SEV-ES. + kvm-arm.mode=3D [KVM,ARM,EARLY] Select one of KVM/arm64's modes of operation. diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index b5f4e69ff579..7ac0f0f25e68 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -59,6 +59,11 @@ static bool sev_es_debug_swap_enabled =3D true; module_param_named(debug_swap, sev_es_debug_swap_enabled, bool, 0444); static u64 sev_supported_vmsa_features; =20 +static char ciphertext_hiding_asids[16]; +module_param_string(ciphertext_hiding_asids, ciphertext_hiding_asids, + sizeof(ciphertext_hiding_asids), 0444); +MODULE_PARM_DESC(ciphertext_hiding_asids, " Enable ciphertext hiding for = SEV-SNP guests and specify the number of ASIDs to use ('max' to utilize all= available SEV-SNP ASIDs"); + #define AP_RESET_HOLD_NONE 0 #define AP_RESET_HOLD_NAE_EVENT 1 #define AP_RESET_HOLD_MSR_PROTO 2 @@ -201,6 +206,9 @@ static int sev_asid_new(struct kvm_sev_info *sev, unsig= ned long vm_type) /* * The min ASID can end up larger than the max if basic SEV support is * effectively disabled by disallowing use of ASIDs for SEV guests. + * Similarly for SEV-ES guests the min ASID can end up larger than the + * max when ciphertext hiding is enabled, effectively disabling SEV-ES + * support. */ if (min_asid > max_asid) return -ENOTTY; @@ -2269,6 +2277,7 @@ static int sev_gmem_post_populate(struct kvm *kvm, gf= n_t gfn_start, kvm_pfn_t pf ret =3D -EFAULT; goto err; } + kunmap_local(vaddr); } =20 @@ -2959,6 +2968,46 @@ static bool is_sev_snp_initialized(void) return initialized; } =20 +static bool check_and_enable_sev_snp_ciphertext_hiding(void) +{ + unsigned int ciphertext_hiding_asid_nr =3D 0; + + if (!ciphertext_hiding_asids[0]) + return false; + + if (!sev_is_snp_ciphertext_hiding_supported()) { + pr_warn("Module parameter ciphertext_hiding_asids specified but cipherte= xt hiding not supported\n"); + return false; + } + + if (isdigit(ciphertext_hiding_asids[0])) { + if (kstrtoint(ciphertext_hiding_asids, 10, &ciphertext_hiding_asid_nr)) + goto invalid_parameter; + + /* Do sanity check on user-defined ciphertext_hiding_asids */ + if (ciphertext_hiding_asid_nr >=3D min_sev_asid) { + pr_warn("Module parameter ciphertext_hiding_asids (%u) exceeds or equal= s minimum SEV ASID (%u)\n", + ciphertext_hiding_asid_nr, min_sev_asid); + return false; + } + } else if (!strcmp(ciphertext_hiding_asids, "max")) { + ciphertext_hiding_asid_nr =3D min_sev_asid - 1; + } + + if (ciphertext_hiding_asid_nr) { + max_snp_asid =3D ciphertext_hiding_asid_nr; + min_sev_es_asid =3D max_snp_asid + 1; + pr_info("SEV-SNP ciphertext hiding enabled\n"); + + return true; + } + +invalid_parameter: + pr_warn("Module parameter ciphertext_hiding_asids (%s) invalid\n", + ciphertext_hiding_asids); + return false; +} + void __init sev_hardware_setup(void) { unsigned int eax, ebx, ecx, edx, sev_asid_count, sev_es_asid_count; @@ -3068,6 +3117,13 @@ void __init sev_hardware_setup(void) out: if (sev_enabled) { init_args.probe =3D true; + /* + * The ciphertext hiding feature partitions the joint SEV-ES/SEV-SNP + * ASID range into separate SEV-ES and SEV-SNP ASID ranges with + * the SEV-SNP ASID starting at 1. + */ + if (check_and_enable_sev_snp_ciphertext_hiding()) + init_args.max_snp_asid =3D max_snp_asid; if (sev_platform_init(&init_args)) sev_supported =3D sev_es_supported =3D sev_snp_supported =3D false; else if (sev_snp_supported) @@ -3082,7 +3138,9 @@ void __init sev_hardware_setup(void) min_sev_asid, max_sev_asid); if (boot_cpu_has(X86_FEATURE_SEV_ES)) pr_info("SEV-ES %s (ASIDs %u - %u)\n", - str_enabled_disabled(sev_es_supported), + sev_es_supported ? min_sev_es_asid <=3D max_sev_es_asid ? "enabled" : + "unusable" : + "disabled", min_sev_es_asid, max_sev_es_asid); if (boot_cpu_has(X86_FEATURE_SEV_SNP)) pr_info("SEV-SNP %s (ASIDs %u - %u)\n", --=20 2.34.1