From nobody Wed Oct 8 07:40:05 2025 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB74124466B; Mon, 30 Jun 2025 21:46:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751319991; cv=none; b=XDCJrBYYSVx14J0ZstlNS56g5gVIQmf1TjEimtPqHcXv+lWBAPcFV+8B3kG5x5EzpukwIqzjFOmfuTshtFiMP7y2wHrnufAvePgiHEMuGlB3mpo6RV0LKB/VKHAZGBEHkvPnlek9wQ5x4ppT3l9nFdnvMUfgLQs5Exn/Av6o868= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751319991; c=relaxed/simple; bh=Fg4DviBc00j3x8Bp8/u11PbrJo1PGjWHakVqtqscH3g=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=F+rlS7pbW9VLz0unyGr43UoqWzwtHpwZkXTkC3rR9f+xX5fVhMpWqx/WiF6K5PNyBdM1JoPQRPbr0R3d931gW93w16TB4CfD0hvXXINi/fmLoQ/1ciZXX0/eXLmiIuMwdS258DVtwXWoHVTd+I/Jfu+Jf80JA3+Sta5ta1BoLcg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.98.2) (envelope-from ) id 1uWMKW-000000007Lx-0Ehb; Mon, 30 Jun 2025 21:46:24 +0000 Date: Mon, 30 Jun 2025 22:46:20 +0100 From: Daniel Golle To: Felix Fietkau , Frank Wunderlich , Eric Woudstra , Elad Yifee , Bo-Cun Chen , Sky Huang , Sean Wang , Lorenzo Bianconi , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net-next v3 1/3] net: ethernet: mtk_eth_soc: improve support for named interrupts Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use platform_get_irq_byname_optional() to avoid outputting error messages when using legacy device trees which rely identifying interrupts only by index. Instead, output a warning notifying the user to update their device tree. Signed-off-by: Daniel Golle Reviewed-by: Andrew Lunn --- v3: unchanged v2: unchanged drivers/net/ethernet/mediatek/mtk_eth_soc.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethe= rnet/mediatek/mtk_eth_soc.c index f8a907747db4..8f55069441f4 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c @@ -3341,17 +3341,22 @@ static int mtk_get_irqs(struct platform_device *pde= v, struct mtk_eth *eth) int i; =20 /* future SoCs beginning with MT7988 should use named IRQs in dts */ - eth->irq[MTK_FE_IRQ_TX] =3D platform_get_irq_byname(pdev, "fe1"); - eth->irq[MTK_FE_IRQ_RX] =3D platform_get_irq_byname(pdev, "fe2"); + eth->irq[MTK_FE_IRQ_TX] =3D platform_get_irq_byname_optional(pdev, "fe1"); + eth->irq[MTK_FE_IRQ_RX] =3D platform_get_irq_byname_optional(pdev, "fe2"); if (eth->irq[MTK_FE_IRQ_TX] >=3D 0 && eth->irq[MTK_FE_IRQ_RX] >=3D 0) return 0; =20 - /* only use legacy mode if platform_get_irq_byname returned -ENXIO */ + /* only use legacy mode if platform_get_irq_byname_optional returned -ENX= IO */ if (eth->irq[MTK_FE_IRQ_TX] !=3D -ENXIO) - return eth->irq[MTK_FE_IRQ_TX]; + return dev_err_probe(&pdev->dev, eth->irq[MTK_FE_IRQ_TX], + "Error requesting FE TX IRQ\n"); =20 if (eth->irq[MTK_FE_IRQ_RX] !=3D -ENXIO) - return eth->irq[MTK_FE_IRQ_RX]; + return dev_err_probe(&pdev->dev, eth->irq[MTK_FE_IRQ_RX], + "Error requesting FE RX IRQ\n"); + + if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT)) + dev_warn(&pdev->dev, "legacy DT: missing interrupt-names."); =20 /* legacy way: * On MTK_SHARED_INT SoCs (MT7621 + MT7628) the first IRQ is taken --=20 2.50.0 From nobody Wed Oct 8 07:40:05 2025 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B67C4A23; Mon, 30 Jun 2025 21:46:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751320004; cv=none; b=rDkvUOtRQ//5glmTvBBLgue6FI+FoSKq3qQfVAsY3FBQ4hJUzJ0Z5k2OM9g1SRPims0/o3dbAIh8aSs+YnUdCy1B1UkFTjvpYx8n/wfmEC+D4j4sUYgasqxthn52/ogT0cKr8UQAcNR/dFrCrtW2sdYRNfjjzvobRC0wXakp59E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751320004; c=relaxed/simple; bh=na9kxFZTHUrHRScfhIax634TeqcsdNTZh3ZBd+gwlWw=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=fj0eHpv0WqE9a6yu/Gz2p4JrQ8FtMO6axN+uDHTDPDMcjHy06moirFgkFE0sk/A43r5aA7gkUh+fGwGOHvNXWcKyaG2FvkdmpRYddMhXbnUsMhdwfF00cLCCr9E29ysV+5nBzVAhmPgYWnRaNFOBBHSQzMtWGhyD8dplf95UmJY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.98.2) (envelope-from ) id 1uWMKj-000000007MR-1X2i; Mon, 30 Jun 2025 21:46:37 +0000 Date: Mon, 30 Jun 2025 22:46:34 +0100 From: Daniel Golle To: Felix Fietkau , Frank Wunderlich , Eric Woudstra , Elad Yifee , Bo-Cun Chen , Sky Huang , Sean Wang , Lorenzo Bianconi , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net-next v3 2/3] net: ethernet: mtk_eth_soc: fix kernel-doc comment Message-ID: <4ce2fb696b94350cf54b4b623cebe4f6d3944312.1751319620.git.daniel@makrotopia.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Fix and add some missing field descriptions to kernel-doc comment of struct mtk_eth. Signed-off-by: Daniel Golle Reviewed-by: Andrew Lunn --- v3: unchanged v2: unchanged drivers/net/ethernet/mediatek/mtk_eth_soc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethe= rnet/mediatek/mtk_eth_soc.h index 9261c0e13b59..1ad9075a9b69 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h @@ -1243,8 +1243,9 @@ struct mtk_soc_data { /* struct mtk_eth - This is the main datasructure for holding the state * of the driver * @dev: The device pointer - * @dev: The device pointer used for dma mapping/alloc + * @dma_dev: The device pointer used for dma mapping/alloc * @base: The mapped register i/o base + * @sram_base: The mapped SRAM base * @page_lock: Make sure that register operations are atomic * @tx_irq__lock: Make sure that IRQ register operations are atomic * @rx_irq__lock: Make sure that IRQ register operations are atomic --=20 2.50.0 From nobody Wed Oct 8 07:40:05 2025 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E4D922FF2D; Mon, 30 Jun 2025 21:47:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751320032; cv=none; b=FUouaNsun5AjYZmX7ZkZfxYPX7/ISk7NBclm6/WJsNcfrF+AqIV9IGhYzCEK1AKgXGgN5uMpLVvrKNkApHpRaZ6CJgAdjp5M/PmoP1rpFYlhtqfJH9P//HbqPKvJRbtHw5vYB5JUm9JYhpv4TDREHH9kocdgtHB0fu2sCnTtNhM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751320032; c=relaxed/simple; bh=AURy5RoiCD0K69XxdYzpmhF+JbiihjsvLp8AKCK0RDE=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=esQ6ZiPx3oQTPzAw3MqIs0EOTPGveTQfxv/A/eST5vTSXf8yk1btGCmyRs/3Pg8XERLQ+d5XliTrqoGte1pcq9dzYS8oSYM0y5hQwzW5eZIMbZ5cazEKKkC9jN/3e6CJ3pB98be3duKB/a+0wtb3dmlO4eUBuLXbskAuBl1P6pU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.98.2) (envelope-from ) id 1uWMLB-000000007Mt-1ikl; Mon, 30 Jun 2025 21:47:05 +0000 Date: Mon, 30 Jun 2025 22:47:02 +0100 From: Daniel Golle To: Felix Fietkau , Frank Wunderlich , Eric Woudstra , Elad Yifee , Bo-Cun Chen , Sky Huang , Sean Wang , Lorenzo Bianconi , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH net-next v3 3/3] net: ethernet: mtk_eth_soc: use genpool allocator for SRAM Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use a dedicated "mmio-sram" and the genpool allocator instead of open-coding SRAM allocation for DMA rings. Keep support for legacy device trees but notify the user via a warning to update. Co-developed-by: Frank Wunderlich Signed-off-by: Frank Wunderlich Signed-off-by: Daniel Golle --- v3: fix resource leak on error in mtk_probe() v2: fix return type of mtk_dma_ring_alloc() in case of error drivers/net/ethernet/mediatek/mtk_eth_soc.c | 117 +++++++++++++------- drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 +- 2 files changed, 83 insertions(+), 38 deletions(-) diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethe= rnet/mediatek/mtk_eth_soc.c index 8f55069441f4..29b95d96f3d4 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c @@ -27,6 +27,7 @@ #include #include #include +#include =20 #include "mtk_eth_soc.h" #include "mtk_wed.h" @@ -1267,6 +1268,45 @@ static void *mtk_max_lro_buf_alloc(gfp_t gfp_mask) return (void *)data; } =20 +static bool mtk_use_legacy_sram(struct mtk_eth *eth) +{ + return !eth->sram_pool && MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM); +} + +static void *mtk_dma_ring_alloc(struct mtk_eth *eth, size_t size, + dma_addr_t *dma_handle) +{ + void *dma_ring; + + if (WARN_ON(mtk_use_legacy_sram(eth))) + return NULL; + + if (eth->sram_pool) { + dma_ring =3D (void *)gen_pool_alloc(eth->sram_pool, size); + if (!dma_ring) + return dma_ring; + *dma_handle =3D gen_pool_virt_to_phys(eth->sram_pool, + (unsigned long)dma_ring); + } else { + dma_ring =3D dma_alloc_coherent(eth->dma_dev, size, dma_handle, + GFP_KERNEL); + } + + return dma_ring; +} + +static void mtk_dma_ring_free(struct mtk_eth *eth, size_t size, void *dma_= ring, + dma_addr_t dma_handle) +{ + if (WARN_ON(mtk_use_legacy_sram(eth))) + return; + + if (eth->sram_pool) + gen_pool_free(eth->sram_pool, (unsigned long)dma_ring, size); + else + dma_free_coherent(eth->dma_dev, size, dma_ring, dma_handle); +} + /* the qdma core needs scratch memory to be setup */ static int mtk_init_fq_dma(struct mtk_eth *eth) { @@ -1276,13 +1316,12 @@ static int mtk_init_fq_dma(struct mtk_eth *eth) dma_addr_t dma_addr; int i, j, len; =20 - if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) + if (!mtk_use_legacy_sram(eth)) { + eth->scratch_ring =3D mtk_dma_ring_alloc(eth, cnt * soc->tx.desc_size, + ð->phy_scratch_ring); + } else { eth->scratch_ring =3D eth->sram_base; - else - eth->scratch_ring =3D dma_alloc_coherent(eth->dma_dev, - cnt * soc->tx.desc_size, - ð->phy_scratch_ring, - GFP_KERNEL); + } =20 if (unlikely(!eth->scratch_ring)) return -ENOMEM; @@ -2620,12 +2659,11 @@ static int mtk_tx_alloc(struct mtk_eth *eth) if (!ring->buf) goto no_tx_mem; =20 - if (MTK_HAS_CAPS(soc->caps, MTK_SRAM)) { + if (!mtk_use_legacy_sram(eth)) { + ring->dma =3D mtk_dma_ring_alloc(eth, ring_size * sz, &ring->phys); + } else { ring->dma =3D eth->sram_base + soc->tx.fq_dma_size * sz; ring->phys =3D eth->phy_scratch_ring + soc->tx.fq_dma_size * (dma_addr_t= )sz; - } else { - ring->dma =3D dma_alloc_coherent(eth->dma_dev, ring_size * sz, - &ring->phys, GFP_KERNEL); } =20 if (!ring->dma) @@ -2726,9 +2764,9 @@ static void mtk_tx_clean(struct mtk_eth *eth) kfree(ring->buf); ring->buf =3D NULL; } - if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && ring->dma) { - dma_free_coherent(eth->dma_dev, - ring->dma_size * soc->tx.desc_size, + + if (!mtk_use_legacy_sram(eth) && ring->dma) { + mtk_dma_ring_free(eth, ring->dma_size * soc->tx.desc_size, ring->dma, ring->phys); ring->dma =3D NULL; } @@ -2793,6 +2831,9 @@ static int mtk_rx_alloc(struct mtk_eth *eth, int ring= _no, int rx_flag) ring->dma =3D dma_alloc_coherent(eth->dma_dev, rx_dma_size * eth->soc->rx.desc_size, &ring->phys, GFP_KERNEL); + } else if (eth->sram_pool) { + ring->dma =3D mtk_dma_ring_alloc(eth, rx_dma_size * eth->soc->rx.desc_si= ze, + &ring->phys); } else { struct mtk_tx_ring *tx_ring =3D ð->tx_ring; =20 @@ -2921,6 +2962,11 @@ static void mtk_rx_clean(struct mtk_eth *eth, struct= mtk_rx_ring *ring, bool in_ ring->dma_size * eth->soc->rx.desc_size, ring->dma, ring->phys); ring->dma =3D NULL; + } else if (!mtk_use_legacy_sram(eth) && ring->dma) { + mtk_dma_ring_free(eth, + ring->dma_size * eth->soc->rx.desc_size, + ring->dma, ring->phys); + ring->dma =3D NULL; } =20 if (ring->page_pool) { @@ -3287,9 +3333,8 @@ static void mtk_dma_free(struct mtk_eth *eth) netdev_tx_reset_subqueue(eth->netdev[i], j); } =20 - if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && eth->scratch_ring) { - dma_free_coherent(eth->dma_dev, - MTK_QDMA_RING_SIZE * soc->tx.desc_size, + if (!mtk_use_legacy_sram(eth) && eth->scratch_ring) { + mtk_dma_ring_free(eth, soc->tx.fq_dma_size * soc->tx.desc_size, eth->scratch_ring, eth->phy_scratch_ring); eth->scratch_ring =3D NULL; eth->phy_scratch_ring =3D 0; @@ -5009,7 +5054,7 @@ static int mtk_sgmii_init(struct mtk_eth *eth) =20 static int mtk_probe(struct platform_device *pdev) { - struct resource *res =3D NULL, *res_sram; + struct resource *res =3D NULL; struct device_node *mac_np; struct mtk_eth *eth; int err, i; @@ -5029,20 +5074,6 @@ static int mtk_probe(struct platform_device *pdev) if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) eth->ip_align =3D NET_IP_ALIGN; =20 - if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) { - /* SRAM is actual memory and supports transparent access just like DRAM. - * Hence we don't require __iomem being set and don't need to use access= or - * functions to read from or write to SRAM. - */ - if (mtk_is_netsys_v3_or_greater(eth)) { - eth->sram_base =3D (void __force *)devm_platform_ioremap_resource(pdev,= 1); - if (IS_ERR(eth->sram_base)) - return PTR_ERR(eth->sram_base); - } else { - eth->sram_base =3D (void __force *)eth->base + MTK_ETH_SRAM_OFFSET; - } - } - if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) { err =3D dma_set_mask(&pdev->dev, DMA_BIT_MASK(36)); if (!err) @@ -5117,16 +5148,28 @@ static int mtk_probe(struct platform_device *pdev) err =3D -EINVAL; goto err_destroy_sgmii; } + if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) { - if (mtk_is_netsys_v3_or_greater(eth)) { - res_sram =3D platform_get_resource(pdev, IORESOURCE_MEM, 1); - if (!res_sram) { + eth->sram_pool =3D of_gen_pool_get(pdev->dev.of_node, "sram", 0); + if (!eth->sram_pool) { + if (!mtk_is_netsys_v3_or_greater(eth)) { + /* + * Legacy support for missing 'sram' node in DT. + * SRAM is actual memory and supports transparent access + * just like DRAM. Hence we don't require __iomem being + * set and don't need to use accessor functions to read from + * or write to SRAM. + */ + eth->sram_base =3D (void __force *)eth->base + + MTK_ETH_SRAM_OFFSET; + eth->phy_scratch_ring =3D res->start + MTK_ETH_SRAM_OFFSET; + dev_warn(&pdev->dev, + "legacy DT: using hard-coded SRAM offset.\n"); + } else { + dev_err(&pdev->dev, "Could not get SRAM pool\n"); err =3D -EINVAL; goto err_destroy_sgmii; } - eth->phy_scratch_ring =3D res_sram->start; - } else { - eth->phy_scratch_ring =3D res->start + MTK_ETH_SRAM_OFFSET; } } } diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethe= rnet/mediatek/mtk_eth_soc.h index 1ad9075a9b69..0104659e37f0 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h @@ -1245,7 +1245,8 @@ struct mtk_soc_data { * @dev: The device pointer * @dma_dev: The device pointer used for dma mapping/alloc * @base: The mapped register i/o base - * @sram_base: The mapped SRAM base + * @sram_base: The mapped SRAM base (deprecated) + * @sram_pool: Pointer to SRAM pool used for DMA descriptor rings * @page_lock: Make sure that register operations are atomic * @tx_irq__lock: Make sure that IRQ register operations are atomic * @rx_irq__lock: Make sure that IRQ register operations are atomic @@ -1292,6 +1293,7 @@ struct mtk_eth { struct device *dma_dev; void __iomem *base; void *sram_base; + struct gen_pool *sram_pool; spinlock_t page_lock; spinlock_t tx_irq_lock; spinlock_t rx_irq_lock; --=20 2.50.0