From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 701002EACE3; Thu, 26 Jun 2025 14:48:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949321; cv=none; b=spKqk+q2nb9/3epqaTAYJZlHT02Wk5OD66OTB39F04ERfGbsRIyLUXvlk6QQKXn+s/FVtAjYB3HybpomNsGo9r4KkkSNmgyZeLEJ7ouCX/BtYDUZshmbOZrQ8g/pT6IoyBwdWRtT6hpmvvzrvrUfk3VOYgQDhkbpRUXf6Xn8phM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949321; c=relaxed/simple; bh=wdxA05uMnJ5Nx9bpFKxpSs1sNQro9QbVkbkJcxFogLk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=CXNDG/NQL9MbQVzI3Nk4Y6guychlWrYvffgbESIKP/1TN90zIq8OQvNHXO0F/zx5o4je6BzD/Tg2bsRzKpLF6chHbuM1S7OKaYqwb3j8yRE/+eMwYNE8rVClDgM260axCdKkmbsxcDZ6IHHd9H7XAXuUs3J0Pw2J2nX8PFDfH+0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=gnteCw5z; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=D0ZICz2j; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="gnteCw5z"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="D0ZICz2j" From: Nam Cao DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1750949316; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TkdF6/WXSmyR6CP6BJIFb/N9JSNeGtF+c34gsRTZKi8=; b=gnteCw5zFdeHMYffbKs77Zh69GwMGsOSTdZ3KTKu9bnHHvg+UI8TTjsm1bM0viMJiDShza aHSj4YaO1m6v4p7i1grgwE7fBRLx4CCeQzmf6kbNyandbo4Zpgr9w3CjbswZG7THLUxxMU tHn47VGd8jdzENxHRsPOTUapQa1MzSs2OhJ/iX+WNW0T/hIzVFzypEYSMn3KyF4s4d2J2J 9dzWuvnTDAxDp1AeJ0V8EdSG9guGrdSmpWYPNv+A7ZGvsMwlbntqFf4aYaYXiM1SpODFCB yTAYrXae2mcm/lgTtdI/H+hpVSPFsMfE8s8QwVjy+2Kc6uAwGToVodrJOPTXWQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1750949316; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TkdF6/WXSmyR6CP6BJIFb/N9JSNeGtF+c34gsRTZKi8=; b=D0ZICz2jEObaXwCZyRm2f01Xzfxg6p3k/Gbe8jfG6SpDkTSuNsxPtcOUYG5dc4prMVSEf6 Qh6SMuDMEIiXt6Dw== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao , Jingoo Han Subject: [PATCH 01/16] PCI: dwc: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:47:51 +0200 Message-Id: <04d4a96046490e50139826c16423954e033cdf89.1750858083.git.namcao@linutronix.de> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Jingoo Han --- drivers/pci/controller/dwc/Kconfig | 1 + .../pci/controller/dwc/pcie-designware-host.c | 68 +++++++------------ drivers/pci/controller/dwc/pcie-designware.h | 1 - 3 files changed, 25 insertions(+), 45 deletions(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dw= c/Kconfig index bb95877b2c6c4..8a63e9bc0c039 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -19,6 +19,7 @@ config PCIE_DW_DEBUGFS config PCIE_DW_HOST bool select PCIE_DW + select IRQ_MSI_LIB =20 config PCIE_DW_EP bool diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pc= i/controller/dwc/pcie-designware-host.c index 906277f9ffaf7..a953e07a68aff 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -10,6 +10,7 @@ =20 #include #include +#include #include #include #include @@ -23,35 +24,21 @@ static struct pci_ops dw_pcie_ops; static struct pci_ops dw_child_pcie_ops; =20 -static void dw_msi_ack_irq(struct irq_data *d) -{ - irq_chip_ack_parent(d); -} - -static void dw_msi_mask_irq(struct irq_data *d) -{ - pci_msi_mask_irq(d); - irq_chip_mask_parent(d); -} - -static void dw_msi_unmask_irq(struct irq_data *d) -{ - pci_msi_unmask_irq(d); - irq_chip_unmask_parent(d); -} - -static struct irq_chip dw_pcie_msi_irq_chip =3D { - .name =3D "PCI-MSI", - .irq_ack =3D dw_msi_ack_irq, - .irq_mask =3D dw_msi_mask_irq, - .irq_unmask =3D dw_msi_unmask_irq, -}; - -static struct msi_domain_info dw_pcie_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX | - MSI_FLAG_MULTI_PCI_MSI, - .chip =3D &dw_pcie_msi_irq_chip, +#define DW_PCIE_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_NO_AFFINITY | \ + MSI_FLAG_PCI_MSI_MASK_PARENT) +#define DW_PCIE_MSI_FLAGS_SUPPORTED (MSI_FLAG_MULTI_PCI_MSI | \ + MSI_FLAG_PCI_MSIX | \ + MSI_GENERIC_FLAGS_MASK) + +static const struct msi_parent_ops dw_pcie_msi_parent_ops =3D { + .required_flags =3D DW_PCIE_MSI_FLAGS_REQUIRED, + .supported_flags =3D DW_PCIE_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .chip_flags =3D MSI_CHIP_FLAG_SET_ACK, + .prefix =3D "DW-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, }; =20 /* MSI int handler */ @@ -228,25 +215,19 @@ int dw_pcie_allocate_domains(struct dw_pcie_rp *pp) { struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); struct fwnode_handle *fwnode =3D of_fwnode_handle(pci->dev->of_node); - - pp->irq_domain =3D irq_domain_create_linear(fwnode, pp->num_vectors, - &dw_pcie_msi_domain_ops, pp); + struct irq_domain_info info =3D { + .fwnode =3D fwnode, + .ops =3D &dw_pcie_msi_domain_ops, + .size =3D pp->num_vectors, + .host_data =3D pp, + }; + + pp->irq_domain =3D msi_create_parent_irq_domain(&info, &dw_pcie_msi_paren= t_ops); if (!pp->irq_domain) { dev_err(pci->dev, "Failed to create IRQ domain\n"); return -ENOMEM; } =20 - irq_domain_update_bus_token(pp->irq_domain, DOMAIN_BUS_NEXUS); - - pp->msi_domain =3D pci_msi_create_irq_domain(fwnode, - &dw_pcie_msi_domain_info, - pp->irq_domain); - if (!pp->msi_domain) { - dev_err(pci->dev, "Failed to create MSI domain\n"); - irq_domain_remove(pp->irq_domain); - return -ENOMEM; - } - return 0; } =20 @@ -260,7 +241,6 @@ static void dw_pcie_free_msi(struct dw_pcie_rp *pp) NULL, NULL); } =20 - irq_domain_remove(pp->msi_domain); irq_domain_remove(pp->irq_domain); } =20 diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/con= troller/dwc/pcie-designware.h index ce9e18554e426..d9daee4ce220d 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -417,7 +417,6 @@ struct dw_pcie_rp { const struct dw_pcie_host_ops *ops; int msi_irq[MAX_MSI_CTRLS]; struct irq_domain *irq_domain; - struct irq_domain *msi_domain; dma_addr_t msi_data; struct irq_chip *msi_irq_chip; u32 num_vectors; --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 700882E975D; Thu, 26 Jun 2025 14:48:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; 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arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="Ohoigcr0"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="nkf0SgAB" From: Nam Cao DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1750949317; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ditblTcZWn/hLq3noPG8h3VqVahq3cequ10qfherkGM=; b=Ohoigcr0rb5pIx6qw0y2lxsaVeMYasJkG7wk+QvCsLxMRJfBAaWb3cAZ/7c8tDoK4SDkDS 8Je0WQcU77U+hwqrifMlEDpY9a2GOk/k9tlq8SImqU0h7Ml3Q3NKmW8M43v+X2X9NT1TL8 d9EyC+Knu01unLHE0weQED2TeRC/ayeUHFVbq3z4EcjwmRcfKzcVT4RpsjoYOtf/R0VKmC Z2J2gwNf8f+nQpJkB1Zuj3kD6lasz12E7h+krIiHy9+ixJPWuJZwZywEteMCfkXBuWaMxR iYTmiGtGDAVHiflhzfyD4/olxsD9Qw6OhfCgtZjagG570GLFnicUpokwd8+LSA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1750949317; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ditblTcZWn/hLq3noPG8h3VqVahq3cequ10qfherkGM=; b=nkf0SgABGViiBC0OgUJ6GiesPE6qRlOssUq/2xMsJRb5rWHbuFX2bGmaEXOFg0zU4ifu1j tvPVEy1w3HxMyeBA== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 02/16] PCI: mobiveil: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:47:52 +0200 Message-Id: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Karthikeyan Mitran Cc: Hou Zhiqiang --- drivers/pci/controller/mobiveil/Kconfig | 1 + .../controller/mobiveil/pcie-mobiveil-host.c | 42 ++++++++++--------- .../pci/controller/mobiveil/pcie-mobiveil.h | 1 - 3 files changed, 23 insertions(+), 21 deletions(-) diff --git a/drivers/pci/controller/mobiveil/Kconfig b/drivers/pci/controll= er/mobiveil/Kconfig index 58ce034f701ab..c50c4625937f8 100644 --- a/drivers/pci/controller/mobiveil/Kconfig +++ b/drivers/pci/controller/mobiveil/Kconfig @@ -9,6 +9,7 @@ config PCIE_MOBIVEIL config PCIE_MOBIVEIL_HOST bool depends on PCI_MSI + select IRQ_MSI_LIB select PCIE_MOBIVEIL =20 config PCIE_LAYERSCAPE_GEN4 diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c b/drivers= /pci/controller/mobiveil/pcie-mobiveil-host.c index cd44ddb698ea2..d17e887b6b61d 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -353,16 +354,19 @@ static const struct irq_domain_ops intx_domain_ops = =3D { .map =3D mobiveil_pcie_intx_map, }; =20 -static struct irq_chip mobiveil_msi_irq_chip =3D { - .name =3D "Mobiveil PCIe MSI", - .irq_mask =3D pci_msi_mask_irq, - .irq_unmask =3D pci_msi_unmask_irq, -}; +#define MOBIVEIL_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_NO_AFFINITY) + +#define MOBIVEIL_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_PCI_MSIX) =20 -static struct msi_domain_info mobiveil_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX, - .chip =3D &mobiveil_msi_irq_chip, +static const struct msi_parent_ops mobiveil_msi_parent_ops =3D { + .required_flags =3D MOBIVEIL_MSI_FLAGS_REQUIRED, + .supported_flags =3D MOBIVEIL_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .prefix =3D "Mobiveil-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, }; =20 static void mobiveil_compose_msi_msg(struct irq_data *data, struct msi_msg= *msg) @@ -439,19 +443,17 @@ static int mobiveil_allocate_msi_domains(struct mobiv= eil_pcie *pcie) struct mobiveil_msi *msi =3D &pcie->rp.msi; =20 mutex_init(&msi->lock); - msi->dev_domain =3D irq_domain_create_linear(NULL, msi->num_of_vectors, - &msi_domain_ops, pcie); - if (!msi->dev_domain) { - dev_err(dev, "failed to create IRQ domain\n"); - return -ENOMEM; - } =20 - msi->msi_domain =3D pci_msi_create_irq_domain(fwnode, - &mobiveil_msi_domain_info, - msi->dev_domain); - if (!msi->msi_domain) { + struct irq_domain_info info =3D { + .fwnode =3D fwnode, + .ops =3D &msi_domain_ops, + .host_data =3D pcie, + .size =3D msi->num_of_vectors, + }; + + msi->dev_domain =3D msi_create_parent_irq_domain(&info, &mobiveil_msi_par= ent_ops); + if (!msi->dev_domain) { dev_err(dev, "failed to create MSI domain\n"); - irq_domain_remove(msi->dev_domain); return -ENOMEM; } =20 diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/= controller/mobiveil/pcie-mobiveil.h index 662f17f9bf65c..7246de6a71768 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h @@ -135,7 +135,6 @@ =20 struct mobiveil_msi { /* MSI information */ struct mutex lock; /* protect bitmap variable */ - struct irq_domain *msi_domain; struct irq_domain *dev_domain; phys_addr_t msi_pages_phys; int num_of_vectors; --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 54E3F2E4274; Thu, 26 Jun 2025 14:48:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949322; cv=none; b=hUUU+2t2tDr0W71IlLNltB6p8+SH0vP0gus0/wfTfTpdnG8sPUxRsJpP6ptb4CiEb7LU1MWMEHoS0dVRof3FmIncTaihEQkKRZpXe8c0Vt5ut/mu+6Y9RFAFihR/D1P3FfVL9PvF1Zbuxz59TVrm0VyDA4XBXbPts7AC8y+xYBI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949322; c=relaxed/simple; bh=Mb1eaFjXKnOsO2erYJLRPs3qQ+1SszR41uaqB7pkaiY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; 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bh=5RiH2QS4+1kCH8P95Q5VgmocNwT6Na4BdF5l0zDeYZM=; b=Fs1qyOFCKC/4WHcF4TxHZZsJqfAyeWlS6E7B7hehsQ7zY4wQA+CIjWqHRq49AU4OJACbTh Y2v2Jw5yalA0OiCg== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 03/16] PCI: aardvark: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:47:53 +0200 Message-Id: <68b2f9387bbe4f08bcd428bfab83ad1219fb8d80.1750858083.git.namcao@linutronix.de> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Thomas Petazzoni Cc: "Pali Roh=C3=A1r" Cc: linux-arm-kernel@lists.infradead.org --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pci-aardvark.c | 59 +++++++++++---------------- 2 files changed, 24 insertions(+), 36 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 886f6f43a895f..91a2d4ffc3ac4 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -13,6 +13,7 @@ config PCI_AARDVARK depends on OF depends on PCI_MSI select PCI_BRIDGE_EMUL + select IRQ_MSI_LIB help Add support for Aardvark 64bit PCIe Host Controller. This controller is part of the South Bridge of the Marvel Armada diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller= /pci-aardvark.c index 7bac64533b143..e34bea1ff0ac6 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -278,7 +279,6 @@ struct advk_pcie { struct irq_domain *irq_domain; struct irq_chip irq_chip; raw_spinlock_t irq_lock; - struct irq_domain *msi_domain; struct irq_domain *msi_inner_domain; raw_spinlock_t msi_irq_lock; DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); @@ -1332,18 +1332,6 @@ static void advk_msi_irq_unmask(struct irq_data *d) raw_spin_unlock_irqrestore(&pcie->msi_irq_lock, flags); } =20 -static void advk_msi_top_irq_mask(struct irq_data *d) -{ - pci_msi_mask_irq(d); - irq_chip_mask_parent(d); -} - -static void advk_msi_top_irq_unmask(struct irq_data *d) -{ - pci_msi_unmask_irq(d); - irq_chip_unmask_parent(d); -} - static struct irq_chip advk_msi_bottom_irq_chip =3D { .name =3D "MSI", .irq_compose_msi_msg =3D advk_msi_irq_compose_msi_msg, @@ -1436,17 +1424,20 @@ static const struct irq_domain_ops advk_pcie_irq_do= main_ops =3D { .xlate =3D irq_domain_xlate_onecell, }; =20 -static struct irq_chip advk_msi_irq_chip =3D { - .name =3D "advk-MSI", - .irq_mask =3D advk_msi_top_irq_mask, - .irq_unmask =3D advk_msi_top_irq_unmask, -}; - -static struct msi_domain_info advk_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI | - MSI_FLAG_PCI_MSIX, - .chip =3D &advk_msi_irq_chip, +#define ADVK_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_PCI_MSI_MASK_PARENT | \ + MSI_FLAG_NO_AFFINITY) +#define ADVK_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_PCI_MSIX | \ + MSI_FLAG_MULTI_PCI_MSI) + +static const struct msi_parent_ops advk_msi_parent_ops =3D { + .required_flags =3D ADVK_MSI_FLAGS_REQUIRED, + .supported_flags =3D ADVK_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .prefix =3D "advk-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, }; =20 static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) @@ -1456,26 +1447,22 @@ static int advk_pcie_init_msi_irq_domain(struct adv= k_pcie *pcie) raw_spin_lock_init(&pcie->msi_irq_lock); mutex_init(&pcie->msi_used_lock); =20 - pcie->msi_inner_domain =3D irq_domain_create_linear(NULL, MSI_IRQ_NUM, - &advk_msi_domain_ops, pcie); - if (!pcie->msi_inner_domain) - return -ENOMEM; + struct irq_domain_info info =3D { + .fwnode =3D dev_fwnode(dev), + .ops =3D &advk_msi_domain_ops, + .host_data =3D pcie, + .size =3D MSI_IRQ_NUM, + }; =20 - pcie->msi_domain =3D - pci_msi_create_irq_domain(dev_fwnode(dev), - &advk_msi_domain_info, - pcie->msi_inner_domain); - if (!pcie->msi_domain) { - irq_domain_remove(pcie->msi_inner_domain); + pcie->msi_inner_domain =3D msi_create_parent_irq_domain(&info, &advk_msi_= parent_ops); + if (!pcie->msi_inner_domain) return -ENOMEM; - } =20 return 0; } =20 static void advk_pcie_remove_msi_irq_domain(struct advk_pcie *pcie) { - irq_domain_remove(pcie->msi_domain); irq_domain_remove(pcie->msi_inner_domain); } =20 --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F5B92ECD26; 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a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1750949320; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gjHYyX3StyvYFxHeeqv/LYhiKdcq0Fz4Fnl5MOMRvT4=; b=hAk5Bat7znOJgAYspbl3b19fM6NZsoIgSKXAdTlOLzvTuSu67AxxQv37acwFp+sYwpfb2W IfKyFmv+H5BVmLDw== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 04/16] PCI: altera-msi: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:47:54 +0200 Message-Id: <0a88da04bb82bd588828a7889e9d58c515ea5dbb.1750858083.git.namcao@linutronix.de> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Joyce Ooi --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pcie-altera-msi.c | 44 +++++++++++------------- 2 files changed, 22 insertions(+), 23 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 91a2d4ffc3ac4..012c18c67d9c6 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -30,6 +30,7 @@ config PCIE_ALTERA_MSI tristate "Altera PCIe MSI feature" depends on PCIE_ALTERA depends on PCI_MSI + select IRQ_MSI_LIB help Say Y here if you want PCIe MSI support for the Altera FPGA. This MSI driver supports Altera MSI to GIC controller IP. diff --git a/drivers/pci/controller/pcie-altera-msi.c b/drivers/pci/control= ler/pcie-altera-msi.c index a43f21eb8fbb9..2e48acd632c57 100644 --- a/drivers/pci/controller/pcie-altera-msi.c +++ b/drivers/pci/controller/pcie-altera-msi.c @@ -9,6 +9,7 @@ =20 #include #include +#include #include #include #include @@ -29,7 +30,6 @@ struct altera_msi { DECLARE_BITMAP(used, MAX_MSI_VECTORS); struct mutex lock; /* protect "used" bitmap */ struct platform_device *pdev; - struct irq_domain *msi_domain; struct irq_domain *inner_domain; void __iomem *csr_base; void __iomem *vector_base; @@ -74,18 +74,20 @@ static void altera_msi_isr(struct irq_desc *desc) chained_irq_exit(chip, desc); } =20 -static struct irq_chip altera_msi_irq_chip =3D { - .name =3D "Altera PCIe MSI", - .irq_mask =3D pci_msi_mask_irq, - .irq_unmask =3D pci_msi_unmask_irq, -}; +#define ALTERA_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_NO_AFFINITY) =20 -static struct msi_domain_info altera_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX, - .chip =3D &altera_msi_irq_chip, -}; +#define ALTERA_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_PCI_MSIX) =20 +static const struct msi_parent_ops altera_msi_parent_ops =3D { + .required_flags =3D ALTERA_MSI_FLAGS_REQUIRED, + .supported_flags =3D ALTERA_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .prefix =3D "Altera-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, +}; static void altera_compose_msi_msg(struct irq_data *data, struct msi_msg *= msg) { struct altera_msi *msi =3D irq_data_get_irq_chip_data(data); @@ -165,19 +167,16 @@ static const struct irq_domain_ops msi_domain_ops =3D= { static int altera_allocate_domains(struct altera_msi *msi) { struct fwnode_handle *fwnode =3D of_fwnode_handle(msi->pdev->dev.of_node); - - msi->inner_domain =3D irq_domain_create_linear(NULL, msi->num_of_vectors, - &msi_domain_ops, msi); + struct irq_domain_info info =3D { + .fwnode =3D fwnode, + .ops =3D &msi_domain_ops, + .host_data =3D msi, + .size =3D msi->num_of_vectors, + }; + + msi->inner_domain =3D msi_create_parent_irq_domain(&info, &altera_msi_par= ent_ops); if (!msi->inner_domain) { - dev_err(&msi->pdev->dev, "failed to create IRQ domain\n"); - return -ENOMEM; - } - - msi->msi_domain =3D pci_msi_create_irq_domain(fwnode, - &altera_msi_domain_info, msi->inner_domain); - if (!msi->msi_domain) { dev_err(&msi->pdev->dev, "failed to create MSI domain\n"); - irq_domain_remove(msi->inner_domain); return -ENOMEM; } =20 @@ -186,7 +185,6 @@ static int altera_allocate_domains(struct altera_msi *m= si) =20 static void altera_free_domains(struct altera_msi *msi) { - irq_domain_remove(msi->msi_domain); irq_domain_remove(msi->inner_domain); } =20 --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1290F2ED86E; Thu, 26 Jun 2025 14:48:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 05/16] PCI: brcmstb: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:47:55 +0200 Message-Id: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Florian Fainelli Reviewed-by: Thomas Gleixner --- Cc: Florian Fainelli Cc: Broadcom internal kernel review list Cc: Jim Quinlan Cc: Nicolas Saenz Julienne Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pcie-brcmstb.c | 44 +++++++++++++-------------- 2 files changed, 23 insertions(+), 22 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 012c18c67d9c6..0f6cec244d4fa 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -64,6 +64,7 @@ config PCIE_BRCMSTB BMIPS_GENERIC || COMPILE_TEST depends on OF depends on PCI_MSI + select IRQ_MSI_LIB default ARCH_BRCMSTB || BMIPS_GENERIC help Say Y here to enable PCIe host controller support for diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller= /pcie-brcmstb.c index 744df5bd39aea..8ea75aa13130e 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -269,7 +270,6 @@ struct brcm_msi { struct device *dev; void __iomem *base; struct device_node *np; - struct irq_domain *msi_domain; struct irq_domain *inner_domain; struct mutex lock; /* guards the alloc/free operations */ u64 target_addr; @@ -469,17 +469,20 @@ static void brcm_pcie_set_outbound_win(struct brcm_pc= ie *pcie, writel(tmp, pcie->base + PCIE_MEM_WIN0_LIMIT_HI(win)); } =20 -static struct irq_chip brcm_msi_irq_chip =3D { - .name =3D "BRCM STB PCIe MSI", - .irq_ack =3D irq_chip_ack_parent, - .irq_mask =3D pci_msi_mask_irq, - .irq_unmask =3D pci_msi_unmask_irq, -}; +#define BRCM_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_NO_AFFINITY) + +#define BRCM_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_MULTI_PCI_MSI) =20 -static struct msi_domain_info brcm_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI, - .chip =3D &brcm_msi_irq_chip, +static const struct msi_parent_ops brcm_msi_parent_ops =3D { + .required_flags =3D BRCM_MSI_FLAGS_REQUIRED, + .supported_flags =3D BRCM_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .chip_flags =3D MSI_CHIP_FLAG_SET_ACK, + .prefix =3D "BRCM-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, }; =20 static void brcm_pcie_msi_isr(struct irq_desc *desc) @@ -588,18 +591,16 @@ static int brcm_allocate_domains(struct brcm_msi *msi) struct fwnode_handle *fwnode =3D of_fwnode_handle(msi->np); struct device *dev =3D msi->dev; =20 - msi->inner_domain =3D irq_domain_create_linear(NULL, msi->nr, &msi_domain= _ops, msi); - if (!msi->inner_domain) { - dev_err(dev, "failed to create IRQ domain\n"); - return -ENOMEM; - } + struct irq_domain_info info =3D { + .fwnode =3D fwnode, + .ops =3D &msi_domain_ops, + .host_data =3D msi, + .size =3D msi->nr, + }; =20 - msi->msi_domain =3D pci_msi_create_irq_domain(fwnode, - &brcm_msi_domain_info, - msi->inner_domain); - if (!msi->msi_domain) { + msi->inner_domain =3D msi_create_parent_irq_domain(&info, &brcm_msi_paren= t_ops); + if (!msi->inner_domain) { dev_err(dev, "failed to create MSI domain\n"); - irq_domain_remove(msi->inner_domain); return -ENOMEM; } =20 @@ -608,7 +609,6 @@ static int brcm_allocate_domains(struct brcm_msi *msi) =20 static void brcm_free_domains(struct brcm_msi *msi) { - irq_domain_remove(msi->msi_domain); irq_domain_remove(msi->inner_domain); } =20 --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 29F1B2EE280; Thu, 26 Jun 2025 14:48:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949325; cv=none; b=SBki/5HfoRM7me9G1lrJr0612h3Mj244/MFXSxhBYGKHNcVSlYvb6fGTEsotNXYs9F9sjcfS/y8dvE4P2deM0bRnkEUMTs6lPDunWy2GJ2A9hcKpaMUSybZTrhGwUmPWz7uy5Dtc3snxwwHJro9yQFnb6qviiaTcY+CR/w1CGn4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949325; c=relaxed/simple; bh=S6GLCN/3IjZwj/UzWJRZug0f+xbVl11IJhy15Cnm8Sg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QEoeLXDrVTBwcw9XUwfBJRe+t9AVkdnSFPFhDv3abog2j3ZdTQBc70z5GKmjD3D00bsR6lq13D/NJO6Tr6C+c3ylGX3CcAdQG6qvMSVZ7HpGffZsJrjOephJlwyzxqEi7YQAZ3HhA3RgnoTzkm3+1WKYo8zFfzVSxaCTB8lZL0U= ARC-Authentication-Results: i=1; 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 06/16] PCI: iproc: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:47:56 +0200 Message-Id: <53946d74caf1fd134a1820eac82c3cf64d48779f.1750858083.git.namcao@linutronix.de> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Florian Fainelli Reviewed-by: Thomas Gleixner --- Cc: Ray Jui Cc: Scott Branden Cc: Broadcom internal kernel review list Cc: linux-arm-kernel@lists.infradead.org --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pcie-iproc-msi.c | 45 ++++++++++++------------- 2 files changed, 22 insertions(+), 24 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 0f6cec244d4fa..375a019f35bd9 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -101,6 +101,7 @@ config PCIE_IPROC_MSI bool "Broadcom iProc PCIe MSI support" depends on PCIE_IPROC_PLATFORM || PCIE_IPROC_BCMA depends on PCI_MSI + select IRQ_MSI_LIB default ARCH_BCM_IPROC help Say Y here if you want to enable MSI support for Broadcom's iProc diff --git a/drivers/pci/controller/pcie-iproc-msi.c b/drivers/pci/controll= er/pcie-iproc-msi.c index d2cb4c4f821af..d0c7f004217fb 100644 --- a/drivers/pci/controller/pcie-iproc-msi.c +++ b/drivers/pci/controller/pcie-iproc-msi.c @@ -5,6 +5,7 @@ =20 #include #include +#include #include #include #include @@ -101,7 +102,6 @@ struct iproc_msi { struct mutex bitmap_lock; unsigned int nr_msi_vecs; struct irq_domain *inner_domain; - struct irq_domain *msi_domain; unsigned int nr_eq_region; unsigned int nr_msi_region; void *eq_cpu; @@ -165,16 +165,18 @@ static inline unsigned int iproc_msi_eq_offset(struct= iproc_msi *msi, u32 eq) return eq * EQ_LEN * sizeof(u32); } =20 -static struct irq_chip iproc_msi_irq_chip =3D { - .name =3D "iProc-MSI", +#define IPROC_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS) +#define IPROC_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_PCI_MSIX) + +static struct msi_parent_ops iproc_msi_parent_ops =3D { + .required_flags =3D IPROC_MSI_FLAGS_REQUIRED, + .supported_flags =3D IPROC_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .prefix =3D "iProc-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, }; - -static struct msi_domain_info iproc_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_PCI_MSIX, - .chip =3D &iproc_msi_irq_chip, -}; - /* * In iProc PCIe core, each MSI group is serviced by a GIC interrupt and a * dedicated event queue. Each MSI group can support up to 64 MSI vectors. @@ -446,27 +448,22 @@ static void iproc_msi_disable(struct iproc_msi *msi) static int iproc_msi_alloc_domains(struct device_node *node, struct iproc_msi *msi) { - msi->inner_domain =3D irq_domain_create_linear(NULL, msi->nr_msi_vecs, - &msi_domain_ops, msi); + struct irq_domain_info info =3D { + .fwnode =3D of_fwnode_handle(node), + .ops =3D &msi_domain_ops, + .host_data =3D msi, + .size =3D msi->nr_msi_vecs, + }; + + msi->inner_domain =3D msi_create_parent_irq_domain(&info, &iproc_msi_pare= nt_ops); if (!msi->inner_domain) return -ENOMEM; =20 - msi->msi_domain =3D pci_msi_create_irq_domain(of_fwnode_handle(node), - &iproc_msi_domain_info, - msi->inner_domain); - if (!msi->msi_domain) { - irq_domain_remove(msi->inner_domain); - return -ENOMEM; - } - return 0; } =20 static void iproc_msi_free_domains(struct iproc_msi *msi) { - if (msi->msi_domain) - irq_domain_remove(msi->msi_domain); - if (msi->inner_domain) irq_domain_remove(msi->inner_domain); } @@ -542,7 +539,7 @@ int iproc_msi_init(struct iproc_pcie *pcie, struct devi= ce_node *node) msi->nr_cpus =3D num_possible_cpus(); =20 if (msi->nr_cpus =3D=3D 1) - iproc_msi_domain_info.flags |=3D MSI_FLAG_MULTI_PCI_MSI; + iproc_msi_parent_ops.supported_flags |=3D MSI_FLAG_MULTI_PCI_MSI; =20 msi->nr_irqs =3D of_irq_count(node); if (!msi->nr_irqs) { --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 09FE52EE606; Thu, 26 Jun 2025 14:48:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949326; cv=none; b=j/SaD56Y0+7Y40jsVbKlI+ClXCCq7KNLlGiGp8d4N5+fpfW2gk8mJglvSNzip/wesAugfJs4x0xfvjtdXXHqYE8Bvm9UGRJGosnMGTIc4zp8DINnH2vWpRuoVf6d7o/J99EnuLXT2hD3tBrocdV1/l0umu+wMrJVKBnHSj1rXdw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949326; c=relaxed/simple; bh=K9L1Gl7WP0u17oqDgtDJ6nkc8b/I8MFrDogzDM2B43A=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=URcTAXsV2MrLfr3xAnUSAp0e++OAFQHQBfAZoxf1VVyABbqEjRyTQdrYW3eSrZxvcoYHnrmKphKb42+LJlJ962m2wXBHoQXBzFyvvRuf5OdPOryVGDZdHHvuXYTx8acNt6JkSpdzW9owp6f3njV8eLKAW1yBkBS2ZEWzogj1PwM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=qb4mxWe3; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=aGPLl3Px; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="qb4mxWe3"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="aGPLl3Px" From: Nam Cao DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1750949323; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MwVxsIaDgcFb+O8/af0/YU761G/v/g4E9Y+QGYc/05U=; b=qb4mxWe3WWY08sLg1q5wCvmQqGknTCw6CVCGuomI60FtWYtsrD13i1SBsvhjDS+vdF70Iz t4BEILq9XogEB8X6qnKiZ+oME6d0NPDqMm2JiHj1CbV12UYEPqhDCWxWDfHjwHH4VHIvmh muimG5KiLq4qUj2r28VqdWFCdgASDnZ8ohbCAqdghuYNWm4AWnv0uu0KUXc5C7ssA1Gnup ry3Bgg5zD73qv/oaNCVmUQd7omyHEtYfn+3S3Dd3atDNhnzezlS9mwS1y6Reit2xXjjIJI 2EzCJIhiAWzQ4K/XfkTOIeouSsyLnlmqZK69DAnA/ldV6R5C+Q5isfu0LRnZEA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1750949323; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MwVxsIaDgcFb+O8/af0/YU761G/v/g4E9Y+QGYc/05U=; b=aGPLl3PxbrjaVlsRxncYQgHcAWiO2kv/pPWxTNJj/NXLkyLfMoDzOUoEdFGtiCiA9kmVOO paVWXxmki0g6fuDA== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 07/16] PCI: mediatek-gen3: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:47:57 +0200 Message-Id: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Ryder Lee Cc: Jianjun Wang Cc: Matthias Brugger Cc: AngeloGioacchino Del Regno Cc: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pcie-mediatek-gen3.c | 67 ++++++++------------- 2 files changed, 26 insertions(+), 42 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 375a019f35bd9..ec32c343a751d 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -203,6 +203,7 @@ config PCIE_MEDIATEK_GEN3 tristate "MediaTek Gen3 PCIe controller" depends on ARCH_AIROHA || ARCH_MEDIATEK || COMPILE_TEST depends on PCI_MSI + select IRQ_MSI_LIB help Adds support for PCIe Gen3 MAC controller for MediaTek SoCs. This PCIe controller is compatible with Gen3, Gen2 and Gen1 speed, diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/cont= roller/pcie-mediatek-gen3.c index 5464b4ae5c20c..97147f43e41c5 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -187,7 +188,6 @@ struct mtk_msi_set { * @saved_irq_state: IRQ enable state saved at suspend time * @irq_lock: lock protecting IRQ register access * @intx_domain: legacy INTx IRQ domain - * @msi_domain: MSI IRQ domain * @msi_bottom_domain: MSI IRQ bottom domain * @msi_sets: MSI sets information * @lock: lock protecting IRQ bit map @@ -210,7 +210,6 @@ struct mtk_gen3_pcie { u32 saved_irq_state; raw_spinlock_t irq_lock; struct irq_domain *intx_domain; - struct irq_domain *msi_domain; struct irq_domain *msi_bottom_domain; struct mtk_msi_set msi_sets[PCIE_MSI_SET_NUM]; struct mutex lock; @@ -526,30 +525,22 @@ static int mtk_pcie_startup_port(struct mtk_gen3_pcie= *pcie) return 0; } =20 -static void mtk_pcie_msi_irq_mask(struct irq_data *data) -{ - pci_msi_mask_irq(data); - irq_chip_mask_parent(data); -} - -static void mtk_pcie_msi_irq_unmask(struct irq_data *data) -{ - pci_msi_unmask_irq(data); - irq_chip_unmask_parent(data); -} - -static struct irq_chip mtk_msi_irq_chip =3D { - .irq_ack =3D irq_chip_ack_parent, - .irq_mask =3D mtk_pcie_msi_irq_mask, - .irq_unmask =3D mtk_pcie_msi_irq_unmask, - .name =3D "MSI", -}; - -static struct msi_domain_info mtk_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX | - MSI_FLAG_MULTI_PCI_MSI, - .chip =3D &mtk_msi_irq_chip, +#define MTK_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_NO_AFFINITY | \ + MSI_FLAG_PCI_MSI_MASK_PARENT) + +#define MTK_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_PCI_MSIX | \ + MSI_FLAG_MULTI_PCI_MSI) + +static const struct msi_parent_ops mtk_msi_parent_ops =3D { + .required_flags =3D MTK_MSI_FLAGS_REQUIRED, + .supported_flags =3D MTK_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .chip_flags =3D MSI_CHIP_FLAG_SET_ACK, + .prefix =3D "MTK3-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, }; =20 static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) @@ -756,28 +747,23 @@ static int mtk_pcie_init_irq_domains(struct mtk_gen3_= pcie *pcie) /* Setup MSI */ mutex_init(&pcie->lock); =20 - pcie->msi_bottom_domain =3D irq_domain_create_linear(dev_fwnode(dev), PCI= E_MSI_IRQS_NUM, - &mtk_msi_bottom_domain_ops, pcie); + struct irq_domain_info info =3D { + .fwnode =3D dev_fwnode(dev), + .ops =3D &mtk_msi_bottom_domain_ops, + .host_data =3D pcie, + .size =3D PCIE_MSI_IRQS_NUM, + }; + + pcie->msi_bottom_domain =3D msi_create_parent_irq_domain(&info, &mtk_msi_= parent_ops); if (!pcie->msi_bottom_domain) { dev_err(dev, "failed to create MSI bottom domain\n"); ret =3D -ENODEV; goto err_msi_bottom_domain; } =20 - pcie->msi_domain =3D pci_msi_create_irq_domain(dev->fwnode, - &mtk_msi_domain_info, - pcie->msi_bottom_domain); - if (!pcie->msi_domain) { - dev_err(dev, "failed to create MSI domain\n"); - ret =3D -ENODEV; - goto err_msi_domain; - } - of_node_put(intc_node); return 0; =20 -err_msi_domain: - irq_domain_remove(pcie->msi_bottom_domain); err_msi_bottom_domain: irq_domain_remove(pcie->intx_domain); out_put_node: @@ -792,9 +778,6 @@ static void mtk_pcie_irq_teardown(struct mtk_gen3_pcie = *pcie) if (pcie->intx_domain) irq_domain_remove(pcie->intx_domain); =20 - if (pcie->msi_domain) - irq_domain_remove(pcie->msi_domain); - if (pcie->msi_bottom_domain) irq_domain_remove(pcie->msi_bottom_domain); =20 --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9BF2D2EE992; Thu, 26 Jun 2025 14:48:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949328; cv=none; b=I3vDEHbisZFDBC7Wc3UjTL+UP5aWfeiUY9yhSvl3hqG07jXBhtwXUzWJSYmoFiYoSHb6xsKkYP47jHZyWnqbTYHCjPRWRxzTM7hk0ebyU6cVbjqWRwbiJeQT78bGLp3nW70/JWZo0cYHOAH9qnK7AOZtZmL2Momqua0SC7lo1eI= ARC-Message-Signature: i=1; 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dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="z/Jr2XO7"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="vAY4S6Qh" From: Nam Cao DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1750949324; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PL2qDWi3pt7sgP22kM6CYykFBDUpgVDZeges0uU0BWA=; b=z/Jr2XO7BH0ySGAekOpV+Cf8qRhZAAawlGtbgTrrAiEou5jG0DZxpORVM92PSY3nSA2x7X 5qjS/Z/Az1R9A34yKlykCxNry/5U+biU6CCaE7z6d2Qa/t4/8XGRa5RYqd1pVnZzg7FJ38 En1TcwCIyakV1bTvGQw1CPdrAAX13vBRWMqPWlnLwMtqh6kgzAytcz9IvMODN7YgF5LTuq gneWVOXk9FFUakQzpksCsCCHwXypevrIhJekA7pkTLS8XfHHZUTQTXNvcQbAbKfeD0pnLR iDVOkIUngpMqjq99TyDMfB/Acc564mfiEWOK/274ghetLyXEMN8Q7LC4HcYeIg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1750949324; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PL2qDWi3pt7sgP22kM6CYykFBDUpgVDZeges0uU0BWA=; b=vAY4S6QhgCs+vVJiGpYBNhIKc1zpRX32BQp9RA/DpPxZ5vdCkp90MV7E+IwFf8eTkSsO5K yKOfwPjryMkQQhAQ== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 08/16] PCI: mediatek: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:47:58 +0200 Message-Id: <76f6e6ce6021607cd0fdfd79fef7d2eb69d9f361.1750858083.git.namcao@linutronix.de> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Ryder Lee Cc: Jianjun Wang Cc: Matthias Brugger Cc: AngeloGioacchino Del Regno Cc: linux-mediatek@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pcie-mediatek.c | 46 ++++++++++++-------------- 2 files changed, 23 insertions(+), 24 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index ec32c343a751d..65289a171333c 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -195,6 +195,7 @@ config PCIE_MEDIATEK depends on ARCH_AIROHA || ARCH_MEDIATEK || COMPILE_TEST depends on OF depends on PCI_MSI + select IRQ_MSI_LIB help Say Y here if you want to enable PCIe controller support on MediaTek SoCs. diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controlle= r/pcie-mediatek.c index e1934aa06c8d5..3ac5d14dd543e 100644 --- a/drivers/pci/controller/pcie-mediatek.c +++ b/drivers/pci/controller/pcie-mediatek.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -180,7 +181,6 @@ struct mtk_pcie_soc { * @irq: GIC irq * @irq_domain: legacy INTx IRQ domain * @inner_domain: inner IRQ domain - * @msi_domain: MSI IRQ domain * @lock: protect the msi_irq_in_use bitmap * @msi_irq_in_use: bit map for assigned MSI IRQ */ @@ -200,7 +200,6 @@ struct mtk_pcie_port { int irq; struct irq_domain *irq_domain; struct irq_domain *inner_domain; - struct irq_domain *msi_domain; struct mutex lock; DECLARE_BITMAP(msi_irq_in_use, MTK_MSI_IRQS_NUM); }; @@ -470,17 +469,20 @@ static const struct irq_domain_ops msi_domain_ops =3D= { .free =3D mtk_pcie_irq_domain_free, }; =20 -static struct irq_chip mtk_msi_irq_chip =3D { - .name =3D "MTK PCIe MSI", - .irq_ack =3D irq_chip_ack_parent, - .irq_mask =3D pci_msi_mask_irq, - .irq_unmask =3D pci_msi_unmask_irq, -}; +#define MTK_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_NO_AFFINITY) + +#define MTK_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_PCI_MSIX) =20 -static struct msi_domain_info mtk_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX, - .chip =3D &mtk_msi_irq_chip, +static const struct msi_parent_ops mtk_msi_parent_ops =3D { + .required_flags =3D MTK_MSI_FLAGS_REQUIRED, + .supported_flags =3D MTK_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .chip_flags =3D MSI_CHIP_FLAG_SET_ACK, + .prefix =3D "MTK-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, }; =20 static int mtk_pcie_allocate_msi_domains(struct mtk_pcie_port *port) @@ -489,21 +491,19 @@ static int mtk_pcie_allocate_msi_domains(struct mtk_p= cie_port *port) =20 mutex_init(&port->lock); =20 - port->inner_domain =3D irq_domain_create_linear(fwnode, MTK_MSI_IRQS_NUM, - &msi_domain_ops, port); + struct irq_domain_info info =3D { + .fwnode =3D fwnode, + .ops =3D &msi_domain_ops, + .host_data =3D port, + .size =3D MTK_MSI_IRQS_NUM, + }; + + port->inner_domain =3D msi_create_parent_irq_domain(&info, &mtk_msi_paren= t_ops); if (!port->inner_domain) { dev_err(port->pcie->dev, "failed to create IRQ domain\n"); return -ENOMEM; } =20 - port->msi_domain =3D pci_msi_create_irq_domain(fwnode, &mtk_msi_domain_in= fo, - port->inner_domain); - if (!port->msi_domain) { - dev_err(port->pcie->dev, "failed to create MSI domain\n"); - irq_domain_remove(port->inner_domain); - return -ENOMEM; - } - return 0; } =20 @@ -532,8 +532,6 @@ static void mtk_pcie_irq_teardown(struct mtk_pcie *pcie) irq_domain_remove(port->irq_domain); =20 if (IS_ENABLED(CONFIG_PCI_MSI)) { - if (port->msi_domain) - irq_domain_remove(port->msi_domain); if (port->inner_domain) irq_domain_remove(port->inner_domain); } --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B1F12EBDC5; Thu, 26 Jun 2025 14:48:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949329; cv=none; b=NVkfSdOxpr6w7tH6mf20YPDQSlLMT15LIK4plYAkhpeAc1svEcP/n8xtyZOafiMYFDLOTrke6zpNFsDiZqEVR2RrMJXuWo54Ry5zSUM8y7/p/OgQArCDCyTbSkvio7LyKykGIo3oyO81MmbPPZymyTRtCdPqW2EevcHFkGVqPJY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949329; c=relaxed/simple; bh=okE/Fz1McZVtRORK5MwPhing6ZYz2Iy4bP3rNzOs+yM=; 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b=qNEyVvI5FJd2MbE/+B7tQBrMp8qdz/32D0lZZbva4a0DiqZ6geSfBbVB3Tek06KFTV8G1o omudrJp7AAjPUwDQ== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao , Geert Uytterhoeven , Magnus Damm Subject: [PATCH 09/16] PCI: rcar-host: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:47:59 +0200 Message-Id: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Marek Vasut Cc: Yoshihiro Shimoda Cc: Geert Uytterhoeven Cc: Magnus Damm Cc: linux-renesas-soc@vger.kernel.org --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pcie-rcar-host.c | 69 +++++++++---------------- 2 files changed, 26 insertions(+), 44 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 65289a171333c..8b9492e9ae693 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -243,6 +243,7 @@ config PCIE_RCAR_HOST bool "Renesas R-Car PCIe controller (host mode)" depends on ARCH_RENESAS || COMPILE_TEST depends on PCI_MSI + select IRQ_MSI_LIB help Say Y here if you want PCIe controller support on R-Car SoCs in host mode. diff --git a/drivers/pci/controller/pcie-rcar-host.c b/drivers/pci/controll= er/pcie-rcar-host.c index c32b803a47c7c..ad2bda635d47f 100644 --- a/drivers/pci/controller/pcie-rcar-host.c +++ b/drivers/pci/controller/pcie-rcar-host.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -597,30 +598,6 @@ static irqreturn_t rcar_pcie_msi_irq(int irq, void *da= ta) return IRQ_HANDLED; } =20 -static void rcar_msi_top_irq_ack(struct irq_data *d) -{ - irq_chip_ack_parent(d); -} - -static void rcar_msi_top_irq_mask(struct irq_data *d) -{ - pci_msi_mask_irq(d); - irq_chip_mask_parent(d); -} - -static void rcar_msi_top_irq_unmask(struct irq_data *d) -{ - pci_msi_unmask_irq(d); - irq_chip_unmask_parent(d); -} - -static struct irq_chip rcar_msi_top_chip =3D { - .name =3D "PCIe MSI", - .irq_ack =3D rcar_msi_top_irq_ack, - .irq_mask =3D rcar_msi_top_irq_mask, - .irq_unmask =3D rcar_msi_top_irq_unmask, -}; - static void rcar_msi_irq_ack(struct irq_data *d) { struct rcar_msi *msi =3D irq_data_get_irq_chip_data(d); @@ -718,30 +695,37 @@ static const struct irq_domain_ops rcar_msi_domain_op= s =3D { .free =3D rcar_msi_domain_free, }; =20 -static struct msi_domain_info rcar_msi_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI, - .chip =3D &rcar_msi_top_chip, +#define RCAR_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_PCI_MSI_MASK_PARENT | \ + MSI_FLAG_NO_AFFINITY) + +#define RCAR_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_MULTI_PCI_MSI) + +static const struct msi_parent_ops rcar_msi_parent_ops =3D { + .required_flags =3D RCAR_MSI_FLAGS_REQUIRED, + .supported_flags =3D RCAR_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .chip_flags =3D MSI_CHIP_FLAG_SET_ACK, + .prefix =3D "RCAR-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, }; =20 static int rcar_allocate_domains(struct rcar_msi *msi) { struct rcar_pcie *pcie =3D &msi_to_host(msi)->pcie; struct fwnode_handle *fwnode =3D dev_fwnode(pcie->dev); - struct irq_domain *parent; - - parent =3D irq_domain_create_linear(fwnode, INT_PCI_MSI_NR, - &rcar_msi_domain_ops, msi); - if (!parent) { - dev_err(pcie->dev, "failed to create IRQ domain\n"); - return -ENOMEM; - } - irq_domain_update_bus_token(parent, DOMAIN_BUS_NEXUS); - - msi->domain =3D pci_msi_create_irq_domain(fwnode, &rcar_msi_info, parent); + struct irq_domain_info info =3D { + .fwnode =3D fwnode, + .ops =3D &rcar_msi_domain_ops, + .host_data =3D msi, + .size =3D INT_PCI_MSI_NR, + }; + + msi->domain =3D msi_create_parent_irq_domain(&info, &rcar_msi_parent_ops); if (!msi->domain) { - dev_err(pcie->dev, "failed to create MSI domain\n"); - irq_domain_remove(parent); + dev_err(pcie->dev, "failed to create IRQ domain\n"); return -ENOMEM; } =20 @@ -750,10 +734,7 @@ static int rcar_allocate_domains(struct rcar_msi *msi) =20 static void rcar_free_domains(struct rcar_msi *msi) { - struct irq_domain *parent =3D msi->domain->parent; - irq_domain_remove(msi->domain); - irq_domain_remove(parent); } =20 static int rcar_pcie_enable_msi(struct rcar_pcie_host *host) --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95B512EF660; Thu, 26 Jun 2025 14:48:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949330; cv=none; b=X/irWxVsJslxSYHILQTYTLrsAq8rEqd7nMYI5rwyF3TJG5sjHh/2AcrtoGRZSzB00XJIMaZqgTwFg6cqMiP/N7+LtCTCsfj94XL+vhxNQ9zisPMAYZd/52MTu5t0SvLsyzI0aKxc/YSrQzkSlSl+fvUAmL+vPGaZAFDRAFg8w7Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949330; c=relaxed/simple; bh=MeYTNl0+MUh2L9V4JTiTVQHUB12AJPKagM6B0Zbhac0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 10/16] PCI: xilinx-xdma: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:48:00 +0200 Message-Id: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Michal Simek Cc: linux-arm-kernel@lists.infradead.org --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pcie-xilinx-dma-pl.c | 48 +++++++++------------ 2 files changed, 22 insertions(+), 27 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 8b9492e9ae693..c9b6180239732 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -331,6 +331,7 @@ config PCIE_XILINX_DMA_PL depends on ARCH_ZYNQMP || COMPILE_TEST depends on PCI_MSI select PCI_HOST_COMMON + select IRQ_MSI_LIB help Say 'Y' here if you want kernel support for the Xilinx PL DMA PCIe host bridge. The controller is a Soft IP which can act as diff --git a/drivers/pci/controller/pcie-xilinx-dma-pl.c b/drivers/pci/cont= roller/pcie-xilinx-dma-pl.c index dc9690a535e16..fbc379fd118b4 100644 --- a/drivers/pci/controller/pcie-xilinx-dma-pl.c +++ b/drivers/pci/controller/pcie-xilinx-dma-pl.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -90,7 +91,6 @@ struct xilinx_pl_dma_variant { }; =20 struct xilinx_msi { - struct irq_domain *msi_domain; unsigned long *bitmap; struct irq_domain *dev_domain; struct mutex lock; /* Protect bitmap variable */ @@ -373,20 +373,20 @@ static irqreturn_t xilinx_pl_dma_pcie_intr_handler(in= t irq, void *dev_id) return IRQ_HANDLED; } =20 -static struct irq_chip xilinx_msi_irq_chip =3D { - .name =3D "pl_dma:PCIe MSI", - .irq_enable =3D pci_msi_unmask_irq, - .irq_disable =3D pci_msi_mask_irq, - .irq_mask =3D pci_msi_mask_irq, - .irq_unmask =3D pci_msi_unmask_irq, -}; +#define XILINX_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_NO_AFFINITY) =20 -static struct msi_domain_info xilinx_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI, - .chip =3D &xilinx_msi_irq_chip, -}; +#define XILINX_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_MULTI_PCI_MSI) =20 +static const struct msi_parent_ops xilinx_msi_parent_ops =3D { + .required_flags =3D XILINX_MSI_FLAGS_REQUIRED, + .supported_flags =3D XILINX_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .prefix =3D "pl_dma-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, +}; static void xilinx_compose_msi_msg(struct irq_data *data, struct msi_msg *= msg) { struct pl_dma_pcie *pcie =3D irq_data_get_irq_chip_data(data); @@ -458,11 +458,6 @@ static void xilinx_pl_dma_pcie_free_irq_domains(struct= pl_dma_pcie *port) irq_domain_remove(msi->dev_domain); msi->dev_domain =3D NULL; } - - if (msi->msi_domain) { - irq_domain_remove(msi->msi_domain); - msi->msi_domain =3D NULL; - } } =20 static int xilinx_pl_dma_pcie_init_msi_irq_domain(struct pl_dma_pcie *port) @@ -471,18 +466,17 @@ static int xilinx_pl_dma_pcie_init_msi_irq_domain(str= uct pl_dma_pcie *port) struct xilinx_msi *msi =3D &port->msi; int size =3D BITS_TO_LONGS(XILINX_NUM_MSI_IRQS) * sizeof(long); struct fwnode_handle *fwnode =3D of_fwnode_handle(port->dev->of_node); - - msi->dev_domain =3D irq_domain_create_linear(NULL, XILINX_NUM_MSI_IRQS, - &dev_msi_domain_ops, port); + struct irq_domain_info info =3D { + .fwnode =3D fwnode, + .ops =3D &dev_msi_domain_ops, + .host_data =3D port, + .size =3D XILINX_NUM_MSI_IRQS, + }; + + msi->dev_domain =3D msi_create_parent_irq_domain(&info, &xilinx_msi_pare= nt_ops); if (!msi->dev_domain) goto out; =20 - msi->msi_domain =3D pci_msi_create_irq_domain(fwnode, - &xilinx_msi_domain_info, - msi->dev_domain); - if (!msi->msi_domain) - goto out; - mutex_init(&msi->lock); msi->bitmap =3D kzalloc(size, GFP_KERNEL); if (!msi->bitmap) --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B4342EFD86; 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 11/16] PCI: xilinx-nwl: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:48:01 +0200 Message-Id: <5ac6e216bf2eaa438c8854baf2ff3e5cf0b2284f.1750858083.git.namcao@linutronix.de> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Michal Simek Cc: linux-arm-kernel@lists.infradead.org --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pcie-xilinx-nwl.c | 45 ++++++++++++------------ 2 files changed, 24 insertions(+), 22 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index c9b6180239732..118ff622fa69e 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -342,6 +342,7 @@ config PCIE_XILINX_NWL bool "Xilinx NWL PCIe controller" depends on ARCH_ZYNQMP || COMPILE_TEST depends on PCI_MSI + select IRQ_MSI_LIB help Say 'Y' here if you want kernel support for Xilinx NWL PCIe controller. The controller can act as Root Port diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/control= ler/pcie-xilinx-nwl.c index c8b05477b7198..de76c836915f0 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -145,7 +146,6 @@ #define LINK_WAIT_USLEEP_MAX 100000 =20 struct nwl_msi { /* MSI information */ - struct irq_domain *msi_domain; DECLARE_BITMAP(bitmap, INT_PCI_MSI_NR); struct irq_domain *dev_domain; struct mutex lock; /* protect bitmap variable */ @@ -418,19 +418,22 @@ static const struct irq_domain_ops intx_domain_ops = =3D { }; =20 #ifdef CONFIG_PCI_MSI -static struct irq_chip nwl_msi_irq_chip =3D { - .name =3D "nwl_pcie:msi", - .irq_enable =3D pci_msi_unmask_irq, - .irq_disable =3D pci_msi_mask_irq, - .irq_mask =3D pci_msi_mask_irq, - .irq_unmask =3D pci_msi_unmask_irq, -}; =20 -static struct msi_domain_info nwl_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_MULTI_PCI_MSI, - .chip =3D &nwl_msi_irq_chip, +#define NWL_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_NO_AFFINITY) + +#define NWL_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_MULTI_PCI_MSI) + +static const struct msi_parent_ops nwl_msi_parent_ops =3D { + .required_flags =3D NWL_MSI_FLAGS_REQUIRED, + .supported_flags =3D NWL_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .prefix =3D "nwl-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, }; + #endif =20 static void nwl_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) @@ -497,20 +500,18 @@ static int nwl_pcie_init_msi_irq_domain(struct nwl_pc= ie *pcie) struct device *dev =3D pcie->dev; struct fwnode_handle *fwnode =3D of_fwnode_handle(dev->of_node); struct nwl_msi *msi =3D &pcie->msi; - - msi->dev_domain =3D irq_domain_create_linear(NULL, INT_PCI_MSI_NR, &dev_m= si_domain_ops, pcie); + struct irq_domain_info info =3D { + .fwnode =3D fwnode, + .ops =3D &dev_msi_domain_ops, + .host_data =3D pcie, + .size =3D INT_PCI_MSI_NR, + }; + + msi->dev_domain =3D msi_create_parent_irq_domain(&info, &nwl_msi_parent_= ops); if (!msi->dev_domain) { dev_err(dev, "failed to create dev IRQ domain\n"); return -ENOMEM; } - msi->msi_domain =3D pci_msi_create_irq_domain(fwnode, - &nwl_msi_domain_info, - msi->dev_domain); - if (!msi->msi_domain) { - dev_err(dev, "failed to create msi IRQ domain\n"); - irq_domain_remove(msi->dev_domain); - return -ENOMEM; - } #endif return 0; } --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB8E52F0040; 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a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1750949330; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SPz0UIb8BdeNoBLp9wXX3nXPR2tzO5DgNka4xGkq1eY=; b=0Ttl4EGH6cdzgLzfg6Rist2/M7znNrcwcdYiO/cbmM5BmXZyzQww4BqMxKD3jx4SGxt4RQ mF5uRGyoiseCdiAg== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 12/16] PCI: xilinx: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:48:02 +0200 Message-Id: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Michal Simek Cc: linux-arm-kernel@lists.infradead.org --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pcie-xilinx.c | 55 ++++++++++++++++------------ 2 files changed, 32 insertions(+), 24 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 118ff622fa69e..8f56ffd029ba2 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -322,6 +322,7 @@ config PCIE_XILINX bool "Xilinx AXI PCIe controller" depends on OF depends on PCI_MSI + select IRQ_MSI_LIB help Say 'Y' here if you want kernel to support the Xilinx AXI PCIe Host Bridge driver. diff --git a/drivers/pci/controller/pcie-xilinx.c b/drivers/pci/controller/= pcie-xilinx.c index e36aa874bae92..ddc2ab6c48b9b 100644 --- a/drivers/pci/controller/pcie-xilinx.c +++ b/drivers/pci/controller/pcie-xilinx.c @@ -12,6 +12,7 @@ =20 #include #include +#include #include #include #include @@ -203,11 +204,6 @@ static void xilinx_msi_top_irq_ack(struct irq_data *d) */ } =20 -static struct irq_chip xilinx_msi_top_chip =3D { - .name =3D "PCIe MSI", - .irq_ack =3D xilinx_msi_top_irq_ack, -}; - static void xilinx_compose_msi_msg(struct irq_data *data, struct msi_msg *= msg) { struct xilinx_pcie *pcie =3D irq_data_get_irq_chip_data(data); @@ -264,29 +260,43 @@ static const struct irq_domain_ops xilinx_msi_domain_= ops =3D { .free =3D xilinx_msi_domain_free, }; =20 -static struct msi_domain_info xilinx_msi_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY, - .chip =3D &xilinx_msi_top_chip, +static bool xilinx_init_dev_msi_info(struct device *dev, struct irq_domain= *domain, + struct irq_domain *real_parent, struct msi_domain_info *info) +{ + struct irq_chip *chip =3D info->chip; + + if (!msi_lib_init_dev_msi_info(dev, domain, real_parent, info)) + return false; + + chip->irq_ack =3D xilinx_msi_top_irq_ack; + return true; +} + +#define XILINX_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_NO_AFFINITY) + +static const struct msi_parent_ops xilinx_msi_parent_ops =3D { + .required_flags =3D XILINX_MSI_FLAGS_REQUIRED, + .supported_flags =3D MSI_GENERIC_FLAGS_MASK, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .prefix =3D "xilinx-", + .init_dev_msi_info =3D xilinx_init_dev_msi_info, }; =20 static int xilinx_allocate_msi_domains(struct xilinx_pcie *pcie) { struct fwnode_handle *fwnode =3D dev_fwnode(pcie->dev); - struct irq_domain *parent; - - parent =3D irq_domain_create_linear(fwnode, XILINX_NUM_MSI_IRQS, - &xilinx_msi_domain_ops, pcie); - if (!parent) { - dev_err(pcie->dev, "failed to create IRQ domain\n"); - return -ENOMEM; - } - irq_domain_update_bus_token(parent, DOMAIN_BUS_NEXUS); - - pcie->msi_domain =3D pci_msi_create_irq_domain(fwnode, &xilinx_msi_info, = parent); + struct irq_domain_info info =3D { + .fwnode =3D fwnode, + .ops =3D &xilinx_msi_domain_ops, + .host_data =3D pcie, + .size =3D XILINX_NUM_MSI_IRQS, + }; + + pcie->msi_domain =3D msi_create_parent_irq_domain(&info, &xilinx_msi_pare= nt_ops); if (!pcie->msi_domain) { dev_err(pcie->dev, "failed to create MSI domain\n"); - irq_domain_remove(parent); return -ENOMEM; } =20 @@ -295,10 +305,7 @@ static int xilinx_allocate_msi_domains(struct xilinx_p= cie *pcie) =20 static void xilinx_free_msi_domains(struct xilinx_pcie *pcie) { - struct irq_domain *parent =3D pcie->msi_domain->parent; - irq_domain_remove(pcie->msi_domain); - irq_domain_remove(parent); } =20 /* INTx Functions */ --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 172BE2F0C5A; Thu, 26 Jun 2025 14:48:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949334; cv=none; b=dc3RzqIxN0l6yyvHMx87E/nXVghgumw1ThRjb+WCxN7hvMIurOBI8nIX4USsfaUDRgPBK9DT8HNPjq6CRdyG3eX/h9SqADL18XI4TfRuYtuPVw76v3WMHjOts55LEU8vyp+IE9rZ4W9/+6sX76tPBEFwZXIdlu65OdMuer9mtHE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949334; c=relaxed/simple; bh=NYHRB/RoJ7oHAMmRL0JxEnMjemauG55ZaCTPCEc9f00=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; 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b=J5+6Hx4DqMJtrLH7epLeuB/YrIrxmarnZbHXYwq68x+t+NWfBllEiTdEWkArCOxQZpkf2B ft3Uj6iPbReoL6CA== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 13/16] PCI: plda: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:48:03 +0200 Message-Id: <1279fe6500a1d8135d8f5feb2f055df008746c88.1750858083.git.namcao@linutronix.de> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Daire McNamara --- drivers/pci/controller/plda/Kconfig | 1 + drivers/pci/controller/plda/pcie-plda-host.c | 44 ++++++++++---------- drivers/pci/controller/plda/pcie-plda.h | 1 - 3 files changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/pci/controller/plda/Kconfig b/drivers/pci/controller/p= lda/Kconfig index c0e14146d7e45..62120101139cb 100644 --- a/drivers/pci/controller/plda/Kconfig +++ b/drivers/pci/controller/plda/Kconfig @@ -5,6 +5,7 @@ menu "PLDA-based PCIe controllers" =20 config PCIE_PLDA_HOST bool + select IRQ_MSI_LIB =20 config PCIE_MICROCHIP_HOST tristate "Microchip AXI PCIe controller" diff --git a/drivers/pci/controller/plda/pcie-plda-host.c b/drivers/pci/con= troller/plda/pcie-plda-host.c index 3abedf723215c..92866840875e3 100644 --- a/drivers/pci/controller/plda/pcie-plda-host.c +++ b/drivers/pci/controller/plda/pcie-plda-host.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -134,17 +135,19 @@ static const struct irq_domain_ops msi_domain_ops =3D= { .free =3D plda_irq_msi_domain_free, }; =20 -static struct irq_chip plda_msi_irq_chip =3D { - .name =3D "PLDA PCIe MSI", - .irq_ack =3D irq_chip_ack_parent, - .irq_mask =3D pci_msi_mask_irq, - .irq_unmask =3D pci_msi_unmask_irq, -}; - -static struct msi_domain_info plda_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX, - .chip =3D &plda_msi_irq_chip, +#define PLDA_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_NO_AFFINITY) +#define PLDA_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_PCI_MSIX) + +static const struct msi_parent_ops plda_msi_parent_ops =3D { + .required_flags =3D PLDA_MSI_FLAGS_REQUIRED, + .supported_flags =3D PLDA_MSI_FLAGS_SUPPORTED, + .chip_flags =3D MSI_CHIP_FLAG_SET_ACK, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .prefix =3D "PLDA-", + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, }; =20 static int plda_allocate_msi_domains(struct plda_pcie_rp *port) @@ -155,21 +158,19 @@ static int plda_allocate_msi_domains(struct plda_pcie= _rp *port) =20 mutex_init(&port->msi.lock); =20 - msi->dev_domain =3D irq_domain_create_linear(NULL, msi->num_vectors, &msi= _domain_ops, port); + struct irq_domain_info info =3D { + .fwnode =3D fwnode, + .ops =3D &msi_domain_ops, + .host_data =3D port, + .size =3D msi->num_vectors, + }; + + msi->dev_domain =3D msi_create_parent_irq_domain(&info, &plda_msi_parent_= ops); if (!msi->dev_domain) { dev_err(dev, "failed to create IRQ domain\n"); return -ENOMEM; } =20 - msi->msi_domain =3D pci_msi_create_irq_domain(fwnode, - &plda_msi_domain_info, - msi->dev_domain); - if (!msi->msi_domain) { - dev_err(dev, "failed to create MSI domain\n"); - irq_domain_remove(msi->dev_domain); - return -ENOMEM; - } - return 0; } =20 @@ -563,7 +564,6 @@ static void plda_pcie_irq_domain_deinit(struct plda_pci= e_rp *pcie) irq_set_chained_handler_and_data(pcie->msi_irq, NULL, NULL); irq_set_chained_handler_and_data(pcie->intx_irq, NULL, NULL); =20 - irq_domain_remove(pcie->msi.msi_domain); irq_domain_remove(pcie->msi.dev_domain); =20 irq_domain_remove(pcie->intx_domain); diff --git a/drivers/pci/controller/plda/pcie-plda.h b/drivers/pci/controll= er/plda/pcie-plda.h index 61ece26065ea0..6b8665df7bf0f 100644 --- a/drivers/pci/controller/plda/pcie-plda.h +++ b/drivers/pci/controller/plda/pcie-plda.h @@ -164,7 +164,6 @@ struct plda_pcie_host_ops { =20 struct plda_msi { struct mutex lock; /* Protect used bitmap */ - struct irq_domain *msi_domain; struct irq_domain *dev_domain; u32 num_vectors; u64 vector_phy; --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E5812F0E25; Thu, 26 Jun 2025 14:48:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949336; cv=none; b=oJRplaAevuWrXTJgmo/p+aANFJsX5a3fxLGzMmslvyayPPoghEKcjLDJS94/M90/0izVYEQIvY6LUdcq7dM2dGsGl5seDEhn1YoTuUlkmRRYy+uVHwb6H32xjztCCy8N+Y+DHxIYNy+bPRwk3QB7kmoRS83+nQ9cM+Vmji9ENDM= ARC-Message-Signature: i=1; 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dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="WeCmGG3U"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="kVqC7t1p" From: Nam Cao DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1750949332; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=af4jMPSbDsFEHwjALYDiqXkbkCSoSYM8oqrwc3Yb4UI=; b=WeCmGG3U2DLxocSHfjcV4NZ2JJYBdtIv+oRB+MXVUFdnT66ZgjZ/k4CY9TwtH9f/WOHlTq WnE6bIIgmNW79zVHnYRfHGn2PlpQA4fyzo/JRLT+D6OOnpLD9AdfmMgP/N6QADFOB1+nJ9 +QHHxej+KC+JgE5iHZJAyb+EHL6gKJkqabr/ySiX2HiVKCWgCwiEtwd0KQVPnY/JnYGGRB HSL1c8XiECK7t4LQwPaGOJF3G9yEYysX0H0uGw3ATSnmAzjC2XIZ8FQd+/cNcZxM2rV8My 1CT1G5Z0q/5kiI3gFbH0Az+JPqi0tVIe4jYYZGcq7+fOxikm9bSVci6H+AjBtg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1750949332; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=af4jMPSbDsFEHwjALYDiqXkbkCSoSYM8oqrwc3Yb4UI=; b=kVqC7t1pY9/9/KhXWAcXyalMa5FqUatWRMUY2OF9h47DoMwkImw8X+w85LmsD9CqGiJaE1 19k5BH0VgwqOKvDw== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 14/16] PCI: hv: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:48:04 +0200 Message-Id: <024f0122314198fe0a42fef01af53e8953a687ec.1750858083.git.namcao@linutronix.de> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: K. Y. Srinivasan Cc: Haiyang Zhang Cc: Wei Liu Cc: Dexuan Cui Cc: linux-hyperv@vger.kernel.org --- drivers/pci/Kconfig | 1 + drivers/pci/controller/pci-hyperv.c | 98 +++++++++++++++++++++++------ 2 files changed, 80 insertions(+), 19 deletions(-) diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 9c0e4aaf4e8cb..9a249c65aedcd 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -223,6 +223,7 @@ config PCI_HYPERV tristate "Hyper-V PCI Frontend" depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && SYSFS select PCI_HYPERV_INTERFACE + select IRQ_MSI_LIB help The PCI device frontend driver allows the kernel to import arbitrary PCI devices from a PCI backend to support PCI driver domains. diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/p= ci-hyperv.c index ef5d655a0052c..3a24fadddb83b 100644 --- a/drivers/pci/controller/pci-hyperv.c +++ b/drivers/pci/controller/pci-hyperv.c @@ -44,6 +44,7 @@ #include #include #include +#include #include #include #include @@ -508,7 +509,6 @@ struct hv_pcibus_device { struct list_head children; struct list_head dr_list; =20 - struct msi_domain_info msi_info; struct irq_domain *irq_domain; =20 struct workqueue_struct *wq; @@ -1687,7 +1687,7 @@ static void hv_msi_free(struct irq_domain *domain, st= ruct msi_domain_info *info, struct msi_desc *msi =3D irq_data_get_msi_desc(irq_data); =20 pdev =3D msi_desc_to_pci_dev(msi); - hbus =3D info->data; + hbus =3D domain->host_data; int_desc =3D irq_data_get_irq_chip_data(irq_data); if (!int_desc) return; @@ -1705,7 +1705,6 @@ static void hv_msi_free(struct irq_domain *domain, st= ruct msi_domain_info *info, =20 static void hv_irq_mask(struct irq_data *data) { - pci_msi_mask_irq(data); if (data->parent_data->chip->irq_mask) irq_chip_mask_parent(data); } @@ -1716,7 +1715,6 @@ static void hv_irq_unmask(struct irq_data *data) =20 if (data->parent_data->chip->irq_unmask) irq_chip_unmask_parent(data); - pci_msi_unmask_irq(data); } =20 struct compose_comp_ctxt { @@ -2101,6 +2099,44 @@ static void hv_compose_msi_msg(struct irq_data *data= , struct msi_msg *msg) msg->data =3D 0; } =20 +static bool hv_pcie_init_dev_msi_info(struct device *dev, struct irq_domai= n *domain, + struct irq_domain *real_parent, struct msi_domain_info *info) +{ + struct irq_chip *chip =3D info->chip; + + if (!msi_lib_init_dev_msi_info(dev, domain, real_parent, info)) + return false; + + info->ops->msi_prepare =3D hv_msi_prepare; + + chip->irq_set_affinity =3D irq_chip_set_affinity_parent; + + if (IS_ENABLED(CONFIG_X86)) + chip->flags |=3D IRQCHIP_MOVE_DEFERRED; + + return true; +} + +#define HV_PCIE_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS | \ + MSI_FLAG_PCI_MSI_MASK_PARENT) +#define HV_PCIE_MSI_FLAGS_SUPPORTED (MSI_FLAG_MULTI_PCI_MSI | \ + MSI_FLAG_PCI_MSIX | \ + MSI_GENERIC_FLAGS_MASK) + +static const struct msi_parent_ops hv_pcie_msi_parent_ops =3D { + .required_flags =3D HV_PCIE_MSI_FLAGS_REQUIRED, + .supported_flags =3D HV_PCIE_MSI_FLAGS_SUPPORTED, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, +#ifdef CONFIG_X86 + .chip_flags =3D MSI_CHIP_FLAG_SET_ACK, +#elif defined(CONFIG_ARM64) + .chip_flags =3D MSI_CHIP_FLAG_SET_EOI, +#endif + .prefix =3D "HV-", + .init_dev_msi_info =3D hv_pcie_init_dev_msi_info, +}; + /* HW Interrupt Chip Descriptor */ static struct irq_chip hv_msi_irq_chip =3D { .name =3D "Hyper-V PCIe MSI", @@ -2108,7 +2144,6 @@ static struct irq_chip hv_msi_irq_chip =3D { .irq_set_affinity =3D irq_chip_set_affinity_parent, #ifdef CONFIG_X86 .irq_ack =3D irq_chip_ack_parent, - .flags =3D IRQCHIP_MOVE_DEFERRED, #elif defined(CONFIG_ARM64) .irq_eoi =3D irq_chip_eoi_parent, #endif @@ -2116,9 +2151,37 @@ static struct irq_chip hv_msi_irq_chip =3D { .irq_unmask =3D hv_irq_unmask, }; =20 -static struct msi_domain_ops hv_msi_ops =3D { - .msi_prepare =3D hv_msi_prepare, - .msi_free =3D hv_msi_free, +static int hv_pcie_domain_alloc(struct irq_domain *d, unsigned int virq, u= nsigned int nr_irqs, + void *arg) +{ + /* TODO: move the content of hv_compose_msi_msg() in here */ + int ret; + + ret =3D irq_domain_alloc_irqs_parent(d, virq, nr_irqs, arg); + if (ret < 0) + return ret; + + for (int i =3D 0; i < nr_irqs; i++) { + irq_domain_set_info(d, virq + i, 0, &hv_msi_irq_chip, NULL, FLOW_HANDLER= , NULL, + FLOW_NAME); + } + + return 0; +} + +static void hv_pcie_domain_free(struct irq_domain *d, unsigned int virq, u= nsigned int nr_irqs) +{ + struct msi_domain_info *info =3D d->host_data; + + for (int i =3D 0; i < nr_irqs; i++) + hv_msi_free(d, info, virq + i); + + irq_domain_free_irqs_top(d, virq, nr_irqs); +} + +static const struct irq_domain_ops hv_pcie_domain_ops =3D { + .alloc =3D hv_pcie_domain_alloc, + .free =3D hv_pcie_domain_free, }; =20 /** @@ -2136,17 +2199,14 @@ static struct msi_domain_ops hv_msi_ops =3D { */ static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus) { - hbus->msi_info.chip =3D &hv_msi_irq_chip; - hbus->msi_info.ops =3D &hv_msi_ops; - hbus->msi_info.flags =3D (MSI_FLAG_USE_DEF_DOM_OPS | - MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI | - MSI_FLAG_PCI_MSIX); - hbus->msi_info.handler =3D FLOW_HANDLER; - hbus->msi_info.handler_name =3D FLOW_NAME; - hbus->msi_info.data =3D hbus; - hbus->irq_domain =3D pci_msi_create_irq_domain(hbus->fwnode, - &hbus->msi_info, - hv_pci_get_root_domain()); + struct irq_domain_info info =3D { + .fwnode =3D hbus->fwnode, + .ops =3D &hv_pcie_domain_ops, + .host_data =3D hbus, + .parent =3D hv_pci_get_root_domain(), + }; + + hbus->irq_domain =3D msi_create_parent_irq_domain(&info, &hv_pcie_msi_par= ent_ops); if (!hbus->irq_domain) { dev_err(&hbus->hdev->device, "Failed to build an MSI IRQ domain\n"); --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F7052F0E4F; Thu, 26 Jun 2025 14:48:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949337; cv=none; b=enB2xHwH2EgGC+vwyVik1geAPuaKOf1egRA6G+zZ6nhGVFG1QbKWNyy8Pw/cHvvG84Zh/Yf4hSk/KFo6jF+AxCuxFWBshEnApIdTiMTeBxBKQbipnb8rtDVhg3kmvIjhC5f1Vx6N4DxnQ4YVkVBVNIXVn5WZINiSCK+gF0xwjic= ARC-Message-Signature: i=1; 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h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=eCmrCueJeRS5ibC5xxnWfa61fpspJ03Yh0ZfFkdp9c0=; b=QRkvml8xuqeE/T0T/GtW59FNC+nurgJExh7WDPwC30vEPHH2tnY37E23Gw86l4Xa+UrrDi grm02T3W7v93ESDQ== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 15/16] PCI: vmd: Convert to lock guards Date: Thu, 26 Jun 2025 16:48:05 +0200 Message-Id: <836cca37449c70922a2bea1fb13f37940a7a7132.1750858083.git.namcao@linutronix.de> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert lock/unlock pairs to lock guard and tidy up the code. Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Nirmal Patel Cc: Jonathan Derrick --- drivers/pci/controller/vmd.c | 73 ++++++++++++++---------------------- 1 file changed, 29 insertions(+), 44 deletions(-) diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c index 375ce9d6d9f6a..d9b893bf4e456 100644 --- a/drivers/pci/controller/vmd.c +++ b/drivers/pci/controller/vmd.c @@ -180,13 +180,12 @@ static void vmd_compose_msi_msg(struct irq_data *data= , struct msi_msg *msg) static void vmd_irq_enable(struct irq_data *data) { struct vmd_irq *vmdirq =3D data->chip_data; - unsigned long flags; =20 - raw_spin_lock_irqsave(&list_lock, flags); - WARN_ON(vmdirq->enabled); - list_add_tail_rcu(&vmdirq->node, &vmdirq->irq->irq_list); - vmdirq->enabled =3D true; - raw_spin_unlock_irqrestore(&list_lock, flags); + scoped_guard(raw_spinlock_irqsave, &list_lock) { + WARN_ON(vmdirq->enabled); + list_add_tail_rcu(&vmdirq->node, &vmdirq->irq->irq_list); + vmdirq->enabled =3D true; + } =20 data->chip->irq_unmask(data); } @@ -194,16 +193,15 @@ static void vmd_irq_enable(struct irq_data *data) static void vmd_irq_disable(struct irq_data *data) { struct vmd_irq *vmdirq =3D data->chip_data; - unsigned long flags; =20 data->chip->irq_mask(data); =20 - raw_spin_lock_irqsave(&list_lock, flags); - if (vmdirq->enabled) { - list_del_rcu(&vmdirq->node); - vmdirq->enabled =3D false; + scoped_guard(raw_spinlock_irqsave, &list_lock) { + if (vmdirq->enabled) { + list_del_rcu(&vmdirq->node); + vmdirq->enabled =3D false; + } } - raw_spin_unlock_irqrestore(&list_lock, flags); } =20 static struct irq_chip vmd_msi_controller =3D { @@ -225,7 +223,6 @@ static irq_hw_number_t vmd_get_hwirq(struct msi_domain_= info *info, */ static struct vmd_irq_list *vmd_next_irq(struct vmd_dev *vmd, struct msi_d= esc *desc) { - unsigned long flags; int i, best; =20 if (vmd->msix_count =3D=3D 1 + vmd->first_vec) @@ -242,13 +239,13 @@ static struct vmd_irq_list *vmd_next_irq(struct vmd_d= ev *vmd, struct msi_desc *d return &vmd->irqs[vmd->first_vec]; } =20 - raw_spin_lock_irqsave(&list_lock, flags); - best =3D vmd->first_vec + 1; - for (i =3D best; i < vmd->msix_count; i++) - if (vmd->irqs[i].count < vmd->irqs[best].count) - best =3D i; - vmd->irqs[best].count++; - raw_spin_unlock_irqrestore(&list_lock, flags); + scoped_guard(raw_spinlock_irq, &list_lock) { + best =3D vmd->first_vec + 1; + for (i =3D best; i < vmd->msix_count; i++) + if (vmd->irqs[i].count < vmd->irqs[best].count) + best =3D i; + vmd->irqs[best].count++; + } =20 return &vmd->irqs[best]; } @@ -277,14 +274,12 @@ static void vmd_msi_free(struct irq_domain *domain, struct msi_domain_info *info, unsigned int virq) { struct vmd_irq *vmdirq =3D irq_get_chip_data(virq); - unsigned long flags; =20 synchronize_srcu(&vmdirq->irq->srcu); =20 /* XXX: Potential optimization to rebalance */ - raw_spin_lock_irqsave(&list_lock, flags); - vmdirq->irq->count--; - raw_spin_unlock_irqrestore(&list_lock, flags); + scoped_guard(raw_spinlock_irq, &list_lock) + vmdirq->irq->count--; =20 kfree(vmdirq); } @@ -387,29 +382,24 @@ static int vmd_pci_read(struct pci_bus *bus, unsigned= int devfn, int reg, { struct vmd_dev *vmd =3D vmd_from_bus(bus); void __iomem *addr =3D vmd_cfg_addr(vmd, bus, devfn, reg, len); - unsigned long flags; - int ret =3D 0; =20 if (!addr) return -EFAULT; =20 - raw_spin_lock_irqsave(&vmd->cfg_lock, flags); + guard(raw_spinlock_irqsave)(&vmd->cfg_lock); switch (len) { case 1: *value =3D readb(addr); - break; + return 0; case 2: *value =3D readw(addr); - break; + return 0; case 4: *value =3D readl(addr); - break; + return 0; default: - ret =3D -EINVAL; - break; + return -EINVAL; } - raw_spin_unlock_irqrestore(&vmd->cfg_lock, flags); - return ret; } =20 /* @@ -422,32 +412,27 @@ static int vmd_pci_write(struct pci_bus *bus, unsigne= d int devfn, int reg, { struct vmd_dev *vmd =3D vmd_from_bus(bus); void __iomem *addr =3D vmd_cfg_addr(vmd, bus, devfn, reg, len); - unsigned long flags; - int ret =3D 0; =20 if (!addr) return -EFAULT; =20 - raw_spin_lock_irqsave(&vmd->cfg_lock, flags); + guard(raw_spinlock_irqsave)(&vmd->cfg_lock); switch (len) { case 1: writeb(value, addr); readb(addr); - break; + return 0; case 2: writew(value, addr); readw(addr); - break; + return 0; case 4: writel(value, addr); readl(addr); - break; + return 0; default: - ret =3D -EINVAL; - break; + return -EINVAL; } - raw_spin_unlock_irqrestore(&vmd->cfg_lock, flags); - return ret; } =20 static struct pci_ops vmd_ops =3D { --=20 2.39.5 From nobody Wed Oct 8 14:52:40 2025 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4B452F0E5D; Thu, 26 Jun 2025 14:48:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750949338; cv=none; b=jlB5Vp+zyGHjRC+PcT1vc9nzfrgmEfeV1TnuhbeFYi+fbJ+LNaE2ZF+iWjyH2K9WSd9GiWubZcTVlTLcN63a8jX3VC4w2FM2XNQpAPvNIbJUVhgdV/h3oO+qQb+bkGvNhAdRyWtZsMKIp1oj1feMvP7C27wa5ZqqmJqj9AP1HOE= ARC-Message-Signature: i=1; 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h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rk3H9RFUvmNY5RjaBgBDpAsPmWU5zFd/wV/8KHcc9Jo=; b=PJDuAZfuBgWAnsvNtnV4iMVqFsZvxtIfRFTbFJ3+oao6m90FOulpO3WQMdJFoFhXE6NATR O57SQu4FvAsl51Bw== To: Marc Zyngier , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Karthikeyan Mitran , Hou Zhiqiang , Thomas Petazzoni , =?UTF-8?q?Pali=20Roh=C3=A1r?= , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Joyce Ooi , Jim Quinlan , Nicolas Saenz Julienne , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Ryder Lee , Jianjun Wang , Marek Vasut , Yoshihiro Shimoda , Michal Simek , Daire McNamara , Nirmal Patel , Jonathan Derrick , Matthias Brugger , AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org Cc: Nam Cao Subject: [PATCH 16/16] PCI: vmd: Switch to msi_create_parent_irq_domain() Date: Thu, 26 Jun 2025 16:48:06 +0200 Message-Id: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move away from the legacy MSI domain setup, switch to use msi_create_parent_irq_domain(). Signed-off-by: Nam Cao Acked-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner --- Cc: Nirmal Patel Cc: Jonathan Derrick --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/vmd.c | 160 +++++++++++++++++---------------- 2 files changed, 82 insertions(+), 79 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 8f56ffd029ba2..41748d083b933 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -156,6 +156,7 @@ config PCI_IXP4XX config VMD depends on PCI_MSI && X86_64 && !UML tristate "Intel Volume Management Device Driver" + select IRQ_MSI_LIB help Adds support for the Intel Volume Management Device (VMD). VMD is a secondary PCI host bridge that allows PCI Express root ports, diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c index d9b893bf4e456..38693a9487d9b 100644 --- a/drivers/pci/controller/vmd.c +++ b/drivers/pci/controller/vmd.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -174,9 +175,6 @@ static void vmd_compose_msi_msg(struct irq_data *data, = struct msi_msg *msg) msg->arch_addr_lo.destid_0_7 =3D index_from_irqs(vmd, irq); } =20 -/* - * We rely on MSI_FLAG_USE_DEF_CHIP_OPS to set the IRQ mask/unmask ops. - */ static void vmd_irq_enable(struct irq_data *data) { struct vmd_irq *vmdirq =3D data->chip_data; @@ -186,7 +184,11 @@ static void vmd_irq_enable(struct irq_data *data) list_add_tail_rcu(&vmdirq->node, &vmdirq->irq->irq_list); vmdirq->enabled =3D true; } +} =20 +static void vmd_pci_msi_enable(struct irq_data *data) +{ + vmd_irq_enable(data->parent_data); data->chip->irq_unmask(data); } =20 @@ -194,8 +196,6 @@ static void vmd_irq_disable(struct irq_data *data) { struct vmd_irq *vmdirq =3D data->chip_data; =20 - data->chip->irq_mask(data); - scoped_guard(raw_spinlock_irqsave, &list_lock) { if (vmdirq->enabled) { list_del_rcu(&vmdirq->node); @@ -204,19 +204,17 @@ static void vmd_irq_disable(struct irq_data *data) } } =20 +static void vmd_pci_msi_disable(struct irq_data *data) +{ + data->chip->irq_mask(data); + vmd_irq_disable(data->parent_data); +} + static struct irq_chip vmd_msi_controller =3D { .name =3D "VMD-MSI", - .irq_enable =3D vmd_irq_enable, - .irq_disable =3D vmd_irq_disable, .irq_compose_msi_msg =3D vmd_compose_msi_msg, }; =20 -static irq_hw_number_t vmd_get_hwirq(struct msi_domain_info *info, - msi_alloc_info_t *arg) -{ - return 0; -} - /* * XXX: We can be even smarter selecting the best IRQ once we solve the * affinity problem. @@ -250,100 +248,110 @@ static struct vmd_irq_list *vmd_next_irq(struct vmd= _dev *vmd, struct msi_desc *d return &vmd->irqs[best]; } =20 -static int vmd_msi_init(struct irq_domain *domain, struct msi_domain_info = *info, - unsigned int virq, irq_hw_number_t hwirq, - msi_alloc_info_t *arg) +static void vmd_msi_free(struct irq_domain *domain, unsigned int virq, uns= igned int nr_irqs); + +static int vmd_msi_alloc(struct irq_domain *domain, unsigned int virq, uns= igned int nr_irqs, + void *arg) { - struct msi_desc *desc =3D arg->desc; - struct vmd_dev *vmd =3D vmd_from_bus(msi_desc_to_pci_dev(desc)->bus); - struct vmd_irq *vmdirq =3D kzalloc(sizeof(*vmdirq), GFP_KERNEL); + struct msi_desc *desc =3D ((msi_alloc_info_t *)arg)->desc; + struct vmd_dev *vmd =3D domain->host_data; + struct vmd_irq *vmdirq; =20 - if (!vmdirq) - return -ENOMEM; + for (int i =3D 0; i < nr_irqs; ++i) { + vmdirq =3D kzalloc(sizeof(*vmdirq), GFP_KERNEL); + if (!vmdirq) { + vmd_msi_free(domain, virq, i); + return -ENOMEM; + } =20 - INIT_LIST_HEAD(&vmdirq->node); - vmdirq->irq =3D vmd_next_irq(vmd, desc); - vmdirq->virq =3D virq; + INIT_LIST_HEAD(&vmdirq->node); + vmdirq->irq =3D vmd_next_irq(vmd, desc); + vmdirq->virq =3D virq + i; + + irq_domain_set_info(domain, virq + i, vmdirq->irq->virq, &vmd_msi_contro= ller, + vmdirq, handle_untracked_irq, vmd, NULL); + } =20 - irq_domain_set_info(domain, virq, vmdirq->irq->virq, info->chip, vmdirq, - handle_untracked_irq, vmd, NULL); return 0; } =20 -static void vmd_msi_free(struct irq_domain *domain, - struct msi_domain_info *info, unsigned int virq) +static void vmd_msi_free(struct irq_domain *domain, unsigned int virq, uns= igned int nr_irqs) { struct vmd_irq *vmdirq =3D irq_get_chip_data(virq); =20 - synchronize_srcu(&vmdirq->irq->srcu); + for (int i =3D 0; i < nr_irqs; ++i) { + synchronize_srcu(&vmdirq->irq->srcu); =20 - /* XXX: Potential optimization to rebalance */ - scoped_guard(raw_spinlock_irq, &list_lock) - vmdirq->irq->count--; + /* XXX: Potential optimization to rebalance */ + scoped_guard(raw_spinlock_irq, &list_lock) + vmdirq->irq->count--; =20 - kfree(vmdirq); + kfree(vmdirq); + } } =20 -static int vmd_msi_prepare(struct irq_domain *domain, struct device *dev, - int nvec, msi_alloc_info_t *arg) +static const struct irq_domain_ops vmd_msi_domain_ops =3D { + .alloc =3D vmd_msi_alloc, + .free =3D vmd_msi_free, +}; + +static bool vmd_init_dev_msi_info(struct device *dev, struct irq_domain *d= omain, + struct irq_domain *real_parent, struct msi_domain_info *info) { - struct pci_dev *pdev =3D to_pci_dev(dev); - struct vmd_dev *vmd =3D vmd_from_bus(pdev->bus); + if (WARN_ON_ONCE(info->bus_token !=3D DOMAIN_BUS_PCI_DEVICE_MSIX)) + return false; =20 - if (nvec > vmd->msix_count) - return vmd->msix_count; + if (!msi_lib_init_dev_msi_info(dev, domain, real_parent, info)) + return false; =20 - memset(arg, 0, sizeof(*arg)); - return 0; + info->chip->irq_enable =3D vmd_pci_msi_enable; + info->chip->irq_disable =3D vmd_pci_msi_disable; + return true; } =20 -static void vmd_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc) -{ - arg->desc =3D desc; -} +#define VMD_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | MSI_FLAG_PCI_MS= IX) +#define VMD_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_NO_AF= FINITY) =20 -static struct msi_domain_ops vmd_msi_domain_ops =3D { - .get_hwirq =3D vmd_get_hwirq, - .msi_init =3D vmd_msi_init, - .msi_free =3D vmd_msi_free, - .msi_prepare =3D vmd_msi_prepare, - .set_desc =3D vmd_set_desc, +static const struct msi_parent_ops vmd_msi_parent_ops =3D { + .supported_flags =3D VMD_MSI_FLAGS_SUPPORTED, + .required_flags =3D VMD_MSI_FLAGS_REQUIRED, + .bus_select_token =3D DOMAIN_BUS_VMD_MSI, + .bus_select_mask =3D MATCH_PCI_MSI, + .prefix =3D "VMD-", + .init_dev_msi_info =3D vmd_init_dev_msi_info, }; =20 -static struct msi_domain_info vmd_msi_domain_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX, - .ops =3D &vmd_msi_domain_ops, - .chip =3D &vmd_msi_controller, -}; - -static void vmd_set_msi_remapping(struct vmd_dev *vmd, bool enable) -{ - u16 reg; - - pci_read_config_word(vmd->dev, PCI_REG_VMCONFIG, ®); - reg =3D enable ? (reg & ~VMCONFIG_MSI_REMAP) : - (reg | VMCONFIG_MSI_REMAP); - pci_write_config_word(vmd->dev, PCI_REG_VMCONFIG, reg); -} - static int vmd_create_irq_domain(struct vmd_dev *vmd) { - struct fwnode_handle *fn; + struct irq_domain_info info =3D { + .size =3D vmd->msix_count, + .ops =3D &vmd_msi_domain_ops, + .host_data =3D vmd, + }; =20 - fn =3D irq_domain_alloc_named_id_fwnode("VMD-MSI", vmd->sysdata.domain); - if (!fn) + info.fwnode =3D irq_domain_alloc_named_id_fwnode("VMD-MSI", vmd->sysdata.= domain); + if (!info.fwnode) return -ENODEV; =20 - vmd->irq_domain =3D pci_msi_create_irq_domain(fn, &vmd_msi_domain_info, N= ULL); + vmd->irq_domain =3D msi_create_parent_irq_domain(&info, &vmd_msi_parent_o= ps); if (!vmd->irq_domain) { - irq_domain_free_fwnode(fn); + irq_domain_free_fwnode(info.fwnode); return -ENODEV; } =20 return 0; } =20 +static void vmd_set_msi_remapping(struct vmd_dev *vmd, bool enable) +{ + u16 reg; + + pci_read_config_word(vmd->dev, PCI_REG_VMCONFIG, ®); + reg =3D enable ? (reg & ~VMCONFIG_MSI_REMAP) : + (reg | VMCONFIG_MSI_REMAP); + pci_write_config_word(vmd->dev, PCI_REG_VMCONFIG, reg); +} + static void vmd_remove_irq_domain(struct vmd_dev *vmd) { /* @@ -874,12 +882,6 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsi= gned long features) ret =3D vmd_create_irq_domain(vmd); if (ret) return ret; - - /* - * Override the IRQ domain bus token so the domain can be - * distinguished from a regular PCI/MSI domain. - */ - irq_domain_update_bus_token(vmd->irq_domain, DOMAIN_BUS_VMD_MSI); } else { vmd_set_msi_remapping(vmd, false); } --=20 2.39.5