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charset="utf-8" Reverse 'create' vs 'mm =3D=3D &init_mm' conditions and move page table mask modification out of the atomic context. This is a prerequisite for locking kernel page tables. Reviewed-by: Nicholas Piggin Signed-off-by: Alexander Gordeev --- mm/memory.c | 28 +++++++++++++++++----------- 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/mm/memory.c b/mm/memory.c index 8eba595056fe..71b3d3f98999 100644 --- a/mm/memory.c +++ b/mm/memory.c @@ -3006,24 +3006,28 @@ static int apply_to_pte_range(struct mm_struct *mm,= pmd_t *pmd, pte_fn_t fn, void *data, bool create, pgtbl_mod_mask *mask) { + int err =3D create ? -ENOMEM : -EINVAL; pte_t *pte, *mapped_pte; - int err =3D 0; spinlock_t *ptl; =20 - if (create) { - mapped_pte =3D pte =3D (mm =3D=3D &init_mm) ? - pte_alloc_kernel_track(pmd, addr, mask) : - pte_alloc_map_lock(mm, pmd, addr, &ptl); + if (mm =3D=3D &init_mm) { + if (create) + pte =3D pte_alloc_kernel_track(pmd, addr, mask); + else + pte =3D pte_offset_kernel(pmd, addr); if (!pte) - return -ENOMEM; + return err; } else { - mapped_pte =3D pte =3D (mm =3D=3D &init_mm) ? - pte_offset_kernel(pmd, addr) : - pte_offset_map_lock(mm, pmd, addr, &ptl); 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charset="utf-8" As a follow-up to commit 691ee97e1a9d ("mm: fix lazy mmu docs and usage") take a step forward and protect with a lock not only user, but also kernel mappings before entering the lazy MMU mode. With that the semantics of arch_enter|leave_lazy_mmu_mode() callbacks is consolidated, which allows further simplifications. The effect of this consolidation is not fully preemptible (Real-Time) kernels can not enter the context switch while the lazy MMU mode is active - which is easier to comprehend. Signed-off-by: Alexander Gordeev --- include/linux/pgtable.h | 12 ++++++------ mm/kasan/shadow.c | 5 ----- mm/memory.c | 5 ++++- mm/vmalloc.c | 6 ++++++ 4 files changed, 16 insertions(+), 12 deletions(-) diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h index 0b6e1f781d86..33bf2b13c219 100644 --- a/include/linux/pgtable.h +++ b/include/linux/pgtable.h @@ -224,12 +224,12 @@ static inline int pmd_dirty(pmd_t pmd) * a raw PTE pointer after it has been modified are not guaranteed to be * up to date. * - * In the general case, no lock is guaranteed to be held between entry and= exit - * of the lazy mode. So the implementation must assume preemption may be e= nabled - * and cpu migration is possible; it must take steps to be robust against = this. - * (In practice, for user PTE updates, the appropriate page table lock(s) = are - * held, but for kernel PTE updates, no lock is held). Nesting is not perm= itted - * and the mode cannot be used in interrupt context. + * For PREEMPT_RT kernels implementation must assume that preemption may + * be enabled and cpu migration is possible between entry and exit of the + * lazy MMU mode; it must take steps to be robust against this. There is + * no such assumption for non-PREEMPT_RT kernels, since both kernel and + * user page tables are protected with a spinlock while in lazy MMU mode. + * Nesting is not permitted and the mode cannot be used in interrupt conte= xt. */ #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE #define arch_enter_lazy_mmu_mode() do {} while (0) diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c index d2c70cd2afb1..45115bd770a9 100644 --- a/mm/kasan/shadow.c +++ b/mm/kasan/shadow.c @@ -313,12 +313,10 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, un= signed long addr, __memset(page_to_virt(page), KASAN_VMALLOC_INVALID, PAGE_SIZE); pte =3D pfn_pte(page_to_pfn(page), PAGE_KERNEL); =20 - spin_lock(&init_mm.page_table_lock); if (likely(pte_none(ptep_get(ptep)))) { set_pte_at(&init_mm, addr, ptep, pte); data->pages[index] =3D NULL; } - spin_unlock(&init_mm.page_table_lock); =20 return 0; } @@ -465,13 +463,10 @@ static int kasan_depopulate_vmalloc_pte(pte_t *ptep, = unsigned long addr, =20 page =3D (unsigned long)__va(pte_pfn(ptep_get(ptep)) << PAGE_SHIFT); =20 - spin_lock(&init_mm.page_table_lock); - if (likely(!pte_none(ptep_get(ptep)))) { pte_clear(&init_mm, addr, ptep); free_page(page); } - spin_unlock(&init_mm.page_table_lock); =20 return 0; } diff --git a/mm/memory.c b/mm/memory.c index 71b3d3f98999..1ddc532b1f13 100644 --- a/mm/memory.c +++ b/mm/memory.c @@ -3017,6 +3017,7 @@ static int apply_to_pte_range(struct mm_struct *mm, p= md_t *pmd, pte =3D pte_offset_kernel(pmd, addr); if (!pte) return err; + spin_lock(&init_mm.page_table_lock); } else { if (create) pte =3D pte_alloc_map_lock(mm, pmd, addr, &ptl); @@ -3042,7 +3043,9 @@ static int apply_to_pte_range(struct mm_struct *mm, p= md_t *pmd, =20 arch_leave_lazy_mmu_mode(); =20 - if (mm !=3D &init_mm) + if (mm =3D=3D &init_mm) + spin_unlock(&init_mm.page_table_lock); + else pte_unmap_unlock(mapped_pte, ptl); =20 *mask |=3D PGTBL_PTE_MODIFIED; diff --git a/mm/vmalloc.c b/mm/vmalloc.c index ab986dd09b6a..57b11000ae36 100644 --- a/mm/vmalloc.c +++ b/mm/vmalloc.c @@ -105,6 +105,7 @@ static int vmap_pte_range(pmd_t *pmd, unsigned long add= r, unsigned long end, if (!pte) return -ENOMEM; =20 + spin_lock(&init_mm.page_table_lock); arch_enter_lazy_mmu_mode(); =20 do { @@ -132,6 +133,7 @@ static int vmap_pte_range(pmd_t *pmd, unsigned long add= r, unsigned long end, } while (pte +=3D PFN_DOWN(size), addr +=3D size, addr !=3D end); =20 arch_leave_lazy_mmu_mode(); + spin_unlock(&init_mm.page_table_lock); *mask |=3D PGTBL_PTE_MODIFIED; return 0; } @@ -359,6 +361,7 @@ static void vunmap_pte_range(pmd_t *pmd, unsigned long = addr, unsigned long end, unsigned long size =3D PAGE_SIZE; =20 pte =3D pte_offset_kernel(pmd, addr); + spin_lock(&init_mm.page_table_lock); arch_enter_lazy_mmu_mode(); =20 do { @@ -379,6 +382,7 @@ static void vunmap_pte_range(pmd_t *pmd, unsigned long = addr, unsigned long end, } while (pte +=3D (size >> PAGE_SHIFT), addr +=3D size, addr !=3D end); =20 arch_leave_lazy_mmu_mode(); + spin_unlock(&init_mm.page_table_lock); *mask |=3D PGTBL_PTE_MODIFIED; } =20 @@ -525,6 +529,7 @@ static int vmap_pages_pte_range(pmd_t *pmd, unsigned lo= ng addr, if (!pte) return -ENOMEM; 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charset="utf-8" Make default arch_enter|leave|flush_lazy_mmu_mode() callbacks complain on enabled preemption to detect wrong contexts. That could help to prevent the complicated lazy MMU mode semantics misuse, such like one that was solved with commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash lazy mmu mode"). Skip fully preemptible kernels, since in such case taking the page table lock does not disable preemption, so the described check would be wrong. Most platforms do not implement the lazy MMU mode callbacks, so to aovid a performance impact allow the complaint when CONFIG_DEBUG_VM option is enabled only. Reviewed-by: Nicholas Piggin Signed-off-by: Alexander Gordeev --- include/linux/pgtable.h | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h index 33bf2b13c219..0cb8abdc58a8 100644 --- a/include/linux/pgtable.h +++ b/include/linux/pgtable.h @@ -232,9 +232,23 @@ static inline int pmd_dirty(pmd_t pmd) * Nesting is not permitted and the mode cannot be used in interrupt conte= xt. */ #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE -#define arch_enter_lazy_mmu_mode() do {} while (0) -#define arch_leave_lazy_mmu_mode() do {} while (0) -#define arch_flush_lazy_mmu_mode() do {} while (0) +static inline void arch_enter_lazy_mmu_mode(void) +{ + if (!IS_ENABLED(CONFIG_PREEMPT_RT)) + VM_WARN_ON_ONCE(preemptible()); +} + +static inline void arch_leave_lazy_mmu_mode(void) +{ + if (!IS_ENABLED(CONFIG_PREEMPT_RT)) + VM_WARN_ON_ONCE(preemptible()); +} + +static inline void arch_flush_lazy_mmu_mode(void) +{ + if (!IS_ENABLED(CONFIG_PREEMPT_RT)) + VM_WARN_ON_ONCE(preemptible()); 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charset="utf-8" Commit a1d416bf9faf ("sparc/mm: disable preemption in lazy mmu mode") is not necessary anymore, since the lazy MMU mode is entered with a spinlock held and sparc does not support Real-Time. Thus, upon entering the lazy mode the preemption is already disabled. Signed-off-by: Alexander Gordeev --- arch/sparc/include/asm/tlbflush_64.h | 2 +- arch/sparc/mm/tlb.c | 12 ++++++++---- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/sparc/include/asm/tlbflush_64.h b/arch/sparc/include/asm/= tlbflush_64.h index 8b8cdaa69272..a6d8068fb211 100644 --- a/arch/sparc/include/asm/tlbflush_64.h +++ b/arch/sparc/include/asm/tlbflush_64.h @@ -44,7 +44,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned= long end); void flush_tlb_pending(void); void arch_enter_lazy_mmu_mode(void); void arch_leave_lazy_mmu_mode(void); -#define arch_flush_lazy_mmu_mode() do {} while (0) +void arch_flush_lazy_mmu_mode(void); =20 /* Local cpu only. */ void __flush_tlb_all(void); diff --git a/arch/sparc/mm/tlb.c b/arch/sparc/mm/tlb.c index a35ddcca5e76..e46dfd5f2583 100644 --- a/arch/sparc/mm/tlb.c +++ b/arch/sparc/mm/tlb.c @@ -52,10 +52,9 @@ void flush_tlb_pending(void) =20 void arch_enter_lazy_mmu_mode(void) { - struct tlb_batch *tb; + struct tlb_batch *tb =3D this_cpu_ptr(&tlb_batch); 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charset="utf-8" Commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash lazy mmu mode") is not necessary anymore, since the lazy MMU mode is entered with a spinlock held and powerpc does not support Real-Time. Thus, upon entering the lazy mode the preemption is already disabled. Signed-off-by: Alexander Gordeev --- arch/powerpc/include/asm/book3s/64/tlbflush-hash.h | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h b/arch/powe= rpc/include/asm/book3s/64/tlbflush-hash.h index 146287d9580f..aeac22b576c8 100644 --- a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h @@ -30,13 +30,9 @@ static inline void arch_enter_lazy_mmu_mode(void) { struct ppc64_tlb_batch *batch; =20 + VM_WARN_ON_ONCE(preemptible()); if (radix_enabled()) return; - /* - * apply_to_page_range can call us this preempt enabled when - * operating on kernel page tables. - */ - preempt_disable(); batch =3D this_cpu_ptr(&ppc64_tlb_batch); batch->active =3D 1; } @@ -45,6 +41,7 @@ static inline void arch_leave_lazy_mmu_mode(void) { struct ppc64_tlb_batch *batch; =20 + VM_WARN_ON_ONCE(preemptible()); if (radix_enabled()) return; batch =3D this_cpu_ptr(&ppc64_tlb_batch); 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charset="utf-8" Since commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash lazy mmu mode") a task can not be preempted while in lazy MMU mode. Therefore, the batch re-activation code is never called, so remove it. Signed-off-by: Alexander Gordeev --- arch/powerpc/include/asm/thread_info.h | 2 -- arch/powerpc/kernel/process.c | 25 ------------------------- 2 files changed, 27 deletions(-) diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/= asm/thread_info.h index 2785c7462ebf..092118a68862 100644 --- a/arch/powerpc/include/asm/thread_info.h +++ b/arch/powerpc/include/asm/thread_info.h @@ -154,12 +154,10 @@ void arch_setup_new_exec(void); /* Don't move TLF_NAPPING without adjusting the code in entry_32.S */ #define TLF_NAPPING 0 /* idle thread enabled NAP mode */ #define TLF_SLEEPING 1 /* suspend code enabled SLEEP mode */ -#define TLF_LAZY_MMU 3 /* tlb_batch is active */ #define TLF_RUNLATCH 4 /* Is the runlatch enabled? */ =20 #define _TLF_NAPPING (1 << TLF_NAPPING) #define _TLF_SLEEPING (1 << TLF_SLEEPING) -#define _TLF_LAZY_MMU (1 << TLF_LAZY_MMU) #define _TLF_RUNLATCH (1 << TLF_RUNLATCH) =20 #ifndef __ASSEMBLY__ diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 855e09886503..edb59a447149 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c @@ -1281,9 +1281,6 @@ struct task_struct *__switch_to(struct task_struct *p= rev, { struct thread_struct *new_thread, *old_thread; struct task_struct *last; -#ifdef CONFIG_PPC_64S_HASH_MMU - struct ppc64_tlb_batch *batch; -#endif =20 new_thread =3D &new->thread; old_thread =3D ¤t->thread; @@ -1291,14 +1288,6 @@ struct task_struct *__switch_to(struct task_struct *= prev, WARN_ON(!irqs_disabled()); =20 #ifdef CONFIG_PPC_64S_HASH_MMU - batch =3D this_cpu_ptr(&ppc64_tlb_batch); - if (batch->active) { - current_thread_info()->local_flags |=3D _TLF_LAZY_MMU; - if (batch->index) - __flush_tlb_pending(batch); - batch->active =3D 0; - } - /* * On POWER9 the copy-paste buffer can only paste into * foreign real addresses, so unprivileged processes can not @@ -1369,20 +1358,6 @@ struct task_struct *__switch_to(struct task_struct *= prev, */ =20 #ifdef CONFIG_PPC_BOOK3S_64 -#ifdef CONFIG_PPC_64S_HASH_MMU - /* - * This applies to a process that was context switched while inside - * arch_enter_lazy_mmu_mode(), to re-activate the batch that was - * deactivated above, before _switch(). This will never be the case - * for new tasks. - */ - if (current_thread_info()->local_flags & _TLF_LAZY_MMU) { - current_thread_info()->local_flags &=3D ~_TLF_LAZY_MMU; - batch =3D this_cpu_ptr(&ppc64_tlb_batch); - batch->active =3D 1; - } -#endif - /* * Math facilities are masked out of the child MSR in copy_thread. * A new task does not need to restore_math because it will --=20 2.48.1