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[78.94.0.50]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a561a3ce6bsm2078875f8f.49.2025.06.12.07.06.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Jun 2025 07:06:27 -0700 (PDT) From: Michal Gorlas To: Tzung-Bi Shih , Brian Norris , Julius Werner Cc: marcello.bauer@9elements.com, Michal Gorlas , chrome-platform@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/3] firmware: coreboot: support for parsing SMM related informations from coreboot tables Date: Thu, 12 Jun 2025 16:05:48 +0200 Message-ID: <815080fae73a4e879bae4851367ac7c0ad2cd551.1749734094.git.michal.gorlas@9elements.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" coreboot exposes (S)MM related data in the coreboot table. Extends existing= interface, with structure corresponding to (S)MM data, and adds parser. Parser exposes= this data to the modules executed later. Signed-off-by: Michal Gorlas --- drivers/firmware/google/Kconfig | 12 +++++ drivers/firmware/google/Makefile | 3 ++ drivers/firmware/google/coreboot_table.h | 34 ++++++++----- drivers/firmware/google/mm_info.c | 63 ++++++++++++++++++++++++ drivers/firmware/google/mm_payload.h | 58 ++++++++++++++++++++++ 5 files changed, 158 insertions(+), 12 deletions(-) create mode 100644 drivers/firmware/google/mm_info.c create mode 100644 drivers/firmware/google/mm_payload.h diff --git a/drivers/firmware/google/Kconfig b/drivers/firmware/google/Kcon= fig index 41b78f5cb735..5d918c076f25 100644 --- a/drivers/firmware/google/Kconfig +++ b/drivers/firmware/google/Kconfig @@ -81,4 +81,16 @@ config GOOGLE_VPD This option enables the kernel to expose the content of Google VPD under /sys/firmware/vpd. =20 +config COREBOOT_PAYLOAD_MM + tristate "SMI handling in Linux (LinuxBootSMM)" + depends on GOOGLE_COREBOOT_TABLE + help + Enables support for SMI handling by Linux-owned code. + coreboot reserves region for payload-owned SMI handler, the Linux + driver prepares its SMI handler outside of SMRAM, and lets coreboot + know where the handler is placed by issuing an SMI. On this SMI, the + handler is being placed in SMRAM and all supported SMIs from that point + on are handled by Linux-owned SMI handler. + If in doubt, say N. + endif # GOOGLE_FIRMWARE diff --git a/drivers/firmware/google/Makefile b/drivers/firmware/google/Mak= efile index 8151e323cc43..d2a690e8379d 100644 --- a/drivers/firmware/google/Makefile +++ b/drivers/firmware/google/Makefile @@ -12,3 +12,6 @@ obj-$(CONFIG_GOOGLE_CBMEM) +=3D cbmem.o =20 vpd-sysfs-y :=3D vpd.o vpd_decode.o obj-$(CONFIG_GOOGLE_VPD) +=3D vpd-sysfs.o + +# LinuxBootSMM related. +obj-$(CONFIG_COREBOOT_PAYLOAD_MM) +=3D mm_info.o diff --git a/drivers/firmware/google/coreboot_table.h b/drivers/firmware/go= ogle/coreboot_table.h index bb6f0f7299b4..e0b087933c5a 100644 --- a/drivers/firmware/google/coreboot_table.h +++ b/drivers/firmware/google/coreboot_table.h @@ -41,7 +41,6 @@ struct lb_cbmem_ref { }; =20 #define LB_TAG_CBMEM_ENTRY 0x31 - /* Corresponds to LB_TAG_CBMEM_ENTRY */ struct lb_cbmem_entry { u32 tag; @@ -52,6 +51,16 @@ struct lb_cbmem_entry { u32 id; }; =20 +/* Corresponds to LB_TAG_PLD_MM_INTERFACE_INFO */ +#define LB_TAG_PLD_MM_INTERFACE_INFO 0x3b +struct lb_pld_mm_interface_info { + u32 tag; + u32 size; + u8 revision; + u8 requires_long_mode_call; + u8 register_mm_entry_command; +}; + /* Describes framebuffer setup by coreboot */ struct lb_framebuffer { u32 tag; @@ -61,15 +70,15 @@ struct lb_framebuffer { u32 x_resolution; u32 y_resolution; u32 bytes_per_line; - u8 bits_per_pixel; - u8 red_mask_pos; - u8 red_mask_size; - u8 green_mask_pos; - u8 green_mask_size; - u8 blue_mask_pos; - u8 blue_mask_size; - u8 reserved_mask_pos; - u8 reserved_mask_size; + u8 bits_per_pixel; + u8 red_mask_pos; + u8 red_mask_size; + u8 green_mask_pos; + u8 green_mask_size; + u8 blue_mask_pos; + u8 blue_mask_size; + u8 reserved_mask_pos; + u8 reserved_mask_size; }; =20 /* A device, additionally with information from coreboot. */ @@ -80,6 +89,7 @@ struct coreboot_device { struct lb_cbmem_ref cbmem_ref; struct lb_cbmem_entry cbmem_entry; struct lb_framebuffer framebuffer; + struct lb_pld_mm_interface_info mm_info; DECLARE_FLEX_ARRAY(u8, raw); }; }; @@ -112,8 +122,8 @@ void coreboot_driver_unregister(struct coreboot_driver = *driver); * boilerplate. Each module may only use this macro once, and * calling it replaces module_init() and module_exit() */ -#define module_coreboot_driver(__coreboot_driver) \ +#define module_coreboot_driver(__coreboot_driver) \ module_driver(__coreboot_driver, coreboot_driver_register, \ - coreboot_driver_unregister) + coreboot_driver_unregister) =20 #endif /* __COREBOOT_TABLE_H */ diff --git a/drivers/firmware/google/mm_info.c b/drivers/firmware/google/mm= _info.c new file mode 100644 index 000000000000..55bcdc8b8d53 --- /dev/null +++ b/drivers/firmware/google/mm_info.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * mm_info.c + * + * Driver for exporting MM payload information from coreboot table. + * + * Copyright 2025 9elements gmbh + * Copyright 2025 Michal Gorlas + */ + +#include +#include +#include + +#include "coreboot_table.h" +#include "mm_payload.h" + +static struct lb_pld_mm_interface_info *mm_cbtable_info; +struct mm_info *mm_info; + +static int mm_driver_probe(struct coreboot_device *dev) +{ + mm_cbtable_info =3D &dev->mm_info; + if (mm_cbtable_info->tag !=3D LB_TAG_PLD_MM_INTERFACE_INFO) + return -ENXIO; + + mm_info =3D kmalloc(sizeof(*mm_info), GFP_KERNEL); + mm_info->revision =3D mm_cbtable_info->revision; + mm_info->requires_long_mode_call =3D + mm_cbtable_info->requires_long_mode_call; + mm_info->register_mm_entry_command =3D + mm_cbtable_info->register_mm_entry_command; + return 0; +} +EXPORT_SYMBOL(mm_info); + +static void mm_driver_remove(struct coreboot_device *dev) +{ + if (mm_info) + kfree(mm_info); +} + +static const struct coreboot_device_id mm_info_ids[] =3D { + { .tag =3D LB_TAG_PLD_MM_INTERFACE_INFO }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(coreboot, mm_info_ids); + +static struct coreboot_driver mm_driver =3D { + .probe =3D mm_driver_probe, + .remove =3D mm_driver_remove, + .drv =3D { + .name =3D "mm_info", + }, + .id_table =3D mm_info_ids, +}; + +module_coreboot_driver(mm_driver); + +MODULE_AUTHOR("Michal Gorlas "); +MODULE_DESCRIPTION("Driver for exporting MM info from coreboot table"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/firmware/google/mm_payload.h b/drivers/firmware/google= /mm_payload.h new file mode 100644 index 000000000000..bb2f55c4f240 --- /dev/null +++ b/drivers/firmware/google/mm_payload.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * mm_payload.h + * + * Internal header for MM payload driver. + * + * Copyright 2025 9elements gmbh + * Copyright 2025 Michal Gorlas + */ + +#ifndef __MM_PAYLOAD_H +#define __MM_PAYLOAD_H + +#define PAYLOAD_MM_RET_SUCCESS 0 +#define PAYLOAD_MM_RET_FAILURE 1 +#define PAYLOAD_MM_REGISTER_ENTRY 2 + +#define REALMODE_END_SIGNATURE 0x65a22c82 + +struct mm_info { + u8 revision; + u8 requires_long_mode_call; + u8 register_mm_entry_command; +}; + +extern struct mm_info *mm_info; + +#ifndef __ASSEMBLY__ + +#include + +/* This must match data at mm_handler/mm_header.S */ +struct mm_header { + u32 text_start; + u32 mm_entry_32; + u32 mm_entry_64; + u32 mm_signature; + u32 mm_blob_size; +}; + +extern struct mm_header *mm_header; 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[78.94.0.50]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a561a3ce6bsm2078875f8f.49.2025.06.12.07.06.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Jun 2025 07:06:29 -0700 (PDT) From: Michal Gorlas To: Tzung-Bi Shih , Brian Norris , Julius Werner Cc: marcello.bauer@9elements.com, Michal Gorlas , chrome-platform@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/3] firmware: coreboot: loader for Linux-owned SMI handler Date: Thu, 12 Jun 2025 16:05:49 +0200 Message-ID: <6cfb5bae79c153c54da298c396adb8a28b5e785a.1749734094.git.michal.gorlas@9elements.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Places a blob with Linux-owned SMI handler in the lower 4GB of memory, calc= ulates entry points for the it and triggers SMI to coreboot's SMI handler informing it where to look for Linux-owned SMI handler. Signed-off-by: Michal Gorlas --- drivers/firmware/google/Makefile | 9 ++ drivers/firmware/google/mm_blob.S | 20 +++ drivers/firmware/google/mm_loader.c | 186 ++++++++++++++++++++++++++++ 3 files changed, 215 insertions(+) create mode 100644 drivers/firmware/google/mm_blob.S create mode 100644 drivers/firmware/google/mm_loader.c diff --git a/drivers/firmware/google/Makefile b/drivers/firmware/google/Mak= efile index d2a690e8379d..eab5a62d7500 100644 --- a/drivers/firmware/google/Makefile +++ b/drivers/firmware/google/Makefile @@ -15,3 +15,12 @@ obj-$(CONFIG_GOOGLE_VPD) +=3D vpd-sysfs.o =20 # LinuxBootSMM related. obj-$(CONFIG_COREBOOT_PAYLOAD_MM) +=3D mm_info.o +payload-mm-$(CONFIG_COREBOOT_PAYLOAD_MM) :=3D mm_loader.o mm_blob.o + +subdir- :=3D mm_handler +obj-$(CONFIG_COREBOOT_PAYLOAD_MM) +=3D payload-mm.o + +$(obj)/mm_blob.o: $(obj)/mm_handler/handler.bin + +$(obj)/mm_handler/handler.bin: FORCE + $(Q)$(MAKE) $(build)=3D$(obj)/mm_handler $@ diff --git a/drivers/firmware/google/mm_blob.S b/drivers/firmware/google/mm= _blob.S new file mode 100644 index 000000000000..87557d67c47b --- /dev/null +++ b/drivers/firmware/google/mm_blob.S @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Derived from rmpiggy.S. + * + * Wrapper script for the MM payload binary as a transport object + * before copying to SMRAM memory. + */ +#include +#include + + .section ".init.data","aw" + + .balign PAGE_SIZE + +SYM_DATA_START(mm_blob) + .incbin "drivers/firmware/google/mm_handler/handler.bin" +SYM_DATA_END_LABEL(mm_blob, SYM_L_GLOBAL, mm_blob_end) + +SYM_DATA_START(mm_relocs) + .incbin "drivers/firmware/google/mm_handler/handler.relocs" +SYM_DATA_END(mm_relocs) diff --git a/drivers/firmware/google/mm_loader.c b/drivers/firmware/google/= mm_loader.c new file mode 100644 index 000000000000..51fbfd07f525 --- /dev/null +++ b/drivers/firmware/google/mm_loader.c @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for installing Linux-owned SMI handler + * + * Copyright (c) 2025 9elements GmbH + * + * Author: Michal Gorlas + */ + +#include +#include +#include +#include +#include +#include + +#include "mm_payload.h" + +#define DRIVER_NAME "mm_loader" + +struct mm_header *mm_header; + +static void *shared_buffer; +static size_t blob_size; + +/* + * This is x86_64 specific, assuming that we want this to also work on i38= 6, + * we either need to have "trigger_smi32" bounded by preprocessor guards(?) + * or mm_loader32 and then mm_loader$(BITS) in Makefile(?). + */ +static int trigger_smi(u64 cmd, u64 arg, u64 retry) +{ + u64 status; + u16 apmc_port =3D 0xb2; + + asm volatile("movq %[cmd], %%rax\n\t" + "movq %%rax, %%rcx\n\t" + "movq %[arg], %%rbx\n\t" + "movq %[retry], %%r8\n\t" + ".trigger:\n\t" + "mov %[apmc_port], %%dx\n\t" + "outb %%al, %%dx\n\t" + "cmpq %%rcx, %%rax\n\t" + "jne .return_changed\n\t" + "pushq %%rcx\n\t" + "movq $10000, %%rcx\n\t" + "rep nop\n\t" + "popq %%rcx\n\t" + "cmpq $0, %%r8\n\t" + "je .return_not_changed\n\t" + "decq %%r8\n\t" + "jmp .trigger\n\t" + ".return_changed:\n\t" + "movq %%rax, %[status]\n\t" + "jmp .end\n\t" + ".return_not_changed:" + "movq %%rcx, %[status]\n\t" + ".end:\n\t" + : [status] "=3Dr"(status) + : [cmd] "r"(cmd), [arg] "r"(arg), [retry] "r"(retry), + [apmc_port] "r"(apmc_port) + : "%rax", "%rbx", "%rdx", "%rcx", "%r8"); + + if (status =3D=3D cmd || status =3D=3D PAYLOAD_MM_RET_FAILURE) + status =3D PAYLOAD_MM_RET_FAILURE; + else + status =3D PAYLOAD_MM_RET_SUCCESS; + + return status; +} + +static int register_entry_point(struct mm_info *data, uint32_t entry_point) +{ + u64 cmd; + u8 status; + + cmd =3D data->register_mm_entry_command | + (PAYLOAD_MM_REGISTER_ENTRY << 8); + status =3D trigger_smi(cmd, entry_point, 5); + pr_info(DRIVER_NAME ": %s: SMI returned %x\n", __func__, status); + + return status; +} + +static u32 __init place_handler(void) +{ + /* + * The handler (aka MM blob) has to be placed in low 4GB of the memory. + * This is because we can not assume that coreboot will be in long mode + * while trying to copy the blob to SMRAM. Even if so, (can be checked by + * reading cb_data->mm_info.requires_long_mode_call), it would make our l= ife + * way too complicated (e.g. no need for shared page table). + */ + size_t entry32_offset; + size_t entry64_offset; + u16 real_mode_seg; + const u32 *rel; + u32 count; + unsigned long phys_base; + + blob_size =3D mm_payload_size_needed(); + shared_buffer =3D (void *)__get_free_pages(GFP_DMA32, get_order(blob_size= )); + + memcpy(shared_buffer, mm_blob, blob_size); + wbinvd(); + + /* + * Based on arch/x86/realmode/init.c + * The sole purpose of doing relocations is to be able to calculate the o= ffsets + * for entry points. While the absolute addresses are not valid anymore a= fter the + * blob is copied to SMRAM, the distances between sections stay the same,= so we + * can still calculate the correct entry point based on coreboot's bitnes= s. + */ + phys_base =3D __pa(shared_buffer); + real_mode_seg =3D phys_base >> 4; + rel =3D (u32 *)mm_relocs; + + /* 16-bit segment relocations. */ + count =3D *rel++; + while (count--) { + u16 *seg =3D (u16 *)(shared_buffer + *rel++); + *seg =3D real_mode_seg; + } + + /* 32-bit linear relocations. */ + count =3D *rel++; + while (count--) { + u32 *ptr =3D (u32 *)(shared_buffer + *rel++); + *ptr +=3D phys_base; + } + + mm_header =3D (struct mm_header *)shared_buffer; + + mm_header->mm_signature =3D REALMODE_END_SIGNATURE; + mm_header->mm_blob_size =3D mm_payload_size_needed(); + + /* At this point relocations are done and we can do some cool + * pointer arithmetics to help coreboot determine correct entry + * point based on offsets. + */ + entry32_offset =3D mm_header->mm_entry_32 - (unsigned long)shared_buffer; + entry64_offset =3D mm_header->mm_entry_64 - (unsigned long)shared_buffer; + + mm_header->mm_entry_32 =3D entry32_offset; + mm_header->mm_entry_64 =3D entry64_offset; + + return (unsigned long)shared_buffer; +} + +static int __init mm_loader_init(void) +{ + u32 entry_point; + + if (!mm_info) + return -ENOMEM; + + entry_point =3D place_handler(); + + if (register_entry_point(mm_info, entry_point)) { + pr_warn(DRIVER_NAME ": registering entry point for MM payload failed.\n"= ); + kfree(mm_info); + mm_info =3D NULL; + free_pages((unsigned long)shared_buffer, get_order(blob_size)); + return -1; + } + + mdelay(100); + + kfree(mm_info); + mm_info =3D NULL; + free_pages((unsigned long)shared_buffer, get_order(blob_size)); + + return 0; +} + +static void __exit mm_loader_exit(void) +{ + pr_info(DRIVER_NAME ": DONE\n"); +} + +module_init(mm_loader_init); +module_exit(mm_loader_exit); + +MODULE_AUTHOR("Michal Gorlas "); +MODULE_DESCRIPTION("MM Payload loader - installs Linux-owned SMI handler"); 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[78.94.0.50]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a561a3ce6bsm2078875f8f.49.2025.06.12.07.06.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Jun 2025 07:06:30 -0700 (PDT) From: Michal Gorlas To: Tzung-Bi Shih , Brian Norris , Julius Werner Cc: marcello.bauer@9elements.com, Michal Gorlas , chrome-platform@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v1 3/3] firmware: coreboot: Linux-owned SMI handler to be loaded by coreboot Date: Thu, 12 Jun 2025 16:05:50 +0200 Message-ID: <410d4d62b031d0e751e1933cf746540d5cb1682c.1749734094.git.michal.gorlas@9elements.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Compiled in similar fashion to the realmode trampolines for x86. Currently supported are two SMIs: ACPI enable and disable. After being placed in SMRA= M, this handler takes over handling of the supported SMIs from coreboot. Signed-off-by: Michal Gorlas --- drivers/firmware/google/mm_handler/Makefile | 51 ++ .../firmware/google/mm_handler/handler.lds.S | 46 ++ .../firmware/google/mm_handler/mm_handler.S | 510 ++++++++++++++++++ .../firmware/google/mm_handler/mm_handler.h | 21 + .../firmware/google/mm_handler/mm_header.S | 19 + 5 files changed, 647 insertions(+) create mode 100644 drivers/firmware/google/mm_handler/Makefile create mode 100644 drivers/firmware/google/mm_handler/handler.lds.S create mode 100644 drivers/firmware/google/mm_handler/mm_handler.S create mode 100644 drivers/firmware/google/mm_handler/mm_handler.h create mode 100644 drivers/firmware/google/mm_handler/mm_header.S diff --git a/drivers/firmware/google/mm_handler/Makefile b/drivers/firmware= /google/mm_handler/Makefile new file mode 100644 index 000000000000..c0069e88f51d --- /dev/null +++ b/drivers/firmware/google/mm_handler/Makefile @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0 + +## Based on realmode/rm/Makefile + +always-y :=3D handler.bin handler.relocs + +handler-y +=3D mm_header.o +handler-y +=3D mm_handler.o + +targets +=3D $(handler-y) + +REALMODE_OBJS =3D $(addprefix $(obj)/,$(handler-y)) + +sed-pasyms :=3D -n -r -e 's/^([0-9a-fA-F]+) [ABCDGRSTVW] (.+)$$/pa_\2 =3D = \2;/p' + +quiet_cmd_pasyms =3D PASYMS $@ + cmd_pasyms =3D $(NM) $(real-prereqs) | sed $(sed-pasyms) | sort | un= iq > $@ + +targets +=3D pasyms.h +$(obj)/pasyms.h: $(REALMODE_OBJS) FORCE + $(call if_changed,pasyms) + +targets +=3D handler.lds +$(obj)/handler.lds: $(obj)/pasyms.h + +LDFLAGS_handler.elf :=3D -m elf_i386 --emit-relocs -T +CPPFLAGS_handler.lds +=3D -P -C -I$(objtree)/$(obj) + +targets +=3D handler.elf +$(obj)/handler.elf: $(obj)/handler.lds $(REALMODE_OBJS) FORCE + $(call if_changed,ld) + +OBJCOPYFLAGS_handler.bin :=3D -O binary + +targets +=3D handler.bin +$(obj)/handler.bin: $(obj)/handler.elf $(obj)/handler.relocs FORCE + $(call if_changed,objcopy) + +quiet_cmd_relocs =3D RELOCS $@ + cmd_relocs =3D arch/x86/tools/relocs --realmode $< > $@ + +targets +=3D handler.relocs +$(obj)/handler.relocs: $(obj)/handler.elf FORCE + $(call if_changed,relocs) + +# ------------------------------------------------------------------------= --- + +KBUILD_CFLAGS :=3D $(REALMODE_CFLAGS) -D_SETUP -D_WAKEUP \ + -I$(srctree)/arch/x86/boot +KBUILD_AFLAGS :=3D $(KBUILD_CFLAGS) -D__ASSEMBLY__ +KBUILD_CFLAGS +=3D -fno-asynchronous-unwind-tables diff --git a/drivers/firmware/google/mm_handler/handler.lds.S b/drivers/fir= mware/google/mm_handler/handler.lds.S new file mode 100644 index 000000000000..c92c9f2fbd62 --- /dev/null +++ b/drivers/firmware/google/mm_handler/handler.lds.S @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * blob.lds.S + * + * Linker script for the MM handler. Based on realmode.lds.S + */ + +#include + +#undef i386 + +OUTPUT_FORMAT("elf32-i386") +OUTPUT_ARCH(i386) +ENTRY(pa_text_start) + +SECTIONS +{ + . =3D 0; + .header : { + *(.header) + } + + pa_text_start =3D .; + .text32 : { + *(.text32) + *(.text32.*) + } + + .text64 : { + *(.text64) + *(.text64.*) + } + + . =3D ALIGN(128); + .bss : { + *(.bss*) + } + + /DISCARD/ : { + *(.data*) + *(.note*) + *(.debug*) + } + +#include "pasyms.h" +} diff --git a/drivers/firmware/google/mm_handler/mm_handler.S b/drivers/firm= ware/google/mm_handler/mm_handler.S new file mode 100644 index 000000000000..19322010a423 --- /dev/null +++ b/drivers/firmware/google/mm_handler/mm_handler.S @@ -0,0 +1,510 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Payload owned SMI handler that is placed in SMRAM (mm_loader.c) and cal= led + * by coreboot's SMI handler + * + * Also the general comment in arch/x86/realmode/rm/trampoline_64.S is rel= evant + * here as well. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "mm_handler.h" + + .section ".text32","ax" + .code32 + .balign 4 +SYM_CODE_START(mm_entry_32) + mov $0x3f8, %dx + mov $'L', %al + out %al, (%dx) + mov $'i', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'u', %al + out %al, (%dx) + mov $'x', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'S', %al + out %al, (%dx) + mov $'M', %al + out %al, (%dx) + mov $'I', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'h', %al + out %al, (%dx) + mov $'a', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'d', %al + out %al, (%dx) + mov $'l', %al + out %al, (%dx) + mov $'e', %al + out %al, (%dx) + mov $'r', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'s', %al + out %al, (%dx) + mov $'t', %al + out %al, (%dx) + mov $'a', %al + out %al, (%dx) + mov $'r', %al + out %al, (%dx) + mov $'t', %al + out %al, (%dx) + mov $'i', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'g', %al + out %al, (%dx) + mov $'\n', %al + out %al, (%dx) + + push %esp + // ebx, esi, edi and ebp are going to be preserved + // (see comment in smm_stub.S if target is x86_64) + push %ebx + push %esi + push %edi + push %ebp + push %eax + + /* + * Switch-case to jump to appropriate section for given functionality. + * Macros are defined in mm_handler.h. + * Short explaination of where does the magic n(%esp) came from. + * Calling mm_entry_32 from coreboot pushes lb_entry_context + * (see include/payload_mm_interface.h) to stack and + * increments esp by 4, so now our stack looks like this: + * | third arg | + * | second arg | + * | first arg | + * | return address | + * | stack pointer | <- esp + * Then we push all the registers (see above) and hence our stack looks l= ike this now: + * | third arg | + * | second arg | + * | first arg | + * | return address | + * | esp | + * | ebx | + * | esi | + * | edi | + * | ebp | + * | eax | + * | stack pointer | <- esp + * So, now to get the entry we need, we do (9 * 4)(%esp) to get third + * argument (ACPI base address), (8 * 4)(%esp) to get second argument + * (PM1_CNT byte), and (7 * 4) to get the command. + */ + + cmpl $MM_ACPI_ENABLE, 28(%esp) + je acpi_enable32 + + cmpl $MM_ACPI_DISABLE, 28(%esp) + je acpi_disable32 + + cmpl $MM_STORE, 28(%esp) + je mm_store32 + + jmp restore_cb_state + +acpi_enable32: + mov $0x3f8, %dx + mov $'E', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'a', %al + out %al, (%dx) + mov $'b', %al + out %al, (%dx) + mov $'l', %al + out %al, (%dx) + mov $'i', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'g', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'A', %al + out %al, (%dx) + mov $'C', %al + out %al, (%dx) + mov $'P', %al + out %al, (%dx) + mov $'I', %al + out %al, (%dx) + mov $'\n', %al + out %al, (%dx) + + // PM1_CNT & ~SCI_EN + mov 32(%esp), %ax + add $MM_ACPI_ENABLE, %ax + + // ACPI_BASE_ADDR + mov 36(%esp), %dx + + out %ax, %dx + + jmp restore_cb_state + +acpi_disable32: + mov $0x3f8, %dx + mov $'D', %al + out %al, (%dx) + mov $'i', %al + out %al, (%dx) + mov $'s', %al + out %al, (%dx) + mov $'a', %al + out %al, (%dx) + mov $'b', %al + out %al, (%dx) + mov $'l', %al + out %al, (%dx) + mov $'i', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'g', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'A', %al + out %al, (%dx) + mov $'C', %al + out %al, (%dx) + mov $'P', %al + out %al, (%dx) + mov $'I', %al + out %al, (%dx) + mov $'\n', %al + out %al, (%dx) + + // PM1_CNT | SCI_EN + mov 32(%esp), %ax + add $MM_ACPI_DISABLE, %ax + + // ACPI_BASE_ADDR + mov 36(%esp), %dx + + out %ax, %dx + + jmp restore_cb_state + +mm_store32: + // Not implemented yet. Probably would be better to do that in C. + +restore_cb_state: + mov $0x3f8, %dx + mov $'M', %al + out %al, (%dx) + mov $'M', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'r', %al + out %al, (%dx) + mov $'e', %al + out %al, (%dx) + mov $'t', %al + out %al, (%dx) + mov $'u', %al + out %al, (%dx) + mov $'r', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'s', %al + out %al, (%dx) + mov $'\n', %al + out %al, (%dx) + + pop %eax + pop %ebp + pop %edi + pop %esi + pop %ebx + pop %esp + + ret +SYM_CODE_END(mm_entry_32) + + + .section ".text64","ax" + .code64 + .balign 4 +SYM_CODE_START(mm_entry_64) + mov $0x3f8, %dx + mov $'L', %al + out %al, (%dx) + mov $'i', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'u', %al + out %al, (%dx) + mov $'x', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'S', %al + out %al, (%dx) + mov $'M', %al + out %al, (%dx) + mov $'I', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'h', %al + out %al, (%dx) + mov $'a', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'d', %al + out %al, (%dx) + mov $'l', %al + out %al, (%dx) + mov $'e', %al + out %al, (%dx) + mov $'r', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'s', %al + out %al, (%dx) + mov $'t', %al + out %al, (%dx) + mov $'a', %al + out %al, (%dx) + mov $'r', %al + out %al, (%dx) + mov $'t', %al + out %al, (%dx) + mov $'i', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'g', %al + out %al, (%dx) + mov $'\n', %al + out %al, (%dx) + + pushq %rsp + + pushq %rbp + pushq %rbx + pushq %r12 + pushq %r13 + pushq %r14 + pushq %r15 + + movq %cr3, %rax + pushq %rax + + movq %cr4, %rbx + pushq %rbx + or $0x640, %rbx + + movq %rbx, %cr4 + + movq %cr0, %rbx + pushq %rbx + or $0x22, %rbx + + mov %rbx, %cr0 + + movq %rsp, %r12 + andq $~0xF, %rsp + + subq $0x200, %rsp + fxsave64 (%rsp) + + /* + * All the macros we compare (r)di to are defined in mm_handler.h + * This differs a bit from what we do above, as ABI calling convention + * is not the same for protected and long mode. First two elements of + * the struct fits rdi. Command is in the first byte of the rdi, + * so we can just read of di. + */ + cmp $MM_ACPI_DISABLE, %di + je acpi_disable + + cmp $MM_ACPI_ENABLE, %di + je acpi_enable + + cmp $MM_STORE, %di + je mm_store + + jmp restore_cb_state64 + +acpi_enable: + mov $0x3f8, %dx + mov $'E', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'a', %al + out %al, (%dx) + mov $'b', %al + out %al, (%dx) + mov $'l', %al + out %al, (%dx) + mov $'i', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'g', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'A', %al + out %al, (%dx) + mov $'C', %al + out %al, (%dx) + mov $'P', %al + out %al, (%dx) + mov $'I', %al + out %al, (%dx) + mov $'\n', %al + out %al, (%dx) + + // Stash the command from rdi. + shr $32, %rdi + // PM1_CNT & ~SCI_EN + mov %di, %ax + add $MM_ACPI_ENABLE, %ax + // si contains ACPI_BASE_ADDR + mov %si, %dx + + out %ax, %dx + + jmp restore_cb_state64 + +acpi_disable: + mov $0x3f8, %dx + mov $'D', %al + out %al, (%dx) + mov $'i', %al + out %al, (%dx) + mov $'s', %al + out %al, (%dx) + mov $'a', %al + out %al, (%dx) + mov $'b', %al + out %al, (%dx) + mov $'l', %al + out %al, (%dx) + mov $'i', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'g', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'A', %al + out %al, (%dx) + mov $'C', %al + out %al, (%dx) + mov $'P', %al + out %al, (%dx) + mov $'I', %al + out %al, (%dx) + mov $'\n', %al + out %al, (%dx) + + // Stash command + shr $32, %rdi + // PM1_CNT | SCI_EN + mov %di, %ax + add $MM_ACPI_DISABLE, %ax + // si contains ACPI_BASE_ADDR + mov %si, %dx + + out %ax, %dx + + jmp restore_cb_state64 + +mm_store: + // see comment above in mm_store32 + +restore_cb_state64: + mov $0x3f8, %dx + mov $'M', %al + out %al, (%dx) + mov $'M', %al + out %al, (%dx) + mov $'6', %al + out %al, (%dx) + mov $'4', %al + out %al, (%dx) + mov $' ', %al + out %al, (%dx) + mov $'r', %al + out %al, (%dx) + mov $'e', %al + out %al, (%dx) + mov $'t', %al + out %al, (%dx) + mov $'u', %al + out %al, (%dx) + mov $'r', %al + out %al, (%dx) + mov $'n', %al + out %al, (%dx) + mov $'s', %al + out %al, (%dx) + mov $'\n', %al + out %al, (%dx) + + fxrstor64 (%rsp) + addq $0x200, %rsp + movq %r12, %rsp + + popq %rbx + movq %rbx, %cr0 + + popq %rbx + movq %rbx, %cr4 + + popq %rax + movq %rax, %cr3 + + popq %r15 + popq %r14 + popq %r13 + popq %r12 + popq %rbx + popq %rbp + popq %rsp + ret +SYM_CODE_END(mm_entry_64) + + .bss + .balign 4 +SYM_DATA(mm_signature, .space 4) +SYM_DATA(mm_blob_size, .space 2) +SYM_DATA(mm_entry_32_offset, .space 4) +SYM_DATA(mm_entry_64_offset, .space 4) diff --git a/drivers/firmware/google/mm_handler/mm_handler.h b/drivers/firm= ware/google/mm_handler/mm_handler.h new file mode 100644 index 000000000000..4f32f84371d5 --- /dev/null +++ b/drivers/firmware/google/mm_handler/mm_handler.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Derived from arch/x86/include/realmode.h + */ + +#ifndef _MM_HANDLER_H +#define _MM_HANDLER_H + +#define REALMODE_END_SIGNATURE 0x65a22c82 + +/* + * These macros correspond to the arguments + * passed by coreboot's SMI handler. Depending + * on which one is passed in rdi or esp + x, handler + * will jump to the appropriate section. + */ +#define MM_ACPI_ENABLE 1 +#define MM_ACPI_DISABLE 0 +#define MM_STORE 2 + +#endif /* _MM_HANDLER_H */ diff --git a/drivers/firmware/google/mm_handler/mm_header.S b/drivers/firmw= are/google/mm_handler/mm_header.S new file mode 100644 index 000000000000..342cd60492f8 --- /dev/null +++ b/drivers/firmware/google/mm_handler/mm_header.S @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * MM blob header; this should match mm_payload.h + */ + +#include +#include +#include + + .section ".header", "a" + + .balign 16 +SYM_DATA_START(mm_header) + .long pa_text_start + .long pa_mm_entry_32 + .long pa_mm_entry_64 + .long pa_mm_signature + .long pa_mm_blob_size +SYM_DATA_END(mm_header) --=20 2.49.0