From nobody Wed Feb 11 07:47:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 32CEAEAC7; Mon, 12 May 2025 19:30:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078211; cv=none; b=pWGD4X3VwiFwTwOuZE1ICsgNW98yZ7z5ltkz7XPvVOP7Y+aRY83+KphGBNuyrJDicOMB/fM7WPSVzTSP5NsaAbbAWytoFsgPJNNM2840MXSYEg1wCR5nUsjzzl/+/NxjxsHBLkEtWL2e8wp0FFVfjNjv92U+PsQoW1HCP1KQAXg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078211; c=relaxed/simple; bh=EAq9igK9ZsRG9y+KYZS6Syh/KUFHCf2/FcNcB//qTFw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=NseYPSqQtyDMpi9eM8RAm87/S0IPnnaZvdMrqlRSpGcH3Ht0UNSbWgWg+qmg4pz7/lLEfhFrO0PxaT0Cb0XNuuvE3PCnbonGWTmZYJ2G13OKQEObpbbTRXF7nA27kqK0JTinmMXMHNCZ/SoI8VZd+5U+T2UU/yIuEhvoj5Ntq8Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=vSrPR2KO; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="vSrPR2KO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1747078210; x=1778614210; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EAq9igK9ZsRG9y+KYZS6Syh/KUFHCf2/FcNcB//qTFw=; b=vSrPR2KOSZex4Hxb/iD5+eKTFcdSj47MfYuLoE7yonDgG+Ew9BW9ETTu gUX6f3YKNag4rBaWd4NyqWJltP7c9PIWi9TzwJwTNXsDR54tWOqFyl7NV xgBOjKQk1wAD5EnDF8iKOjgxd9NMh5/sM7mnerbRKRwv5FURaTG8EumiP bTUlzY/R2HMXRwPUA7UIZO6vAwXMf+uKT6mW7YRSSCwnfPPVI6bDGoIrK CkqDMumVzsFiDkPEePWvr7YLOXtdWweo3tRAKSRFAlGJlgINFllg3fzgV oOPxHxHFTx4rTxfL8GYRoAkvf+Dro+Ya401+adKiQ3bLNzQaiKdpp/pVc w==; X-CSE-ConnectionGUID: lnPSkm7mSRKB1sBnpug5Qw== X-CSE-MsgGUID: z8AX82L7SnK3k23+cBcxsw== X-IronPort-AV: E=Sophos;i="6.15,283,1739862000"; d="scan'208";a="41049771" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 May 2025 12:30:09 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Mon, 12 May 2025 12:28:56 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Mon, 12 May 2025 12:28:56 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH 1/9] dt-bindings: crypto: add sama7d65 in Atmel AES Date: Mon, 12 May 2025 12:27:27 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ryan Wanner Add DT bindings for SAMA7D65 SoC in atmel AES. Signed-off-by: Ryan Wanner --- .../devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes= .yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml index 7dc0748444fd..1de4ee70a05f 100644 --- a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml +++ b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml @@ -15,7 +15,9 @@ properties: oneOf: - const: atmel,at91sam9g46-aes - items: - - const: microchip,sam9x7-aes + - enum: + - microchip,sam9x7-aes + - microchip,sama7d65-aes - const: atmel,at91sam9g46-aes =20 reg: --=20 2.43.0 From nobody Wed Feb 11 07:47:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3CA22989AE; Mon, 12 May 2025 19:29:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078187; cv=none; b=gsePK/frtlW/V/o6wQOupMi4SFScHC6O5VMSH3k5DhiUZh940qZG967yfAWWGurXiZSitRD4JkQGMIRKyEp78fw81FFdmt1cH3pEAO53V0Py4X4gyWRPlkxvTUhZjKIN8w98tIB6lY1pM0oFgEW0vBhzVd+cvr94N17fkOY4iGw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078187; c=relaxed/simple; bh=/61U+nFwbRYm9NmcMk+7wewKlEE4ETc8NUwzLZDc/gA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=g1+uh+rSVDCQ4oxiGaAhwWNiOP7bQ+Ig/CPIt1FGbNJJ/5f650Bz60CkhpvwHlwl7Mj6cg5R9ybEN+kMvK7GNeaZYPrck61oIF9lSEL4jRC6ThrrwE/fU4OpNn4gHtCxqQmazpc5EpcVroWoxx7+uJ73yDu6wRS/uOTjh/cuiwQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=PMTaLIFH; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="PMTaLIFH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1747078185; x=1778614185; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/61U+nFwbRYm9NmcMk+7wewKlEE4ETc8NUwzLZDc/gA=; b=PMTaLIFHPRLMhmP11cjel4bgUf4RPSJTDcekm6HLb/AHSBr+Qc2d0fGL zH+uBNGIwh2XzYXdhz19A3AJ9zHCTAVE0R5JKOJDVAxxmxtPqiIApcnts nSCc/JNdc7+liJ8Ny/m7xQy90haZ/T1LpDCHj0JOzy2pcCZ8t+0vWPi6f bgQMop/jEg5jYMVYshnX0T1zUOEmojbWCNBqP675uj/vBUiDdORB1laTD Behpc2F9CnjCi9X0MDr1jB1ghZ7aHBmZFU5HwHP93bGzG3G1QzGJ4+8NV wPVKpFqn0Y/vE7BD0Berqe+WeDPrrjPDtC/lTvFIqMefRZprfr4ohPkqX g==; X-CSE-ConnectionGUID: hYKpzzHaRPOvLPNNOvU8gw== X-CSE-MsgGUID: NLlxROieQM+TrxnEaF/p7w== X-IronPort-AV: E=Sophos;i="6.15,283,1739862000"; d="scan'208";a="209006608" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 May 2025 12:29:36 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Mon, 12 May 2025 12:28:56 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Mon, 12 May 2025 12:28:56 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH 2/9] dt-bindings: crypto: add sama7d65 in Atmel SHA Date: Mon, 12 May 2025 12:27:28 -0700 Message-ID: <5c87dd0c60e3ab295bf084cabb59199d5cb4d93b.1747077616.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ryan Wanner Add DT bindings for SAMA7D65 SoC Atmel SHA. Signed-off-by: Ryan Wanner --- .../devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha= .yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml index d378c53314dd..375464222942 100644 --- a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml +++ b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml @@ -15,7 +15,9 @@ properties: oneOf: - const: atmel,at91sam9g46-sha - items: - - const: microchip,sam9x7-sha + - enum: + - microchip,sam9x7-sha + - microchip,sama7d65-sha - const: atmel,at91sam9g46-sha =20 reg: --=20 2.43.0 From nobody Wed Feb 11 07:47:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F881298C0B; Mon, 12 May 2025 19:29:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078188; cv=none; b=SJPA0uJwg12ocewM7hWdLJk83naV4W+W050h76GnfqOZgfDNJnhPhjfVSJrink8qB9TTQb3BSaexoO9HB0FIPZtnDnPiepkqJXQb8RsZEblTJbmsP24j9DB9d7++IrxhEYxXV/0OhD6SVwpQxxK730lTFLbYey76N1u7FUWY0YU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078188; c=relaxed/simple; bh=Uk6gMNlH4FiuwQmFLiKNXCHoWc0Q7toe1h2KyD5NpP8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZyXAOQaAYd9AWdfIcTfwMRsWuPUMFcB/Hss8uZCB2O2FCfKULHfUx52q5SY1QxAjPFWHcrwamEggy0sL9FZjbWfuOwfGN451GyNWx9ot1cL3jdkkRQo2GuWxtngeRgskbdJl3hhjCH3FNdyxQZdy/Dj8F7YKyRVR5hX1FJBjisE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=HvALpEzk; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="HvALpEzk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1747078186; x=1778614186; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Uk6gMNlH4FiuwQmFLiKNXCHoWc0Q7toe1h2KyD5NpP8=; b=HvALpEzkLKyt5eUnjBrTSZwswqGtESuH2SfkLvQXznXnu8q8Cdh2uUaq k2VgDS5GiCyjELYVmtJzrWWBMoYj+smZk/i2Ok4jxu+DVEP/Aff8DJvgC BoDh5Fy1q3grj4vNXxd10UmcrgN4FY0Jw/LyBCMsLPBEZnSaHJ9EhfI46 WnYbXKrVHO/P1IA0hDte8mxGH8EZjaCwngYSX9t5siHlOwpgEoHp2wLoA qcoiyFMpbine3l3hZgwMBFOeV1j0Wa6HDjm+wUYLU0Nxzyg+jkL4S2as5 EwYrGJ5MMoX4k8ldhHuwpjqeEiX3ma3duDmEeUCyzRhkEwI6VJTxYBkLD Q==; X-CSE-ConnectionGUID: hYKpzzHaRPOvLPNNOvU8gw== X-CSE-MsgGUID: lV4VSQu2TQ2dJND9A8h/Lg== X-IronPort-AV: E=Sophos;i="6.15,283,1739862000"; d="scan'208";a="209006609" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 May 2025 12:29:37 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Mon, 12 May 2025 12:28:56 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Mon, 12 May 2025 12:28:56 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH 3/9] dt-bindings: crypto: add sama7d65 in Atmel TDES Date: Mon, 12 May 2025 12:27:29 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ryan Wanner Add DT bindings for SAMA7D65 SoC Atmel TDES. Signed-off-by: Ryan Wanner --- .../devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tde= s.yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.ya= ml index 6a441f79efea..337f5cac0f59 100644 --- a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml +++ b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml @@ -15,7 +15,9 @@ properties: oneOf: - const: atmel,at91sam9g46-tdes - items: - - const: microchip,sam9x7-tdes + - enum: + - microchip,sam9x7-tdes + - microchip,sama7d65-tdes - const: atmel,at91sam9g46-tdes =20 reg: --=20 2.43.0 From nobody Wed Feb 11 07:47:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 88E03298C27; Mon, 12 May 2025 19:29:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078189; cv=none; b=jWY8CF79Sqc8fqKQg4Sff1kJPwoM+Wy8BEwQ/YVNqwI10cJ8akF5bjFq/nS3M5r4F7iedRXKfzexaj2wy7Ka8jIAzx+XK4WIhKsQTYycj0yDOX+AEsxZv/53PKeUxTyXCP50Mw1E2ZzTnOSqcqznnrqUDHEQAwjAPUKvHMzBFcw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078189; c=relaxed/simple; bh=DSd7HCJtABKxLA0P+qbEhaLgR9tQYl+AuyBtzzok9Dg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=t3bi/eVGopuOLwcNWlkxnzqW6brxaFPNWKPd0ZVnzxaSxVLBv6NYiRQ9W7nPWgpQpe7LVi4ZOfglEuDVABfPPgligIkGu+5+DllhX0+QyUMol8npd/9/uIytGdD0bR5fbJr9qHg6OUB+NFuMye2pA9O11U831EaY7dJ1qp3O500= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=lpbeeWr1; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="lpbeeWr1" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1747078187; x=1778614187; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DSd7HCJtABKxLA0P+qbEhaLgR9tQYl+AuyBtzzok9Dg=; b=lpbeeWr17hN6TGbls/V0A7mwoFc2R9M4Uvc0J04dedJxFzyQlCPevK+n eZChPNBonogkUVP4fY8L6VDfZeJCwVTfGK//2pvobAx1LMxMbLe4dxFPR Nzoa5Yi85QlxoDsTmqfSAplwraIbuJZ+o/TZuzXwP8j2QLk14/jQQH2cT Xm17R9011lbSgZevmtGmn0FvM0tgwee8nlMyFIOuSpEDmD/Rx2u6UEHkO tUoFeSgRrm4rYj9Eowju+gRJMPzxmpxqVDYGsie1R7N0IUCROWg5bY2Er 7/2pmS3W78H9AiN5QUnI56zLV8xEzNWDUOtu0S0AJXs+NRMlsMQfOgatL w==; X-CSE-ConnectionGUID: hYKpzzHaRPOvLPNNOvU8gw== X-CSE-MsgGUID: xTN55bTJSl6rW4XcLv8AWw== X-IronPort-AV: E=Sophos;i="6.15,283,1739862000"; d="scan'208";a="209006610" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 May 2025 12:29:37 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Mon, 12 May 2025 12:28:56 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Mon, 12 May 2025 12:28:56 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH 4/9] dt-bindings: rng: atmel,at91-trng: add sama7d65 TRNG Date: Mon, 12 May 2025 12:27:30 -0700 Message-ID: <68e45a56e70e0b0b001870905917e8f7ddac61a3.1747077616.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ryan Wanner Add compatible for Microchip SAMA7D65 SoC TRNG. Signed-off-by: Ryan Wanner Acked-by: Rob Herring (Arm) Reviewed-by: Claudiu Beznea --- Documentation/devicetree/bindings/rng/atmel,at91-trng.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/rng/atmel,at91-trng.yaml b/D= ocumentation/devicetree/bindings/rng/atmel,at91-trng.yaml index b38f8252342e..f78614100ea8 100644 --- a/Documentation/devicetree/bindings/rng/atmel,at91-trng.yaml +++ b/Documentation/devicetree/bindings/rng/atmel,at91-trng.yaml @@ -24,6 +24,7 @@ properties: - items: - enum: - microchip,sam9x7-trng + - microchip,sama7d65-trng - const: microchip,sam9x60-trng =20 clocks: --=20 2.43.0 From nobody Wed Feb 11 07:47:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A048298CAB; Mon, 12 May 2025 19:29:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078190; cv=none; b=XGAaQfAvgvBX5qIaj2uCmQ7K+eK/fsusNvdgc0GfyNj0DLVxwDUrOrwFsgTIiAGsqLZD1wWheROGh9tFUqBmHsZCH9RRO5heruMxs6NfPnNh1bE4gWQEeID5W2pnjDanbK6Rq75uD0eY2+d6jVy9fL90rYepCyAUxn1BD9rUSrY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078190; c=relaxed/simple; bh=Z6V7mSq7GXzEixyZ5bJFvSwoZa1KZkqKDSMRxyrkX9g=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qMej6iwNIpkQwiFWt5YM7pXTH4IV4i8nGlmBxfBCNx9xIFbj4f61/IG1YAdObXG6COSouIvsfurLfVTFeW8nZN6crXA3zL49ZcOBXEccutCfb8vVctOupYa3RtsCjLF/H2SMfRQeCFIuEqdzUqDl1z28HHKfnHkOlabPY5mkjmU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=zo6cfCWF; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="zo6cfCWF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1747078188; x=1778614188; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Z6V7mSq7GXzEixyZ5bJFvSwoZa1KZkqKDSMRxyrkX9g=; b=zo6cfCWFR7mycV8x2O4QhOvFCGZlqfOndyKGqDf6/MpACJfWRSlgqTbl 5Kr19I/dilpJLoJcF6XoGVeNO9klNQ84KAk2AmubRv3wftgDQaS6MawYB IKGTotilajtcIXpZHaiDe6cEJof0bIOu/3zs4rL+OEK9v04vfrQ/Bbr2u zfaZWbc8boqpgF/KAmqPKZRxPFNHBSBgG2g5MXkGPltCb28e+xq3xhu2Q dkD24un5f2CWpb6s1RBSj08e9dxx/tqRAuf/l683AU+l4K9c84bOD1kTm 5xaJaJiWAO74ScmtB+St9Wn+9SL+CWQ3b+oGPCvsYzgiwtczC6q4fQf43 Q==; X-CSE-ConnectionGUID: hYKpzzHaRPOvLPNNOvU8gw== X-CSE-MsgGUID: ubj1cdGBQbusmFztRimBgA== X-IronPort-AV: E=Sophos;i="6.15,283,1739862000"; d="scan'208";a="209006611" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 May 2025 12:29:37 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Mon, 12 May 2025 12:28:57 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Mon, 12 May 2025 12:28:57 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH 5/9] crypto: atmel - add support for AES and SHA IPs available on sama7d65 SoC Date: Mon, 12 May 2025 12:27:31 -0700 Message-ID: <9535f6957dcfcab2172f4d468450dc44cf485d02.1747077616.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ryan Wanner This patch adds support for hardware version of AES and SHA IPs available on SAMA7D65 SoC. Signed-off-by: Ryan Wanner --- drivers/crypto/atmel-aes.c | 1 + drivers/crypto/atmel-sha.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c index 14bf86957d31..4a3db3dca272 100644 --- a/drivers/crypto/atmel-aes.c +++ b/drivers/crypto/atmel-aes.c @@ -2296,6 +2296,7 @@ static void atmel_aes_get_cap(struct atmel_aes_dev *d= d) =20 /* keep only major version number */ switch (dd->hw_version & 0xff0) { + case 0x800: case 0x700: case 0x600: case 0x500: diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c index 67a170608566..f7021925349e 100644 --- a/drivers/crypto/atmel-sha.c +++ b/drivers/crypto/atmel-sha.c @@ -2532,6 +2532,7 @@ static void atmel_sha_get_cap(struct atmel_sha_dev *d= d) =20 /* keep only major version number */ switch (dd->hw_version & 0xff0) { + case 0x800: case 0x700: case 0x600: case 0x510: --=20 2.43.0 From nobody Wed Feb 11 07:47:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4CC81298CAD; Mon, 12 May 2025 19:29:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078189; cv=none; b=NJT+hHyIdwZaViU0UU+6D5vAnQaO7GU/nhoB6hql6558Yx+hLDwdut/xghDMUqLdNa2X2Q87Jzb2KiYAZ0eIW8mwHgjeQ5d5Ulzvgke7F1av/uUFadXq5TpVc2EP0zvcchYDX46VP+2aI9OvtD9AOkJE3s761QWWq4jryigpPak= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078189; c=relaxed/simple; bh=aWO0d59mD3euTgxppOwxO3iX5dY796oeQrvPcyg7cxU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HypU17m9vwVRAD+PgsgoQ0p1fzkGG0+53sKUbQIe43SWmmf2e7e5yxIpppIRc9mA38lQw2/sEmCi4z6d0j9JvAl1MjugsSvkuDLSyH1ohXGCps8tGEkmDD/eQXDUFPVTKIaiLCABeVdpLd/L5YrTCfPkqL1zexLJrN02LDSDOI0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=AEkT5vvy; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="AEkT5vvy" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1747078188; x=1778614188; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aWO0d59mD3euTgxppOwxO3iX5dY796oeQrvPcyg7cxU=; b=AEkT5vvym4pOAIsZNUyhHlNpe8PLxcxDhuUJvoU6sIYuie8GUrfxPveO 7EDjUbu946i0mKl2lNsiNKnRVVfUE0/PgK4tS43ik6HohzhFhKCAaetdu sv1wcyMxlD7SLEgab7Xvfda1Ho0afInByhw8mgnaMoX4qCBfBUdelxw9Q Uo67T59g3qogAwn4mMinLQ3s+j/B0UEL6wCg7uwbLwacUMI9lnJgeMQlj LLe9NB7z9UhSf0Rz6+yI8dyY8TKqQcDkP4OMotJrY2bHMvChKW7f8FioD rh5O5chlUsJGDNQ8xFdMwZSishU7B2og+XA6sCuqqjj6zHEZZ+Xufn3hr Q==; X-CSE-ConnectionGUID: hYKpzzHaRPOvLPNNOvU8gw== X-CSE-MsgGUID: PNse3QQVQAq4h4ArfCshoA== X-IronPort-AV: E=Sophos;i="6.15,283,1739862000"; d="scan'208";a="209006612" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 May 2025 12:29:37 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Mon, 12 May 2025 12:28:57 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Mon, 12 May 2025 12:28:57 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH 6/9] ARM: dts: microchip: sama7d65: Add crypto support Date: Mon, 12 May 2025 12:27:32 -0700 Message-ID: <5d045fc3be18fcd6644f14b9568f1f8d7c8d75a1.1747077616.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ryan Wanner Add and enable SHA, AES, TDES, and TRNG for SAMA7D65 SoC. Signed-off-by: Ryan Wanner Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 39 +++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/= microchip/sama7d65.dtsi index d08d773b1cc5..90cbea576d91 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -186,6 +186,45 @@ sdmmc1: mmc@e1208000 { status =3D "disabled"; }; =20 + aes: crypto@e1600000 { + compatible =3D "microchip,sama7d65-aes", "atmel,at91sam9g46-aes"; + reg =3D <0xe1600000 0x100>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 26>; + clock-names =3D "aes_clk"; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(1)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names =3D "tx", "rx"; + }; + + sha: crypto@e1604000 { + compatible =3D "microchip,sama7d65-sha", "atmel,at91sam9g46-sha"; + reg =3D <0xe1604000 0x100>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 78>; + clock-names =3D "sha_clk"; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(48)>; + dma-names =3D "tx"; + }; + + tdes: crypto@e1608000 { + compatible =3D "microchip,sama7d65-tdes", "atmel,at91sam9g46-tdes"; + reg =3D <0xe1608000 0x100>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 91>; + clock-names =3D "tdes_clk"; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(54)>, + <&dma0 AT91_XDMAC_DT_PERID(53)>; + dma-names =3D "tx", "rx"; + }; + + trng: rng@e160c000 { + compatible =3D "microchip,sama7d65-trng", "microchip,sam9x60-trng"; + reg =3D <0xe160c000 0x100>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 92>; + }; + dma0: dma-controller@e1610000 { compatible =3D "microchip,sama7d65-dma", "microchip,sama7g5-dma"; reg =3D <0xe1610000 0x1000>; --=20 2.43.0 From nobody Wed Feb 11 07:47:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 432F5298CC1; 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charset="utf-8" From: Ryan Wanner Add support for PWMs to the SAMA7D65 SoC. Signed-off-by: Ryan Wanner Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/= microchip/sama7d65.dtsi index 90cbea576d91..796909fa2368 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -293,6 +293,15 @@ pit64b1: timer@e1804000 { clock-names =3D "pclk", "gclk"; }; =20 + pwm: pwm@e1818000 { + compatible =3D "microchip,sama7d65-pwm", "atmel,sama5d2-pwm"; + reg =3D <0xe1818000 0x500>; + interrupts =3D ; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 72>; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + flx0: flexcom@e1820000 { compatible =3D "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; reg =3D <0xe1820000 0x200>; --=20 2.43.0 From nobody Wed Feb 11 07:47:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 11227299931; Mon, 12 May 2025 19:29:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078191; cv=none; b=Alckt9e8dXr6bAeT2rnJbAvGhYdJMDNprK3wwZwSrss0czjGQiKDESko14/zZODSN66bhYiqV89rJeS4fKDECkh1SqF5RZdfYSuopQfd5s9mo/vk/dvm/ENGR1U76416Szm0it5bTEpQXnITuS12M1UdL/gJ7ncWGIM5QRwSsYQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078191; c=relaxed/simple; bh=YtwlXJOdp02r4WrFCnC4/Gfz2ncr79DHWxCt0DsELGg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Y3mJd64x2xR8f5P/sUlRR4EYWf44/qziSmwHKuQYaHtosGV6qo1YGvMGZsVLzq88KF34XGDqJlo/WsVy5Mq/i6wBlIj68cjYpEY+QLkcly4Ey3WQABHghfqlEdD6Iupo2JrBxyvtcxbxX76h1p4rrcZjMIXSeaK69JtOnkFGC3I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=KhOE6LBf; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="KhOE6LBf" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1747078190; x=1778614190; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YtwlXJOdp02r4WrFCnC4/Gfz2ncr79DHWxCt0DsELGg=; b=KhOE6LBfFjrcMoygDsfiNpIMd5Bs88r0Co6fYTYHJd735hi4Dyv7Niaj 8VgUX7CU/PzvUMnOhqdLLQwSlB0p6khnmi2gCGBSwmuMVXVf4hnTVRfiV UvkeanS0cutVYiJCaOnbYyus1aFZO42BwpoIj675rnFZLcykVhUG3X8hH vKnFWeGQWIL65Mxwg/NSX8xfWQ+hPKaREjmVVPUgdvPCGPVes3bwiQXAU ATmDVV0ZHgIVT8RNpgFgRWR5wBd4C7BmBcXJOxUY0VMDUx/N1dJiq3gyP VJuOi9mfpMdohJ4FeA/HJPVEupHs8npBVP/9DfwFOhIe7xAI9APQl44Hh Q==; X-CSE-ConnectionGUID: hYKpzzHaRPOvLPNNOvU8gw== X-CSE-MsgGUID: Jhtxy2cESSuOatJLEl5tcg== X-IronPort-AV: E=Sophos;i="6.15,283,1739862000"; d="scan'208";a="209006614" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 May 2025 12:29:38 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Mon, 12 May 2025 12:28:57 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Mon, 12 May 2025 12:28:57 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH 8/9] ARM: dts: microchip: sama7d65: Add CAN bus support Date: Mon, 12 May 2025 12:27:34 -0700 Message-ID: <445c4c72243f1ba85e3681ba026cfefaf6036890.1747077616.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ryan Wanner Add support for CAN bus to the SAMA7D65 SoC. Signed-off-by: Ryan Wanner Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 80 +++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/= microchip/sama7d65.dtsi index 796909fa2368..a62d2ef9fcab 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -163,6 +163,86 @@ chipid@e0020000 { reg =3D <0xe0020000 0x8>; }; =20 + can0: can@e0828000 { + compatible =3D "bosch,m_can"; + reg =3D <0xe0828000 0x200>, <0x100000 0x7800>; + reg-names =3D "m_can", "message_ram"; + interrupts =3D , + ; + interrupt-names =3D "int0", "int1"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 58>, <&pmc PMC_TYPE_GCK 58>; + clock-names =3D "hclk", "cclk"; + assigned-clocks =3D <&pmc PMC_TYPE_GCK 58>; + assigned-clock-rates =3D <40000000>; + assigned-clock-parents =3D <&pmc PMC_TYPE_CORE PMC_UTMI>; + bosch,mram-cfg =3D <0x3400 0 0 64 0 0 32 32>; + status =3D "disabled"; + }; + + can1: can@e082c000 { + compatible =3D "bosch,m_can"; + reg =3D <0xe082c000 0x200>, <0x100000 0xbc00>; + reg-names =3D "m_can", "message_ram"; + interrupts =3D , + ; + interrupt-names =3D "int0", "int1"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 59>, <&pmc PMC_TYPE_GCK 59>; + clock-names =3D "hclk", "cclk"; + assigned-clocks =3D <&pmc PMC_TYPE_GCK 59>; + assigned-clock-rates =3D <40000000>; + assigned-clock-parents =3D <&pmc PMC_TYPE_CORE PMC_UTMI>; + bosch,mram-cfg =3D <0x7800 0 0 64 0 0 32 32>; + status =3D "disabled"; + }; + + can2: can@e0830000 { + compatible =3D "bosch,m_can"; + reg =3D <0xe0830000 0x200>, <0x100000 0x10000>; + reg-names =3D "m_can", "message_ram"; + interrupts =3D , + ; + interrupt-names =3D "int0", "int1"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 60>, <&pmc PMC_TYPE_GCK 60>; + clock-names =3D "hclk", "cclk"; + assigned-clocks =3D <&pmc PMC_TYPE_GCK 60>; + assigned-clock-rates =3D <40000000>; + assigned-clock-parents =3D <&pmc PMC_TYPE_CORE PMC_UTMI>; + bosch,mram-cfg =3D <0xbc00 0 0 64 0 0 32 32>; + status =3D "disabled"; + }; + + can3: can@e0834000 { + compatible =3D "bosch,m_can"; + reg =3D <0xe0834000 0x200>, <0x110000 0x4400>; + reg-names =3D "m_can", "message_ram"; + interrupts =3D , + ; + interrupt-names =3D "int0", "int1"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>; + clock-names =3D "hclk", "cclk"; + assigned-clocks =3D <&pmc PMC_TYPE_GCK 61>; + assigned-clock-rates =3D <40000000>; + assigned-clock-parents =3D <&pmc PMC_TYPE_CORE PMC_UTMI>; + bosch,mram-cfg =3D <0x0 0 0 64 0 0 32 32>; + status =3D "disabled"; + }; + + can4: can@e0838000 { + compatible =3D "bosch,m_can"; + reg =3D <0xe0838000 0x200>, <0x110000 0x8800>; + reg-names =3D "m_can", "message_ram"; + interrupts =3D , + ; + interrupt-names =3D "int0", "int1"; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>; + clock-names =3D "hclk", "cclk"; + assigned-clocks =3D <&pmc PMC_TYPE_GCK 62>; + assigned-clock-rates =3D <40000000>; + assigned-clock-parents =3D <&pmc PMC_TYPE_CORE PMC_UTMI>; + bosch,mram-cfg =3D <0x4400 0 0 64 0 0 32 32>; + status =3D "disabled"; + }; + dma2: dma-controller@e1200000 { compatible =3D "microchip,sama7d65-dma", "microchip,sama7g5-dma"; reg =3D <0xe1200000 0x1000>; --=20 2.43.0 From nobody Wed Feb 11 07:47:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE19B299A87; Mon, 12 May 2025 19:29:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078192; cv=none; b=oewraJ3zVOzP9xaWnw8glNN+TX5z4jNA5XFE7nrHhpshyPWHtTh3dOW/SV3CVo5hpPRsODHrCmEw0cqr/uUOIkvHT28ass+7U2Wf2MCcStoKpoo5GvszckJtyR8bz1nXsgFcsKy1Ay1X2YCUuQSqtkzCOQkxgPwFGczNTX74NiM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747078192; c=relaxed/simple; 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Mon, 12 May 2025 12:28:57 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Mon, 12 May 2025 12:28:57 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH 9/9] ARM: dts: microchip: sama7d65: Enable CAN bus Date: Mon, 12 May 2025 12:27:35 -0700 Message-ID: <0e34e0416c43f4de6d2cef5cea46087af4577a50.1747077616.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ryan Wanner Enable CAN bus for SAMA7D65 curiosity board. Signed-off-by: Ryan Wanner Reviewed-by: Claudiu Beznea --- .../dts/microchip/at91-sama7d65_curiosity.dts | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts b/arch= /arm/boot/dts/microchip/at91-sama7d65_curiosity.dts index 53a657cf4efb..34935179897e 100644 --- a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts @@ -38,7 +38,24 @@ reg_5v: regulator-5v { regulator-max-microvolt =3D <5000000>; regulator-always-on; }; +}; + +&can1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_can1_default>; + status =3D "okay"; +}; =20 +&can2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_can2_default>; + status =3D "okay"; +}; + +&can3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_can3_default>; + status =3D "okay"; }; =20 &dma0 { @@ -278,6 +295,24 @@ &main_xtal { }; =20 &pioa { + pinctrl_can1_default: can1-default { + pinmux =3D , + ; + bias-disable; + }; + + pinctrl_can2_default: can2-default { + pinmux =3D , + ; + bias-disable; + }; + + pinctrl_can3_default: can3-default { + pinmux =3D , + ; + bias-disable; + }; + pinctrl_gmac0_default: gmac0-default { pinmux =3D , , --=20 2.43.0