From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 472FD1FA856 for ; Fri, 14 Mar 2025 21:41:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988515; cv=none; b=KdVEsOXWcvuNRWqztx2vQlLp/q19WSwMCV3iXRUbIAjoK3UXYPCJkayfpQ1sUNmGts4kAOrPhRr+/uomzgz1JguNMxaf0hoH7M+rjgSoAjV3z+EghUifwgfw/Xm+pFrV18vSIcKyalCkkf52QBVeZyufA5ke3dXZqb4BoTvIboM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988515; c=relaxed/simple; bh=x+l2LdwKG2r1cBZTTsew5lGF5mDXEqksJXo/DOHT6uk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PyOtd0sq25RDMcbEAgwlgg9x7lulN7JC4jXPYTLBZYC43+qwA5yuHRazMcxY2kZSLbRyk9kTU4UXMqhiQuqZAc8p2WPs2IUKi4/PtpUHPR6ggLhTCbz4MOQbXIPpSTJXpYpMMJivbGbCrgKt3EFak0lWW3yYAHtIZFMchDI7yrU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ryIPU3kh; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ryIPU3kh" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 63C1FC4CEEE; Fri, 14 Mar 2025 21:41:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988514; bh=x+l2LdwKG2r1cBZTTsew5lGF5mDXEqksJXo/DOHT6uk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ryIPU3khRA5CfmNUlsTYFAu+IUvao7zDIA8G9z7OoU4eX5XoRiBVlQMV8m6F8ZJIL JeK3AwxJXyBQ8W1bK/plKY3qQr5HwNuz82O1ZhduuYKXh1iwzqko1QrK1h2ZkZkgjv 85wUTKnLi/w+6f02GXf/FhGwnVobOH9dJfmifXRqD9l6pkbYzdh8YC6eLI7DixRETL QvLcebHLtCavc1bBQMImiv3bDLYPji+hXHHeqGnzGlNhs3pB62d9G199OxqQXY0fhO cATQT3JJDOhspNxUV3/tC1+dY4yS93XdHJJYEJOwijI1ksbGbqwkdH050EPCbU7aQl udwQw/DYtXaUg== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 01/20] x86/cpu: Use named asm operands in prefetch[w]() Date: Fri, 14 Mar 2025 14:41:14 -0700 Message-ID: <0e7fb0082e4d4d2b303819a2cef243a32fd86774.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use named operands in preparation for removing the operand numbering restrictions in alternative_input(). Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/processor.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/proces= sor.h index 5d2f7e5aff26..2e9566134949 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -613,7 +613,7 @@ extern char ignore_fpu_irq; # define BASE_PREFETCH "" # define ARCH_HAS_PREFETCH #else -# define BASE_PREFETCH "prefetcht0 %1" +# define BASE_PREFETCH "prefetcht0 %[val]" #endif =20 /* @@ -624,9 +624,9 @@ extern char ignore_fpu_irq; */ static inline void prefetch(const void *x) { - alternative_input(BASE_PREFETCH, "prefetchnta %1", - X86_FEATURE_XMM, - "m" (*(const char *)x)); + alternative_input(BASE_PREFETCH, + "prefetchnta %[val]", X86_FEATURE_XMM, + [val] "m" (*(const char *)x)); } =20 /* @@ -636,9 +636,9 @@ static inline void prefetch(const void *x) */ static __always_inline void prefetchw(const void *x) { - alternative_input(BASE_PREFETCH, "prefetchw %1", - X86_FEATURE_3DNOWPREFETCH, - "m" (*(const char *)x)); + alternative_input(BASE_PREFETCH, + "prefetchw %[val]", X86_FEATURE_3DNOWPREFETCH, + [val] "m" (*(const char *)x)); } =20 #define TOP_OF_INIT_STACK ((unsigned long)&init_stack + sizeof(init_stack)= - \ --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FB181DE8A3 for ; Fri, 14 Mar 2025 21:41:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988515; cv=none; b=j/oHFY1DINu8QF/MQv9oiN16Sqp0uwJFN5rcsMutVdDGbiGXaMSxBq/OJZDReqSPUH4NRc+/ak7HubYMat2kU7cxgCKH9zChVp9Gc57eNNuZpk3rQ/vjHWhdc7mDjH5HwZGhxwfHzaHU57/Ar85MLmFUkeVcXiGWl+s6z7O12Tc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988515; c=relaxed/simple; bh=uBNtxIShQAc4QePM1z8bdXhYlOosBUvYjbVq/jJ+iq8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OhhjMFoJsd2rGSNZM3etcz9JED0Xva1LnCtsw3B0lBR9ovpQTtKQ2OJ7Ao36EGELwhzJLwfoAnsegSjii+6w4EpZKi1Aco2C+bhZlPfxltgBn9vljyt3gxS3LFak2SLrPDI+Uf8AzacDMvvIWc0cNifjiJsuXAN9xVdqaxLKRt8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WwCJdiDD; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WwCJdiDD" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E530CC4CEEF; Fri, 14 Mar 2025 21:41:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988515; bh=uBNtxIShQAc4QePM1z8bdXhYlOosBUvYjbVq/jJ+iq8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WwCJdiDDUrADDBCaDGpEDz0WWAhTMgx7wEuFzWv+Ds/XGMRPTyi598H4cBQXSqdWe HA6fYSAAhGhQYwK/n4hFoit6G0r/KgvGP7+qgEKieY3gdLdJvALdqz/7pHQrLtbbCv n/hBDPpv2A06n+Sfz1cAp6gFf9xnOpeQIMvsuJNei5JN8GTjQ9BbIH6zSCa76LVGUO 4nSgMhm/BKfk4sOxb2gIcNxd1DjlFYjSYKTokcGC7B3oGKG+vbf7joIeQlryNmuSGB U9x+ozAExF6+fH9F/okZSn+uEVRDMJihLi8bhoKZ4g0pynHMdZ7HHzQcJYhPll+ZIw /IRLqrOpu626Q== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 02/20] x86/apic: Use named asm operands in native_apic_mem_write() Date: Fri, 14 Mar 2025 14:41:15 -0700 Message-ID: <397c12e48369bc6aa30094fbc8f795c642cee214.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use named operands in preparation for removing the operand numbering restrictions in alternative_io(). Note this includes removing the "0" input constraint and converting its corresponding output constraint from "=3Dr" to "+r". While at it, do the same for the memory constraint. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/apic.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index c903d358405d..ecf1b229f09b 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -98,9 +98,9 @@ static inline void native_apic_mem_write(u32 reg, u32 v) { volatile u32 *addr =3D (volatile u32 *)(APIC_BASE + reg); =20 - alternative_io("movl %0, %1", "xchgl %0, %1", X86_BUG_11AP, - ASM_OUTPUT("=3Dr" (v), "=3Dm" (*addr)), - ASM_INPUT("0" (v), "m" (*addr))); + alternative_io("movl %[val], %[mem]", + "xchgl %[val], %[mem]", X86_BUG_11AP, + ASM_OUTPUT([val] "+r" (v), [mem] "+m" (*addr))); } =20 static inline u32 native_apic_mem_read(u32 reg) --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A5082066C1 for ; Fri, 14 Mar 2025 21:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988517; cv=none; b=JRlnm87KdMe2nIhhCbT0uJWvL3/r2kJn/yFT8epRsOHKtomgVwWHdFyBp4imh+37kwnszcbi5ByxBA+2JZtA9ZpBs6Wg92sC/+30/2s7c3nMBjMrtz0Ip8hFLelJIyaYx8Uc4Qv6GgCGaylb49EzoSvgKQw6HNxDePX1QdSIl9Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988517; c=relaxed/simple; bh=E3hR7r2iMC1tiZQQhuyNJ1KYebMDQRIzygmPhbaGeWU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ucrUcwO9wWlb8HrLoGag35hV7U8LNJdsL2nDzW/awit3XlVUsRi6LhKQ8nKlaKH+orrlkYM1jamOxyxlEjyc/e/IDEvIFSGW5yaEoBkd4UGY7ejNPuSH34n7zHWUvXY8mP1e7b/gC6oNJw/k9vAux5FEne4iDVdpDa9f8JPqPVw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LhC3Jete; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LhC3Jete" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 75398C4AF0C; Fri, 14 Mar 2025 21:41:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988515; bh=E3hR7r2iMC1tiZQQhuyNJ1KYebMDQRIzygmPhbaGeWU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LhC3Jete99t0ASSDJup2YypbIYeuAb+kqyfnsbHhjXi0ch51+7yyrwegnzK0k3u8H zM/FPwVvU9qQUz1I4GiWRQC183J+SQV6J0te2wjsaRbB3wBFK5HrHkWITBlDzrZGdV 0xs52uPxR3i+T9DZKb7BmL8o9yckvnvp7i6c7BKbKyL5i4ovNqWPrrtolAeej3ZKgb dOk7JGejsm1kbbRF+LMKHkIoZGV3dbOuAK/Y6kKsibwJxkuTtHfE5yO5btIDpf1BP6 R+zzWujRfYo2RMViZfD/tYcOdydiCZwC+3vzp6nbUcGbJVsKvDnV/b4EYhzo0Fvnpj eklJ/7ic33Dyg== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 03/20] x86/mm: Use named asm operands in task_size_max() Date: Fri, 14 Mar 2025 14:41:16 -0700 Message-ID: <1dfdda41e63f0eefe39ab3982e917d9c3ef3a499.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use named operands in preparation for removing the operand numbering restrictions in alternative_io(). Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/page_64.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/page_64.h b/arch/x86/include/asm/page_64.h index b5279f5d5601..db3003acd41e 100644 --- a/arch/x86/include/asm/page_64.h +++ b/arch/x86/include/asm/page_64.h @@ -85,9 +85,9 @@ static __always_inline unsigned long task_size_max(void) { unsigned long ret; =20 - alternative_io("movq %[small],%0","movq %[large],%0", - X86_FEATURE_LA57, - "=3Dr" (ret), + alternative_io("movq %[small], %[ret]", + "movq %[large], %[ret]", X86_FEATURE_LA57, + [ret] "=3Dr" (ret), [small] "i" ((1ul << 47)-PAGE_SIZE), [large] "i" ((1ul << 56)-PAGE_SIZE)); =20 --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C95FA1C84C9 for ; Fri, 14 Mar 2025 21:41:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988516; cv=none; b=QEFjvU14lRLFS6jVqIxsncq6sueRJ4508zfa4eq6hWg/DBVAm+SuMdrWFiEpRTy0Tmg55c58kryvxI3nw5y7hNoWXDLhdfGlY/KEq7k/qKd49q4nrSl1tlTEq8skA1RDpakGjf3X2YQ41HhvuQ4FIxqNtGboUjkxJFRPNLEJbRk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988516; c=relaxed/simple; bh=QAJqgGLEgB7Uus6Hk6A5Xn5+3cxtjhIC2QgVp51gRuU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OmD/2XMISUqh3z926VAxM+7aw7C3HKDAi4R4UpIkn6JFIYCAZ5xvmcXCumEZye6MpedKI5p7DJs19YOD7qdfhZ4YkZoKZtM4/KjDRQbO30BR7XIp9KR3gPOXok7Y6Wg6pgrOCL6iHXSUyRz9JElc7sqN+Xe+4mfx3fdVeyHfuuw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kdc3W5Ae; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kdc3W5Ae" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 08B6DC2BCFA; Fri, 14 Mar 2025 21:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988516; bh=QAJqgGLEgB7Uus6Hk6A5Xn5+3cxtjhIC2QgVp51gRuU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kdc3W5AeKZY8S2hbQeBmv4Bu+7hWvFGu3cmFbRwRZoqz1H/GdCTysdmn8QhG4q+Kj F9vq9zOfSx05bdh2VJwSLfedd0ucU8iiELBfqoHhtQlTOqpEBbpaTfmHPl8QQGSNPr +evwcNs/3x33FH0cPYSOeh8MsZXlbZCS2WLGDqaCmFlJYQEB4s5NZ9AR5x8+XVk4FA XGAOKRw49RNiKTT3YvckUc/944uv/8oFx4rdUC2XWmhFMn91amSUBIq/u5onsd982o /D0N+jzsZ+1oRSsiHu1WvjkqlCaWghWY8Z2qZeVwxYJT0qxGwnlO3kTSABr4hRKRwd 5UPO8aYD/ZZnQ== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 04/20] x86/cpu: Use named asm operands in clflushopt() Date: Fri, 14 Mar 2025 14:41:17 -0700 Message-ID: X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use named operands in preparation for removing the operand numbering restrictions in alternative_io(). Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/special_insns.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/sp= ecial_insns.h index 21ce480658b1..b905076cf7f6 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -176,10 +176,9 @@ static __always_inline void clflush(volatile void *__p) =20 static inline void clflushopt(volatile void *__p) { - alternative_io(".byte 0x3e; clflush %0", - ".byte 0x66; clflush %0", - X86_FEATURE_CLFLUSHOPT, - "+m" (*(volatile char __force *)__p)); + alternative_io(".byte 0x3e; clflush %[val]", + ".byte 0x66; clflush %[val]", X86_FEATURE_CLFLUSHOPT, + [val] "+m" (*(volatile char __force *)__p)); } =20 static inline void clwb(volatile void *__p) --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A5682066C2 for ; Fri, 14 Mar 2025 21:41:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988517; cv=none; b=qChsBf3JPlQ61ntGk6dkDgcSImyGMN2DHIICyg3p5AyoBu2DKffLjdS82ZcEQ9SwOehQ1Ik0hkc9PUClHfCsFRCTr5ldxG1yS5RlROqhwdDpaZAxMkqACYyPGGO2Ugr9kkPnb37Wpffup4jWDnK4u0CIA0saxexb/xIki5fkWpc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988517; c=relaxed/simple; bh=9bFRJxqvYNWVyNVhYDN2ROid6vXuKvJ2yw7P62LLCcA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Xr3p0p5UfFf5fc/XWQymvhS9bigsYCESq9zaeHal3PNf1qu70uCc/RKApOJoX9DpG8KSFpURelwcoNPhCQBa0vOs5NWEeDcB4wi2vsMybpGfkn/Ia5lle08B/GL3NtfRMKBP3GpYW3hHIPdwg//bnF+tsXNmzakVXH+LYMiybtg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kUp7OH/3; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kUp7OH/3" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 88F30C4CEF7; Fri, 14 Mar 2025 21:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988516; bh=9bFRJxqvYNWVyNVhYDN2ROid6vXuKvJ2yw7P62LLCcA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kUp7OH/39b6sNPnYwE4gpkcHGGW9Tfhh3jWiBFOG61hF8PW+liIFkZhRjq9Hucrz7 RjS+4ZISBZz6JtGxpobwJNxhthALCDeZv3k3TPbY9JGieRsmcYh6MVC5x0DZUssbJV ww1N/lOughfmuevn48V/bTXyVty27fdbaCl08mdns23bRAvbdLDbQAf7jXprcltNLI RiSMi1dYR6mhqgoXGLHVGZ5LYSGgiwp/FYTFN5K2DkStrBZKAfb6TA/tlpEMYjVgZD PLRT19y/k+QzgTDexDuKQR71Ua8NgPVKMYmcLk5z1EJjJBIkh6FUs6PEP1FLkQZady yeYOXE9veAnvg== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 05/20] x86/asm: Always use flag output operands Date: Fri, 14 Mar 2025 14:41:18 -0700 Message-ID: <9bd607a5a8b79f1349f09b4e92270aeb8acd6b43.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On x86, __GCC_ASM_FLAG_OUTPUTS__ is supported starting with GCC 6.0 and Clang 9. Now that the GCC minimum version on x86 has been bumped to 8.1 with the following commit: commit a3e8fe814ad1 ("x86/build: Raise the minimum GCC version to 8.1") the flag output operand support can be assumed everywhere. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/asm.h | 9 ++------- arch/x86/include/asm/rmwcc.h | 22 ---------------------- tools/arch/x86/include/asm/asm.h | 5 ----- tools/perf/bench/find-bit-bench.c | 4 ---- 4 files changed, 2 insertions(+), 38 deletions(-) diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h index 975ae7a9397e..fdebd4356860 100644 --- a/arch/x86/include/asm/asm.h +++ b/arch/x86/include/asm/asm.h @@ -131,13 +131,8 @@ static __always_inline __pure void *rip_rel_ptr(void *= p) * Macros to generate condition code outputs from inline assembly, * The output operand must be type "bool". */ -#ifdef __GCC_ASM_FLAG_OUTPUTS__ -# define CC_SET(c) "\n\t/* output condition code " #c "*/\n" -# define CC_OUT(c) "=3D@cc" #c -#else -# define CC_SET(c) "\n\tset" #c " %[_cc_" #c "]\n" -# define CC_OUT(c) [_cc_ ## c] "=3Dqm" -#endif +#define CC_SET(c) "\n\t/* output condition code " #c "*/\n" +#define CC_OUT(c) "=3D@cc" #c =20 #ifdef __KERNEL__ =20 diff --git a/arch/x86/include/asm/rmwcc.h b/arch/x86/include/asm/rmwcc.h index 363266cbcada..a54303e3dfa1 100644 --- a/arch/x86/include/asm/rmwcc.h +++ b/arch/x86/include/asm/rmwcc.h @@ -6,26 +6,6 @@ =20 #define __CLOBBERS_MEM(clb...) "memory", ## clb =20 -#ifndef __GCC_ASM_FLAG_OUTPUTS__ - -/* Use asm goto */ - -#define __GEN_RMWcc(fullop, _var, cc, clobbers, ...) \ -({ \ - bool c =3D false; \ - asm goto (fullop "; j" #cc " %l[cc_label]" \ - : : [var] "m" (_var), ## __VA_ARGS__ \ - : clobbers : cc_label); \ - if (0) { \ -cc_label: c =3D true; \ - } \ - c; \ -}) - -#else /* defined(__GCC_ASM_FLAG_OUTPUTS__) */ - -/* Use flags output or a set instruction */ - #define __GEN_RMWcc(fullop, _var, cc, clobbers, ...) \ ({ \ bool c; \ @@ -35,8 +15,6 @@ cc_label: c =3D true; \ c; \ }) =20 -#endif /* defined(__GCC_ASM_FLAG_OUTPUTS__) */ - #define GEN_UNARY_RMWcc_4(op, var, cc, arg0) \ __GEN_RMWcc(op " " arg0, var, cc, __CLOBBERS_MEM()) =20 diff --git a/tools/arch/x86/include/asm/asm.h b/tools/arch/x86/include/asm/= asm.h index 3ad3da9a7d97..f66cf34f6197 100644 --- a/tools/arch/x86/include/asm/asm.h +++ b/tools/arch/x86/include/asm/asm.h @@ -112,13 +112,8 @@ * Macros to generate condition code outputs from inline assembly, * The output operand must be type "bool". */ -#ifdef __GCC_ASM_FLAG_OUTPUTS__ # define CC_SET(c) "\n\t/* output condition code " #c "*/\n" # define CC_OUT(c) "=3D@cc" #c -#else -# define CC_SET(c) "\n\tset" #c " %[_cc_" #c "]\n" -# define CC_OUT(c) [_cc_ ## c] "=3Dqm" -#endif =20 #ifdef __KERNEL__ =20 diff --git a/tools/perf/bench/find-bit-bench.c b/tools/perf/bench/find-bit-= bench.c index 7e25b0e413f6..99d36dff9d86 100644 --- a/tools/perf/bench/find-bit-bench.c +++ b/tools/perf/bench/find-bit-bench.c @@ -37,7 +37,6 @@ static noinline void workload(int val) accumulator++; } =20 -#if (defined(__i386__) || defined(__x86_64__)) && defined(__GCC_ASM_FLAG_O= UTPUTS__) static bool asm_test_bit(long nr, const unsigned long *addr) { bool oldbit; @@ -48,9 +47,6 @@ static bool asm_test_bit(long nr, const unsigned long *ad= dr) =20 return oldbit; } -#else -#define asm_test_bit test_bit -#endif =20 static int do_for_each_set_bit(unsigned int num_bits) { --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98F912066D8 for ; Fri, 14 Mar 2025 21:41:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988517; cv=none; b=GtiZDDINIYcoNqQoYaDGeyg3yzyBLGicWK3Bg9IcIDdC+fTnQiO0HoXnryfgpktviZcieLk7RiHEc8vDQ6WAnZc44o9fjyCg7NlYd8kuJ6QIYeKwAoBJXcI+CAVwRPT0Qetwu+nZ8C2kO6nOgBwXwowwuyoOjH4J7kL/ftTwlxw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988517; c=relaxed/simple; bh=PorFgzHa3n8AH+cjYhe35ak5zLtn6Ejf+tmiPWhyFTQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PRAPUbCwdVe9EDRY3sYxlNRtX1Lq6TCphxBLXdr6pbyeCM5l6ujBWu3Lm7t0okyJYWDEvPp3twi3j6HpH7NehQyyBtV64lFxff6oKT0g8Au6O4Leg76CNvSozL/ZAz7g8XIpBuGn8cpKSS9Ky43PKSt0dwDBzNh7tM03w95vVX8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=dgdR6p1T; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="dgdR6p1T" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1B804C4CEEC; Fri, 14 Mar 2025 21:41:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988517; bh=PorFgzHa3n8AH+cjYhe35ak5zLtn6Ejf+tmiPWhyFTQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dgdR6p1TECz+YGqfj6v6YyPW5STgoCoI0XNknQCI0U5rHtSeMZU2lI3BXvGvfX5aX p+p7iyMcsc80jcrLxLYYYFNSZcyJZEhBpN7GN9O7djjfHoqG9uv1q6eq3rXMDjjHJd ght+1RyjIIcttfB+kkHzY2UbrrnJWjYlqoTs2IgYu+0ofn201iPD2xq0IkulUbUZSB tcz0FMOwAzJk6Jt8ErrpJjBq5g3gTGdzDXuBor+492w5JA3mKTA5dptnrDSb58ONT8 ucqTPd/DYs5DVQpiVSk0MK/TQnxxF93yBR8eb/Zmvy6sX1jyUwPKPidcAe8QsO/rhr QhbwxnFltrUUA== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 06/20] x86/asm: Remove CC_SET() Date: Fri, 14 Mar 2025 14:41:19 -0700 Message-ID: X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Now that flag output operands are unconditionally supported, CC_SET() is just a comment. Remove it. Signed-off-by: Josh Poimboeuf --- arch/x86/boot/bitops.h | 2 +- arch/x86/boot/boot.h | 4 ++-- arch/x86/boot/string.c | 2 +- arch/x86/include/asm/archrandom.h | 2 -- arch/x86/include/asm/asm.h | 3 +-- arch/x86/include/asm/bitops.h | 6 ------ arch/x86/include/asm/cmpxchg.h | 4 ---- arch/x86/include/asm/cmpxchg_32.h | 2 -- arch/x86/include/asm/cmpxchg_64.h | 1 - arch/x86/include/asm/percpu.h | 4 ---- arch/x86/include/asm/rmwcc.h | 2 +- arch/x86/include/asm/sev.h | 1 - arch/x86/include/asm/signal.h | 2 +- arch/x86/include/asm/special_insns.h | 1 - arch/x86/include/asm/uaccess.h | 1 - tools/arch/x86/include/asm/asm.h | 5 ++--- 16 files changed, 9 insertions(+), 33 deletions(-) diff --git a/arch/x86/boot/bitops.h b/arch/x86/boot/bitops.h index 8518ae214c9b..4f773e0957b0 100644 --- a/arch/x86/boot/bitops.h +++ b/arch/x86/boot/bitops.h @@ -27,7 +27,7 @@ static inline bool variable_test_bit(int nr, const void *= addr) bool v; const u32 *p =3D addr; =20 - asm("btl %2,%1" CC_SET(c) : CC_OUT(c) (v) : "m" (*p), "Ir" (nr)); + asm("btl %2,%1" : CC_OUT(c) (v) : "m" (*p), "Ir" (nr)); return v; } =20 diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h index 0f24f7ebec9b..a35823039847 100644 --- a/arch/x86/boot/boot.h +++ b/arch/x86/boot/boot.h @@ -155,14 +155,14 @@ static inline void wrgs32(u32 v, addr_t addr) static inline bool memcmp_fs(const void *s1, addr_t s2, size_t len) { bool diff; - asm volatile("fs; repe; cmpsb" CC_SET(nz) + asm volatile("fs; repe; cmpsb" : CC_OUT(nz) (diff), "+D" (s1), "+S" (s2), "+c" (len)); return diff; } static inline bool memcmp_gs(const void *s1, addr_t s2, size_t len) { bool diff; - asm volatile("gs; repe; cmpsb" CC_SET(nz) + asm volatile("gs; repe; cmpsb" : CC_OUT(nz) (diff), "+D" (s1), "+S" (s2), "+c" (len)); return diff; } diff --git a/arch/x86/boot/string.c b/arch/x86/boot/string.c index 84f7a883ce1e..c0cc6d1a7030 100644 --- a/arch/x86/boot/string.c +++ b/arch/x86/boot/string.c @@ -32,7 +32,7 @@ int memcmp(const void *s1, const void *s2, size_t len) { bool diff; - asm("repe; cmpsb" CC_SET(nz) + asm("repe; cmpsb" : CC_OUT(nz) (diff), "+D" (s1), "+S" (s2), "+c" (len)); return diff; } diff --git a/arch/x86/include/asm/archrandom.h b/arch/x86/include/asm/archr= andom.h index 02bae8e0758b..813a99b6ec7b 100644 --- a/arch/x86/include/asm/archrandom.h +++ b/arch/x86/include/asm/archrandom.h @@ -23,7 +23,6 @@ static inline bool __must_check rdrand_long(unsigned long= *v) unsigned int retry =3D RDRAND_RETRY_LOOPS; do { asm volatile("rdrand %[out]" - CC_SET(c) : CC_OUT(c) (ok), [out] "=3Dr" (*v)); if (ok) return true; @@ -35,7 +34,6 @@ static inline bool __must_check rdseed_long(unsigned long= *v) { bool ok; asm volatile("rdseed %[out]" - CC_SET(c) : CC_OUT(c) (ok), [out] "=3Dr" (*v)); return ok; } diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h index fdebd4356860..619817841f4c 100644 --- a/arch/x86/include/asm/asm.h +++ b/arch/x86/include/asm/asm.h @@ -128,10 +128,9 @@ static __always_inline __pure void *rip_rel_ptr(void *= p) #endif =20 /* - * Macros to generate condition code outputs from inline assembly, + * Generate condition code outputs from inline assembly. * The output operand must be type "bool". */ -#define CC_SET(c) "\n\t/* output condition code " #c "*/\n" #define CC_OUT(c) "=3D@cc" #c =20 #ifdef __KERNEL__ diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index b96d45944c59..67b86e7c1ea3 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -99,7 +99,6 @@ static __always_inline bool arch_xor_unlock_is_negative_b= yte(unsigned long mask, { bool negative; asm volatile(LOCK_PREFIX "xorb %2,%1" - CC_SET(s) : CC_OUT(s) (negative), WBYTE_ADDR(addr) : "iq" ((char)mask) : "memory"); return negative; @@ -149,7 +148,6 @@ arch___test_and_set_bit(unsigned long nr, volatile unsi= gned long *addr) bool oldbit; =20 asm(__ASM_SIZE(bts) " %2,%1" - CC_SET(c) : CC_OUT(c) (oldbit) : ADDR, "Ir" (nr) : "memory"); return oldbit; @@ -175,7 +173,6 @@ arch___test_and_clear_bit(unsigned long nr, volatile un= signed long *addr) bool oldbit; =20 asm volatile(__ASM_SIZE(btr) " %2,%1" - CC_SET(c) : CC_OUT(c) (oldbit) : ADDR, "Ir" (nr) : "memory"); return oldbit; @@ -187,7 +184,6 @@ arch___test_and_change_bit(unsigned long nr, volatile u= nsigned long *addr) bool oldbit; =20 asm volatile(__ASM_SIZE(btc) " %2,%1" - CC_SET(c) : CC_OUT(c) (oldbit) : ADDR, "Ir" (nr) : "memory"); =20 @@ -211,7 +207,6 @@ static __always_inline bool constant_test_bit_acquire(l= ong nr, const volatile un bool oldbit; =20 asm volatile("testb %2,%1" - CC_SET(nz) : CC_OUT(nz) (oldbit) : "m" (((unsigned char *)addr)[nr >> 3]), "i" (1 << (nr & 7)) @@ -225,7 +220,6 @@ static __always_inline bool variable_test_bit(long nr, = volatile const unsigned l bool oldbit; =20 asm volatile(__ASM_SIZE(bt) " %2,%1" - CC_SET(c) : CC_OUT(c) (oldbit) : "m" (*(unsigned long *)addr), "Ir" (nr) : "memory"); =20 diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h index fd8afc1f5f6b..e801dc982a64 100644 --- a/arch/x86/include/asm/cmpxchg.h +++ b/arch/x86/include/asm/cmpxchg.h @@ -166,7 +166,6 @@ extern void __add_wrong_size(void) { \ volatile u8 *__ptr =3D (volatile u8 *)(_ptr); \ asm volatile(lock "cmpxchgb %[new], %[ptr]" \ - CC_SET(z) \ : CC_OUT(z) (success), \ [ptr] "+m" (*__ptr), \ [old] "+a" (__old) \ @@ -178,7 +177,6 @@ extern void __add_wrong_size(void) { \ volatile u16 *__ptr =3D (volatile u16 *)(_ptr); \ asm volatile(lock "cmpxchgw %[new], %[ptr]" \ - CC_SET(z) \ : CC_OUT(z) (success), \ [ptr] "+m" (*__ptr), \ [old] "+a" (__old) \ @@ -190,7 +188,6 @@ extern void __add_wrong_size(void) { \ volatile u32 *__ptr =3D (volatile u32 *)(_ptr); \ asm volatile(lock "cmpxchgl %[new], %[ptr]" \ - CC_SET(z) \ : CC_OUT(z) (success), \ [ptr] "+m" (*__ptr), \ [old] "+a" (__old) \ @@ -202,7 +199,6 @@ extern void __add_wrong_size(void) { \ volatile u64 *__ptr =3D (volatile u64 *)(_ptr); \ asm volatile(lock "cmpxchgq %[new], %[ptr]" \ - CC_SET(z) \ : CC_OUT(z) (success), \ [ptr] "+m" (*__ptr), \ [old] "+a" (__old) \ diff --git a/arch/x86/include/asm/cmpxchg_32.h b/arch/x86/include/asm/cmpxc= hg_32.h index 6d7afee2fa07..50f973ca635d 100644 --- a/arch/x86/include/asm/cmpxchg_32.h +++ b/arch/x86/include/asm/cmpxchg_32.h @@ -46,7 +46,6 @@ static __always_inline u64 __cmpxchg64_local(volatile u64= *ptr, u64 old, u64 new bool ret; \ \ asm volatile(_lock "cmpxchg8b %[ptr]" \ - CC_SET(e) \ : CC_OUT(e) (ret), \ [ptr] "+m" (*(_ptr)), \ "+a" (o.low), "+d" (o.high) \ @@ -125,7 +124,6 @@ static __always_inline u64 arch_cmpxchg64_local(volatil= e u64 *ptr, u64 old, u64 ALTERNATIVE(_lock_loc \ "call cmpxchg8b_emu", \ _lock "cmpxchg8b %a[ptr]", X86_FEATURE_CX8) \ - CC_SET(e) \ : ALT_OUTPUT_SP(CC_OUT(e) (ret), \ "+a" (o.low), "+d" (o.high)) \ : "b" (n.low), "c" (n.high), \ diff --git a/arch/x86/include/asm/cmpxchg_64.h b/arch/x86/include/asm/cmpxc= hg_64.h index 5e241306db26..03ab7699648c 100644 --- a/arch/x86/include/asm/cmpxchg_64.h +++ b/arch/x86/include/asm/cmpxchg_64.h @@ -66,7 +66,6 @@ static __always_inline u128 arch_cmpxchg128_local(volatil= e u128 *ptr, u128 old, bool ret; \ \ asm volatile(_lock "cmpxchg16b %[ptr]" \ - CC_SET(e) \ : CC_OUT(e) (ret), \ [ptr] "+m" (*(_ptr)), \ "+a" (o.low), "+d" (o.high) \ diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h index 462d071c87d4..9c95f2576df1 100644 --- a/arch/x86/include/asm/percpu.h +++ b/arch/x86/include/asm/percpu.h @@ -294,7 +294,6 @@ do { \ \ asm qual (__pcpu_op_##size("cmpxchg") "%[nval], " \ __percpu_arg([var]) \ - CC_SET(z) \ : CC_OUT(z) (success), \ [oval] "+a" (pco_old__), \ [var] "+m" (__my_cpu_var(_var)) \ @@ -352,7 +351,6 @@ do { \ asm_inline qual ( \ ALTERNATIVE("call this_cpu_cmpxchg8b_emu", \ "cmpxchg8b " __percpu_arg([var]), X86_FEATURE_CX8) \ - CC_SET(z) \ : ALT_OUTPUT_SP(CC_OUT(z) (success), \ [var] "+m" (__my_cpu_var(_var)), \ "+a" (old__.low), "+d" (old__.high)) \ @@ -421,7 +419,6 @@ do { \ asm_inline qual ( \ ALTERNATIVE("call this_cpu_cmpxchg16b_emu", \ "cmpxchg16b " __percpu_arg([var]), X86_FEATURE_CX16) \ - CC_SET(z) \ : ALT_OUTPUT_SP(CC_OUT(z) (success), \ [var] "+m" (__my_cpu_var(_var)), \ "+a" (old__.low), "+d" (old__.high)) \ @@ -570,7 +567,6 @@ do { \ bool oldbit; \ \ asm volatile("btl %[nr], " __percpu_arg([var]) \ - CC_SET(c) \ : CC_OUT(c) (oldbit) \ : [var] "m" (__my_cpu_var(_var)), \ [nr] "rI" (_nr)); \ diff --git a/arch/x86/include/asm/rmwcc.h b/arch/x86/include/asm/rmwcc.h index a54303e3dfa1..081311e22438 100644 --- a/arch/x86/include/asm/rmwcc.h +++ b/arch/x86/include/asm/rmwcc.h @@ -9,7 +9,7 @@ #define __GEN_RMWcc(fullop, _var, cc, clobbers, ...) \ ({ \ bool c; \ - asm volatile (fullop CC_SET(cc) \ + asm volatile (fullop \ : [var] "+m" (_var), CC_OUT(cc) (c) \ : __VA_ARGS__ : clobbers); \ c; \ diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h index ba7999f66abe..5bd058d3e133 100644 --- a/arch/x86/include/asm/sev.h +++ b/arch/x86/include/asm/sev.h @@ -440,7 +440,6 @@ static inline int pvalidate(unsigned long vaddr, bool r= mp_psize, bool validate) =20 /* "pvalidate" mnemonic support in binutils 2.36 and newer */ asm volatile(".byte 0xF2, 0x0F, 0x01, 0xFF\n\t" - CC_SET(c) : CC_OUT(c) (no_rmpupdate), "=3Da"(rc) : "a"(vaddr), "c"(rmp_psize), "d"(validate) : "memory", "cc"); diff --git a/arch/x86/include/asm/signal.h b/arch/x86/include/asm/signal.h index 4a4043ca6493..e0d37bf00f27 100644 --- a/arch/x86/include/asm/signal.h +++ b/arch/x86/include/asm/signal.h @@ -83,7 +83,7 @@ static inline int __const_sigismember(sigset_t *set, int = _sig) static inline int __gen_sigismember(sigset_t *set, int _sig) { bool ret; - asm("btl %2,%1" CC_SET(c) + asm("btl %2,%1" : CC_OUT(c) (ret) : "m"(*set), "Ir"(_sig-1)); return ret; } diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/sp= ecial_insns.h index b905076cf7f6..9c1cc0ef8f3c 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -274,7 +274,6 @@ static inline int enqcmds(void __iomem *dst, const void= *src) * See movdir64b()'s comment on operand specification. */ asm volatile(".byte 0xf3, 0x0f, 0x38, 0xf8, 0x02, 0x66, 0x90" - CC_SET(z) : CC_OUT(z) (zf), "+m" (*__dst) : "m" (*__src), "a" (__dst), "d" (__src)); =20 diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h index 3a7755c1a441..c37063121aaa 100644 --- a/arch/x86/include/asm/uaccess.h +++ b/arch/x86/include/asm/uaccess.h @@ -417,7 +417,6 @@ do { \ __typeof__(*(_ptr)) __new =3D (_new); \ asm volatile("\n" \ "1: " LOCK_PREFIX "cmpxchg"itype" %[new], %[ptr]\n"\ - CC_SET(z) \ "2:\n" \ _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_EFAULT_REG, \ %[errout]) \ diff --git a/tools/arch/x86/include/asm/asm.h b/tools/arch/x86/include/asm/= asm.h index f66cf34f6197..b97b3b53045f 100644 --- a/tools/arch/x86/include/asm/asm.h +++ b/tools/arch/x86/include/asm/asm.h @@ -109,11 +109,10 @@ #endif =20 /* - * Macros to generate condition code outputs from inline assembly, + * Generate condition code outputs from inline assembly. * The output operand must be type "bool". */ -# define CC_SET(c) "\n\t/* output condition code " #c "*/\n" -# define CC_OUT(c) "=3D@cc" #c +#define CC_OUT(c) "=3D@cc" #c =20 #ifdef __KERNEL__ =20 --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 75F85206F21 for ; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LQm6Iw24" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9E386C4CEED; Fri, 14 Mar 2025 21:41:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988518; bh=yOdRu7Fcxv19X60rh949WLYqt0bzYdV5JlS82PVB8vo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LQm6Iw24PHbIExUGvoTW+2mLwJGDJoJlxHjmW6cZU8Kd0ZnHNbAbcSJ+2wmkRQP7Q iiPSLokbVJ/fM+mjFhF7eRkcS9Meor05L3LBy+xyVv90SjedQK8nde+7foBLGjU8U9 S7thg/Pn4zMs3xYOZiRDzFmwlRuXK212czSe9Igh5UNrm4crsSANR+vTZnYekyAVhu Lvu1Ay6yOXH0GrbGx7DJ50SZP+geLdkfb2yuLqc+BFi4EL0SCerVECcm+GOyGIgFbo FNJ+x5KZh+WM6hIYoZy4vdJKrLsuj8Cpf9hpb7DloVx9uD8zfUJH5uB1ze5iJWMAts HHQ4qeAB80/Vw== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 07/20] x86/alternative: Remove operand numbering restrictions Date: Fri, 14 Mar 2025 14:41:20 -0700 Message-ID: <3a2c1e24ebc72d6c32294b094fc3fefd9c2afdc2.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" alternative_input() and alternative_io() arbitrarily require input constraint operand numbering to start at index 1. No more callers rely on that. Simplify the interfaces by removing that restriction. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/alternative.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alte= rnative.h index 484dfea35aaa..3804b82cb03c 100644 --- a/arch/x86/include/asm/alternative.h +++ b/arch/x86/include/asm/alternative.h @@ -214,17 +214,15 @@ static inline int alternatives_text_reserved(void *st= art, void *end) * * Peculiarities: * No memory clobber here. - * Argument numbers start with 1. - * Leaving an unused argument 0 to keep API compatibility. */ #define alternative_input(oldinstr, newinstr, ft_flags, input...) \ asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) \ - : : "i" (0), ## input) + : : input) =20 /* Like alternative_input, but with a single output argument */ #define alternative_io(oldinstr, newinstr, ft_flags, output, input...) \ asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) \ - : output : "i" (0), ## input) + : output : input) =20 /* * Like alternative_io, but for replacing a direct call with another one. --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A65BC20765E for ; Fri, 14 Mar 2025 21:41:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988518; cv=none; b=SuVsvEhMj9e0lj7F/EAcwqP512xUp1WXZEaLfLlLaYSFmm7U1c8zXtTFCy/rEWmI5VLew8geJmBzh3CVrfWBSoB8fv9P7eJZNqo+Rquv0dgsPtHmowT+6e3swkGue9a7JESe4QiSSxQm8DWk8Fs4xksI9LqoFznhpSU0gve3dB8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988518; c=relaxed/simple; bh=izdT47cZGsStDFz27dBAXEaLTeKotz3eSdtzETaRuKY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Jjoa/oVOnCb5x06LmZiqWww8OYZWxI3m3Xkgq9uJKFFCZvtdlisAH/qPPLaN8C1h7c0ShB2lZ14vxetOEtlYqCUGo4qnPbSxyXmnjX2M+FbFCmDalbGFqaOwud19Bz6pUCq32zQ7p23M7FvuaH8ko931auR66iHgTqFWqp2TKG0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QYPnGvmj; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QYPnGvmj" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2B1B6C4CEE9; Fri, 14 Mar 2025 21:41:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988518; bh=izdT47cZGsStDFz27dBAXEaLTeKotz3eSdtzETaRuKY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QYPnGvmjb1rKr7Dtg8cvuU76mgwa8M1cFRvcXuIMc6n/yCzSU9oMDeIhwCJzEwHx9 pvLD/v7sMr5qynP5SFDusl2tT1B6lVNdd+kKcmekcAQgY84fIh6lDhg2OjUSqs4QTR xo8+NRYavXegAO/OEBvJ6xlRI8DRM2vJTuJ2/dwNAD3zhKvoWs0oeTJkTvO8Ez8s3F Ba/02Piuw4pwXJJtkx70WuljDJWlKw3b78X1HmaG6blxScj9PqVY/6bwTNdvEFUFaT M88I5h4pLh4+XTCoeHwTF4U/32vFyyna0wscwlx7kOtiVshownnwgbUjZLFukB6PoT dKjaMS4134JRw== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 08/20] x86/asm: Replace ASM_{OUTPUT,INPUT}() with ARG() Date: Fri, 14 Mar 2025 14:41:21 -0700 Message-ID: <6a9e1c01f21ba64aefc7082f660615508c3df8f3.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Replace ASM_OUTPUT() and ASM_INPUT() with ARG(). It provides more visual separation and vertical alignment, making it easy to distinguish the outputs, inputs and clobbers. It will also come in handy for other inline asm wrappers. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/apic.h | 2 +- arch/x86/include/asm/asm.h | 11 ++-- arch/x86/include/asm/atomic64_32.h | 93 +++++++++++++++------------- arch/x86/include/asm/page_64.h | 12 ++-- arch/x86/include/asm/segment.h | 5 +- arch/x86/include/asm/special_insns.h | 2 +- 6 files changed, 67 insertions(+), 58 deletions(-) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index ecf1b229f09b..6526bad6ec81 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -100,7 +100,7 @@ static inline void native_apic_mem_write(u32 reg, u32 v) =20 alternative_io("movl %[val], %[mem]", "xchgl %[val], %[mem]", X86_BUG_11AP, - ASM_OUTPUT([val] "+r" (v), [mem] "+m" (*addr))); + ARG([val] "+r" (v), [mem] "+m" (*addr))); } =20 static inline u32 native_apic_mem_read(u32 reg) diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h index 619817841f4c..9f0f830628f9 100644 --- a/arch/x86/include/asm/asm.h +++ b/arch/x86/include/asm/asm.h @@ -212,11 +212,14 @@ static __always_inline __pure void *rip_rel_ptr(void = *p) #define __COMMA(...) , ##__VA_ARGS__ =20 /* - * Combine multiple asm inline constraint args into a single arg for passi= ng to - * another macro. + * ARG() can be used to bundle multiple arguments into a single argument f= or + * passing to a macro. + * + * For inline asm constraint operands, this is recommended even for single + * operands as it provides visual separation and vertical alignment simila= r to + * the ':' characters in an inline asm statement. */ -#define ASM_OUTPUT(x...) x -#define ASM_INPUT(x...) x +#define ARG(x...) x =20 /* * This output constraint should be used for any inline asm which has a "c= all" diff --git a/arch/x86/include/asm/atomic64_32.h b/arch/x86/include/asm/atom= ic64_32.h index ab838205c1c6..8775f84222e6 100644 --- a/arch/x86/include/asm/atomic64_32.h +++ b/arch/x86/include/asm/atomic64_32.h @@ -59,9 +59,11 @@ static __always_inline s64 arch_atomic64_read_nonatomic(= const atomic64_t *v) #define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8) #else #define __alternative_atomic64(f, g, out, in, clobbers...) \ - alternative_call(atomic64_##f##_386, atomic64_##g##_cx8, \ - X86_FEATURE_CX8, ASM_OUTPUT(out), \ - ASM_INPUT(in), clobbers) + alternative_call(atomic64_##f##_386, \ + atomic64_##g##_cx8, X86_FEATURE_CX8, \ + ARG(out), \ + ARG(in), \ + ARG(clobbers)) =20 #define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8); \ ATOMIC64_DECL_ONE(sym##_386) @@ -73,7 +75,7 @@ ATOMIC64_DECL_ONE(dec_386); #endif =20 #define alternative_atomic64(f, out, in, clobbers...) \ - __alternative_atomic64(f, f, ASM_OUTPUT(out), ASM_INPUT(in), clobbers) + __alternative_atomic64(f, f, ARG(out), ARG(in), ARG(clobbers)) =20 ATOMIC64_DECL(read); ATOMIC64_DECL(set); @@ -109,9 +111,9 @@ static __always_inline s64 arch_atomic64_xchg(atomic64_= t *v, s64 n) unsigned high =3D (unsigned)(n >> 32); unsigned low =3D (unsigned)n; alternative_atomic64(xchg, - "=3D&A" (o), - ASM_INPUT("S" (v), "b" (low), "c" (high)), - "memory"); + ARG("=3D&A" (o)), + ARG("S" (v), "b" (low), "c" (high)), + ARG("memory")); return o; } #define arch_atomic64_xchg arch_atomic64_xchg @@ -121,24 +123,27 @@ static __always_inline void arch_atomic64_set(atomic6= 4_t *v, s64 i) unsigned high =3D (unsigned)(i >> 32); unsigned low =3D (unsigned)i; alternative_atomic64(set, - /* no output */, - ASM_INPUT("S" (v), "b" (low), "c" (high)), - "eax", "edx", "memory"); + ARG(), + ARG("S" (v), "b" (low), "c" (high)), + ARG("eax", "edx", "memory")); } =20 static __always_inline s64 arch_atomic64_read(const atomic64_t *v) { s64 r; - alternative_atomic64(read, "=3D&A" (r), "c" (v), "memory"); + alternative_atomic64(read, + ARG("=3D&A" (r)), + ARG("c" (v)), + ARG("memory")); return r; } =20 static __always_inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v) { alternative_atomic64(add_return, - ASM_OUTPUT("+A" (i), "+c" (v)), - /* no input */, - "memory"); + ARG("+A" (i), "+c" (v)), + ARG(), + ARG("memory")); return i; } #define arch_atomic64_add_return arch_atomic64_add_return @@ -146,9 +151,9 @@ static __always_inline s64 arch_atomic64_add_return(s64= i, atomic64_t *v) static __always_inline s64 arch_atomic64_sub_return(s64 i, atomic64_t *v) { alternative_atomic64(sub_return, - ASM_OUTPUT("+A" (i), "+c" (v)), - /* no input */, - "memory"); + ARG("+A" (i), "+c" (v)), + ARG(), + ARG("memory")); return i; } #define arch_atomic64_sub_return arch_atomic64_sub_return @@ -157,9 +162,9 @@ static __always_inline s64 arch_atomic64_inc_return(ato= mic64_t *v) { s64 a; alternative_atomic64(inc_return, - "=3D&A" (a), - "S" (v), - "memory", "ecx"); + ARG("=3D&A" (a)), + ARG("S" (v)), + ARG("memory", "ecx")); return a; } #define arch_atomic64_inc_return arch_atomic64_inc_return @@ -168,9 +173,9 @@ static __always_inline s64 arch_atomic64_dec_return(ato= mic64_t *v) { s64 a; alternative_atomic64(dec_return, - "=3D&A" (a), - "S" (v), - "memory", "ecx"); + ARG("=3D&A" (a)), + ARG("S" (v)), + ARG("memory", "ecx")); return a; } #define arch_atomic64_dec_return arch_atomic64_dec_return @@ -178,34 +183,34 @@ static __always_inline s64 arch_atomic64_dec_return(a= tomic64_t *v) static __always_inline void arch_atomic64_add(s64 i, atomic64_t *v) { __alternative_atomic64(add, add_return, - ASM_OUTPUT("+A" (i), "+c" (v)), - /* no input */, - "memory"); + ARG("+A" (i), "+c" (v)), + ARG(), + ARG("memory")); } =20 static __always_inline void arch_atomic64_sub(s64 i, atomic64_t *v) { __alternative_atomic64(sub, sub_return, - ASM_OUTPUT("+A" (i), "+c" (v)), - /* no input */, - "memory"); + ARG("+A" (i), "+c" (v)), + ARG(), + ARG("memory")); } =20 static __always_inline void arch_atomic64_inc(atomic64_t *v) { __alternative_atomic64(inc, inc_return, - /* no output */, - "S" (v), - "memory", "eax", "ecx", "edx"); + ARG(), + ARG("S" (v)), + ARG("memory", "eax", "ecx", "edx")); } #define arch_atomic64_inc arch_atomic64_inc =20 static __always_inline void arch_atomic64_dec(atomic64_t *v) { __alternative_atomic64(dec, dec_return, - /* no output */, - "S" (v), - "memory", "eax", "ecx", "edx"); + ARG(), + ARG("S" (v)), + ARG("memory", "eax", "ecx", "edx")); } #define arch_atomic64_dec arch_atomic64_dec =20 @@ -214,9 +219,9 @@ static __always_inline int arch_atomic64_add_unless(ato= mic64_t *v, s64 a, s64 u) unsigned low =3D (unsigned)u; unsigned high =3D (unsigned)(u >> 32); alternative_atomic64(add_unless, - ASM_OUTPUT("+A" (a), "+c" (low), "+D" (high)), - "S" (v), - "memory"); + ARG("+A" (a), "+c" (low), "+D" (high)), + ARG("S" (v)), + ARG("memory")); return (int)a; } #define arch_atomic64_add_unless arch_atomic64_add_unless @@ -225,9 +230,9 @@ static __always_inline int arch_atomic64_inc_not_zero(a= tomic64_t *v) { int r; alternative_atomic64(inc_not_zero, - "=3D&a" (r), - "S" (v), - "ecx", "edx", "memory"); + ARG("=3D&a" (r)), + ARG("S" (v)), + ARG("ecx", "edx", "memory")); return r; } #define arch_atomic64_inc_not_zero arch_atomic64_inc_not_zero @@ -236,9 +241,9 @@ static __always_inline s64 arch_atomic64_dec_if_positiv= e(atomic64_t *v) { s64 r; alternative_atomic64(dec_if_positive, - "=3D&A" (r), - "S" (v), - "ecx", "memory"); + ARG("=3D&A" (r)), + ARG("S" (v)), + ARG("ecx", "memory")); return r; } #define arch_atomic64_dec_if_positive arch_atomic64_dec_if_positive diff --git a/arch/x86/include/asm/page_64.h b/arch/x86/include/asm/page_64.h index db3003acd41e..0604e9d49221 100644 --- a/arch/x86/include/asm/page_64.h +++ b/arch/x86/include/asm/page_64.h @@ -54,9 +54,9 @@ static inline void clear_page(void *page) alternative_call_2(clear_page_orig, clear_page_rep, X86_FEATURE_REP_GOOD, clear_page_erms, X86_FEATURE_ERMS, - "=3DD" (page), - "D" (page), - "cc", "memory", "rax", "rcx"); + ARG("=3DD" (page)), + ARG("D" (page)), + ARG("cc", "memory", "rax", "rcx")); } =20 void copy_page(void *to, void *from); @@ -87,9 +87,9 @@ static __always_inline unsigned long task_size_max(void) =20 alternative_io("movq %[small], %[ret]", "movq %[large], %[ret]", X86_FEATURE_LA57, - [ret] "=3Dr" (ret), - [small] "i" ((1ul << 47)-PAGE_SIZE), - [large] "i" ((1ul << 56)-PAGE_SIZE)); + ARG([ret] "=3Dr" (ret)), + ARG([small] "i" ((1ul << 47)-PAGE_SIZE), + [large] "i" ((1ul << 56)-PAGE_SIZE))); =20 return ret; } diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h index 9d6411c65920..32b1aa9f721b 100644 --- a/arch/x86/include/asm/segment.h +++ b/arch/x86/include/asm/segment.h @@ -254,10 +254,11 @@ static inline void vdso_read_cpunode(unsigned *cpu, u= nsigned *node) * * If RDPID is available, use it. */ - alternative_io ("lsl %[seg],%[p]", + alternative_io("lsl %[seg],%[p]", ".byte 0xf3,0x0f,0xc7,0xf8", /* RDPID %eax/rax */ X86_FEATURE_RDPID, - [p] "=3Da" (p), [seg] "r" (__CPUNODE_SEG)); + ARG([p] "=3Da" (p)), + ARG([seg] "r" (__CPUNODE_SEG))); =20 if (cpu) *cpu =3D (p & VDSO_CPUNODE_MASK); diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/sp= ecial_insns.h index 9c1cc0ef8f3c..a6a3f4c95f03 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -178,7 +178,7 @@ static inline void clflushopt(volatile void *__p) { alternative_io(".byte 0x3e; clflush %[val]", ".byte 0x66; clflush %[val]", X86_FEATURE_CLFLUSHOPT, - [val] "+m" (*(volatile char __force *)__p)); + ARG([val] "+m" (*(volatile char __force *)__p))); } =20 static inline void clwb(volatile void *__p) --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5EF12236FF for ; Fri, 14 Mar 2025 21:41:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 09/20] x86/alternative: Simplify alternative_io() interface Date: Fri, 14 Mar 2025 14:41:22 -0700 Message-ID: X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Similar to alternative_call(), change alternative_io() to allow outputs, inputs, and clobbers to be specified individually. Also add in the "memory" clobber for consistent behavior with the other alternative macros. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/alternative.h | 15 +++++++++++---- arch/x86/include/asm/apic.h | 3 ++- arch/x86/include/asm/special_insns.h | 3 ++- 3 files changed, 15 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alte= rnative.h index 3804b82cb03c..870b1633e1e0 100644 --- a/arch/x86/include/asm/alternative.h +++ b/arch/x86/include/asm/alternative.h @@ -219,10 +219,17 @@ static inline int alternatives_text_reserved(void *st= art, void *end) asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) \ : : input) =20 -/* Like alternative_input, but with a single output argument */ -#define alternative_io(oldinstr, newinstr, ft_flags, output, input...) \ - asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) \ - : output : input) +/* + * Alternative inline assembly with input, output and clobbers. + * + * All @output, @input, and @clobbers should be wrapped with ARG() for both + * functionality and readability reasons. + */ +#define alternative_io(oldinstr, newinstr, ft_flags, output, input, clobbe= rs...) \ + asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) \ + : output \ + : input \ + : "memory", ## clobbers) =20 /* * Like alternative_io, but for replacing a direct call with another one. diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 6526bad6ec81..8b0c2a392f8b 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -100,7 +100,8 @@ static inline void native_apic_mem_write(u32 reg, u32 v) =20 alternative_io("movl %[val], %[mem]", "xchgl %[val], %[mem]", X86_BUG_11AP, - ARG([val] "+r" (v), [mem] "+m" (*addr))); + ARG([val] "+r" (v), [mem] "+m" (*addr)), + ARG()); } =20 static inline u32 native_apic_mem_read(u32 reg) diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/sp= ecial_insns.h index a6a3f4c95f03..16fb2bc09059 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -178,7 +178,8 @@ static inline void clflushopt(volatile void *__p) { alternative_io(".byte 0x3e; clflush %[val]", ".byte 0x66; clflush %[val]", X86_FEATURE_CLFLUSHOPT, - ARG([val] "+m" (*(volatile char __force *)__p))); + ARG([val] "+m" (*(volatile char __force *)__p)), + ARG()); } =20 static inline void clwb(volatile void *__p) --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39790225404 for ; Fri, 14 Mar 2025 21:41:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988520; cv=none; b=rs9wWinW+20vTocBPgBTvzj989ZiJUViJMJeX59F4dqhdHTJOOU/dkPhONOMLNmh+wYRRa7p5tb8LUzePDuXj1O5IlE75X/Iic3AWgde+4sd6d0JS4xQ8NjbxSdDMAoZeg/wrhibWEwkzCw6NtK2BBXv6u7OSF2ZWKaVfxncIsI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988520; c=relaxed/simple; bh=0kn0S4ccqzhgBAKRunMO8Nv5aGRcCEGvj6oTNQnlhOg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qw5JozhferIHfE2V0k25/LhyILnsLThcEjc6j1XZv+iZXsQWgI19ty7B8LK5Gvm9kaHXeSdvsRJZaxQZFvTWJAmifWg6ALEo/CHVHYBdWuJJp9EpotRptnrl9dAbRhhHyT8kBq81GmoUaU/K6NgEgDWeGnCPkLQ2D1eIRa31qCQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ka9QUfzg; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ka9QUfzg" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 45F59C4CEE3; Fri, 14 Mar 2025 21:41:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988519; bh=0kn0S4ccqzhgBAKRunMO8Nv5aGRcCEGvj6oTNQnlhOg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ka9QUfzgNzBiId7jTkdJI6w0XRIMkukM4XH83qejB4ktuAb73KG0QP7Dy0EJBD0Ns KVHpQvmqfnz8W6jTdSi+zBQ6CeGmXzZKgN70/11Vq5RMSPlBRO7y29MikDcOYqIlh+ 5lcuT9gTZjeMtKD4M+e0U4N4mDJwSJC9M9OZTTRmldSMfBeEKw1xTxI0kECH4SiqHC rY2oWRzdqPjmOrw3nIXE8sg5K/dsz3r/s7n5XxbJTAgnfxRfGXbWm9ayp+aNuM0YYw XQIHmPCa+8tLikbnMPv9tYnTJ/7+lX93g53MSlQgb/NgOD2UQB+/SHxPxlFRyvSfjl uOp4BLlrGqCEg== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 10/20] x86/alternative: Add alternative_2_io() Date: Fri, 14 Mar 2025 14:41:23 -0700 Message-ID: X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Make an ALTERNATIVE_2() version of alternative_io(). Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/alternative.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alte= rnative.h index 870b1633e1e0..0acbb013e7ae 100644 --- a/arch/x86/include/asm/alternative.h +++ b/arch/x86/include/asm/alternative.h @@ -231,6 +231,14 @@ static inline int alternatives_text_reserved(void *sta= rt, void *end) : input \ : "memory", ## clobbers) =20 +#define alternative_2_io(oldinstr, newinstr1, ft_flags1, newinstr2, ft_fla= gs2, \ + output, input, clobbers...) \ + asm_inline volatile(ALTERNATIVE_2(oldinstr, newinstr1, ft_flags1, \ + newinstr2, ft_flags2) \ + : output \ + : input \ + : "memory", ## clobbers) + /* * Like alternative_io, but for replacing a direct call with another one. * --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1E90229B2D for ; Fri, 14 Mar 2025 21:42:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988521; cv=none; b=q2kJgk44VZrrQlZnVc4uwb6YJMjqbfaa1M26ekraucypHxBT2TfDPls98pKh//SMkOKI0f0zFrxxhMAUjcy3i+XlVBH6nrzmEwCKPZCrmFgRb2+vo2uOcMcaFp+aQH9Mh0XZPYJzwfZcv32cx/695ESc/ZtGtGuaw6OnDjGGW68= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988521; c=relaxed/simple; bh=SwyNGWtwQgHOApJI6bIB7Y2YZV2fZzV/abNiCm9lxKw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZTPF5xAa4ltAFmJ6agUDYmSosGiMIuXQsxYASDYPHybLzNtbp6MwyIuDULG6lgH4gMNag+Oefn3EI6NexBuENFdWTUHAK6g0OplRMFg9540cHiUXuSmR8XqZ4TDE01NmIr7UfKVoarWg9LyQ5jE818pJSY/cv91vkhg+iiAQoYo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mkAEvpgF; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mkAEvpgF" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D3B87C4CEED; Fri, 14 Mar 2025 21:41:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988520; bh=SwyNGWtwQgHOApJI6bIB7Y2YZV2fZzV/abNiCm9lxKw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mkAEvpgFyJI9gYhec+b37dyVF5dYFBk8pOV34YLpBDnjAheJGY/+qR28TEQLkYk0G dS4T1jpmZW+aXWmdH9Jf9Ky3pKngBiIDFfa3QFRs4ue5HhoqeKjTfBoSXE8oX+fkJx T476dnurSeVW5kHkvkDqJ3aI+fd8aU71laYyVaMvSAXDujTJYBJU+PwTuswcECs9ts 7o1D20TD3Lx66+EdE+XzvVLTIaahBIQ7Jd+3uFGsovbNLODC8Ym0ucNRNU7dL6YIT+ 48Mp4AAeSapbsGNnCuJReaEUXFR31DqBobSfg2fv4ZLaAXsaU0r88sZf1+puvhJHz9 NP8+CkTad3g1Q== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 11/20] x86/alternative: Make alternative() a wrapper around alternative_io() Date: Fri, 14 Mar 2025 14:41:24 -0700 Message-ID: <7861339dadc2bfff65634db421ca0fc81d468c1e.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" To reduce the number of independent implementations, make alternative() and alternative_2() wrappers around alternative_io() and alternative_2_io() respectively. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/alternative.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alte= rnative.h index 0acbb013e7ae..92014d56e3aa 100644 --- a/arch/x86/include/asm/alternative.h +++ b/arch/x86/include/asm/alternative.h @@ -204,10 +204,10 @@ static inline int alternatives_text_reserved(void *st= art, void *end) * without volatile and memory clobber. */ #define alternative(oldinstr, newinstr, ft_flags) \ - asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) : : : "memo= ry") + alternative_io(oldinstr, newinstr, ft_flags,,) =20 #define alternative_2(oldinstr, newinstr1, ft_flags1, newinstr2, ft_flags2= ) \ - asm_inline volatile(ALTERNATIVE_2(oldinstr, newinstr1, ft_flags1, newinst= r2, ft_flags2) ::: "memory") + alternatve_2_io(oldinstr, newinstr1, ft_flags1, newinstr2, ft_flags2,,) =20 /* * Alternative inline assembly with input. --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 19E9722A7F6 for ; Fri, 14 Mar 2025 21:42:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988521; cv=none; b=NOIVv+PnvFpAGc6Cs0biAjbDtNRiHGhO1wpZX763EUqqUkq9q2wqxUoTMIHds/Zo6+ax7ZV2FBA2uMNJaMVgMI5LqIgWMkdBPAlCjzOdWGeDmgDgATDD21sorRNXR/QJTen52ci1KftReDuiHsqJZGc7gpXEkzsYqTZHAFBIRk0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988521; c=relaxed/simple; bh=01H/k3p6kVZSNvrRq7ER5zQJCpyXMltkJxnFQU591jU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tkX937K339OaEwM6mO3VUDAF7AhzUlc+4Gz8+ZBejO0ZEdqgzrgEiJtLYJjB0dRTbUbc73TF8gHZdWIXDWxZdkphIZe9E7w+xRb73URXc0GJ5RO4c1kCNKs5aKGe5wTFPUZfwNewafk9paINNDFcAOrUUlwnf6zK+TaMx2CuyWU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JOIhAFzT; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JOIhAFzT" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 93DF6C4CEF0; Fri, 14 Mar 2025 21:42:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988521; bh=01H/k3p6kVZSNvrRq7ER5zQJCpyXMltkJxnFQU591jU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JOIhAFzTGaP+bzKAzhCh8wCpPpvYWab3o+Jh6wyzpWQabPrnpV0e6ItoBF2+BaaPf mcns93oyqJ2xJASrJJrroJv6kgCshBG+2YbxaD/E//3/C1EMGPMCYrdFeXQ6RxyZ3q BGTdEjLrvOsitFbOepPnAC8IcD3u116gOeB6lGnFOQM7rvUppivzoHcG1hGSDdDso9 BCV8MsDwHffjvg/AGRzF8+qOCH9fq3lHTT6DflD/ikID2GzaNOuONuDsYtyHqEXxWk 5YZITCHiV3x17V9pEmm4ErDeofMECI5iYkKX6md6fOutkzdOJIyPS63RSXH+yDNUk3 lywgcLy3KmKaA== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 12/20] x86/cpu: Use alternative_io() in prefetch[w]() Date: Fri, 14 Mar 2025 14:41:25 -0700 Message-ID: <60361f50751e6a8e38463d1cb47687f027042321.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the new alternative_io() interface in preparation for removing alternative_input(). Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/processor.h | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/proces= sor.h index 2e9566134949..a1baf2fc5f9b 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -624,9 +624,10 @@ extern char ignore_fpu_irq; */ static inline void prefetch(const void *x) { - alternative_input(BASE_PREFETCH, - "prefetchnta %[val]", X86_FEATURE_XMM, - [val] "m" (*(const char *)x)); + alternative_io(BASE_PREFETCH, + "prefetchnta %[val]", X86_FEATURE_XMM, + ARG(), + ARG([val] "m" (*(const char *)x))); } =20 /* @@ -636,9 +637,10 @@ static inline void prefetch(const void *x) */ static __always_inline void prefetchw(const void *x) { - alternative_input(BASE_PREFETCH, - "prefetchw %[val]", X86_FEATURE_3DNOWPREFETCH, - [val] "m" (*(const char *)x)); + alternative_io(BASE_PREFETCH, + "prefetchw %[val]", X86_FEATURE_3DNOWPREFETCH, + ARG(), + ARG([val] "m" (*(const char *)x))); } =20 #define TOP_OF_INIT_STACK ((unsigned long)&init_stack + sizeof(init_stack)= - \ --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0763222DFBA for ; Fri, 14 Mar 2025 21:42:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988522; cv=none; b=KDhK6rRjcNY+KnTs7YP6WM8rcIls7VqJQdSD69/6S/DCvFUauLZUDO3tfCMAv81/P8ZpeE2B2zuA2NuJY4G3PaCFD4hBgQ4A1Kdejd9Wf78szgZ6wUQulIW1in5aH+9n0QD66y3pVgeMO0PtuD+PUGLsbAPBc2un0I+hFLWUTpQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988522; c=relaxed/simple; bh=A805OiY9btBk4//88dQ5YMB5VpAijiLaiFUnG8VaH9U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aSMBlHLdFbHKsdc6b+Ixa5LAS9c+TIxsaEzi0rpGPgw+oKBHbytmbTq36tsXxGUmab3VdoqGn7BITac463EnvfvBD11DLPjwgDxFcoQqMMuOeWmYpt/+9NfnYPomTCwR8P0v4TjflHGKCmVB9iir4Fysmn4mvFiCnVrsHgZB+cU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=vLMNILXX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="vLMNILXX" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 22707C4CEED; Fri, 14 Mar 2025 21:42:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988521; bh=A805OiY9btBk4//88dQ5YMB5VpAijiLaiFUnG8VaH9U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vLMNILXXGEzLxnKu99vgSnPmkMldW47dZvWXRdv/agAWmg3IwPoedrtRqq/v6EV3Q Oi3ZHGmxpeoSmssxFTPPlr9s7A1QMrkO0W0um9f46crfygA7JL3lK3IITVUQVrxT07 nwM25Act/XFn9EdiCiIErVWrrUz85rkQvx/wYWNbfgUPIUqqmXTinbdVXUmobaVWTu fgUebWzTfaXBYHUOJBcPY42nsk/utR1SMB0g1FcT0FvS7R9TzaH39rl/KVAXIJRTZ3 rwelTxH+05HM/JRG5HzBFY7srkmOON9fJnoXkbhvbKcBG7KVrhPpZwDL8ha/wsppZL HFqmgiseHBwAw== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 13/20] x86/alternative: Remove alternative_input() Date: Fri, 14 Mar 2025 14:41:26 -0700 Message-ID: <3f74d48fd784507e1a68d7f43c381ca6e0b40122.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" alternative_input() is redundant with alternative_io(), and has no more users. Remove it. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/alternative.h | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alte= rnative.h index 92014d56e3aa..119c24329ef1 100644 --- a/arch/x86/include/asm/alternative.h +++ b/arch/x86/include/asm/alternative.h @@ -209,16 +209,6 @@ static inline int alternatives_text_reserved(void *sta= rt, void *end) #define alternative_2(oldinstr, newinstr1, ft_flags1, newinstr2, ft_flags2= ) \ alternatve_2_io(oldinstr, newinstr1, ft_flags1, newinstr2, ft_flags2,,) =20 -/* - * Alternative inline assembly with input. - * - * Peculiarities: - * No memory clobber here. - */ -#define alternative_input(oldinstr, newinstr, ft_flags, input...) \ - asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) \ - : : input) - /* * Alternative inline assembly with input, output and clobbers. * --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90E7722FAD4 for ; Fri, 14 Mar 2025 21:42:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988522; cv=none; b=F+Mn/eKFp8tK2D6wVF8eOVVWkkzN+zdZOM6OPpVW9/CMFUZTyg49XBH2P1My4Bb3s2Y9AM2IehmaMq5+V2Jj3jQQBVwtKKjKyG7m56vrodu9ENF4NW85xA0RVdajfAvTnx+J0Ca6pn/XPU7pnsqc/rXEwBih2WJvtwiLjXV4SFE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988522; c=relaxed/simple; bh=KpuDHlj/pZSHps6eommEykhCFA6r+jko10x/uIaSe94=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UgUbyV4V5fjlihxdY3Qw8Y8Vj0d121/wtSgNQlV5RLc8IPaF/KL7sNg1J9cMToW/wUwRPe2ikBdmoY2ZQrJBF5zvHpuMFo7Vhbrm/u8L5aE31cXhN8Py7sYN2noVU9qBJnANKN6+8fwLPSkWOnK+iA4+RJaz6W2sc8MpKYbBVC4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=awyFYt59; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="awyFYt59" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A8A38C4CEEC; Fri, 14 Mar 2025 21:42:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988522; bh=KpuDHlj/pZSHps6eommEykhCFA6r+jko10x/uIaSe94=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=awyFYt59Fp0lPWg5tAEJkSlzW2QqAp7N+RQhvAghyh0xF+ihXCGk6AsaNSm4RufQr sSLHjLAVtsHxzhf4QD/tP5UT2Cz9X1u81ygteWM3PXi697C2DRq0eL3rHhyxVwYbM3 y8uV7oLYN3AUmKhsLmRfKrWjNjtVpspW0GrtMMr4K58ZXzlTuGHGZPKzQ9uZce0vyx 0P7senMsgQ/owj6AZ0CA/6KVeWt6+94LBFjaw0Ck4GHGn5ayW7b7ZobEM8o7U3ePuN hiDVSputVZszqv6uYZrXP2HRnYW/MXU+TTejNTQmJD7EMCqdnD8TkN3YxwyDZyPBZR iKmcLCs8Pv96Q== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 14/20] x86/barrier: Use alternative_io() in 32-bit barrier functions Date: Fri, 14 Mar 2025 14:41:27 -0700 Message-ID: <1c2fe7f93c4dd8a87c2e1fa8b780a8a2968be445.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the standard alternative_io() interface. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/barrier.h | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h index db70832232d4..489a7ea76384 100644 --- a/arch/x86/include/asm/barrier.h +++ b/arch/x86/include/asm/barrier.h @@ -12,12 +12,23 @@ */ =20 #ifdef CONFIG_X86_32 -#define mb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "mfence", \ - X86_FEATURE_XMM2) ::: "memory", "cc") -#define rmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "lfence",= \ - X86_FEATURE_XMM2) ::: "memory", "cc") -#define wmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "sfence",= \ - X86_FEATURE_XMM2) ::: "memory", "cc") +#define mb() alternative_io("lock addl $0,-4(%%esp)", \ + "mfence", X86_FEATURE_XMM2, \ + ARG(), \ + ARG(), \ + ARG("memory", "cc")) + +#define rmb() alternative_io("lock addl $0, -4(%%esp)", \ + "lfence", X86_FEATURE_XMM2, \ + ARG(), \ + ARG(), \ + ARG("memory", "cc")) + +#define wmb() alternative_io("lock addl $0, -4(%%esp)", \ + "sfence", X86_FEATURE_XMM2, \ + ARG(), \ + ARG(), \ + ARG("memory", "cc")) #else #define __mb() asm volatile("mfence":::"memory") #define __rmb() asm volatile("lfence":::"memory") --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B47A722FF2E for ; Fri, 14 Mar 2025 21:42:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988522; cv=none; b=ofep+c1yPJ1HW44q1HX/jVONEQpTQB5o/leireQeCzkBhgg1iTOrg/+r2dssWkYio95SAghmtwScHxcMN69VK1Bm3qXJGJH2l/Qq0eajPqGCsFKUwD1/HOf64LvXz2cnThbWIu5GqCxgj1nlsc9fvqudICZhL90cLGhmFru7MLM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988522; c=relaxed/simple; bh=qqzesLOe3X4Ltjb88hOoCiAxYvll/tl7oXQIyXa17jw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=a00wDewpTy5PvLYqpt+fvjFlHtDRkgyDaC0mNAyRJY9/vOW8BYdCYdQ2gDFPK5FtwKkegJSmtJATAX9zFOxsYKlF9PDAdwyUN7NFGEDz3VRQY6RI7wXS5g3PBMsgQ2OC7AJT53AkVDlcEElIqeCGtUMHVaa6A43FhgtkVCGU3E8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=E1NUnK7r; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="E1NUnK7r" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 348E2C4CEED; Fri, 14 Mar 2025 21:42:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988522; bh=qqzesLOe3X4Ltjb88hOoCiAxYvll/tl7oXQIyXa17jw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E1NUnK7rMoAPxCxOQNcWSKoO1CT39JrAMBbv2wUFC//iVYB/AxuXk5bO6wRb5AicJ zFZiu3qQ3PycpRFqFERi4KqLP+Fm3Sc8H0dkxWOoJhgDSWVhOIVWbf1qWBZb2TYK+V KCnkGiaVkQf0SSNrxddfpmJ00TtC+W5rWzhKVoFms4klIKHVziG+98c30Io4EZjlak Cdy1dsHyYHqdFkT9/FcH7dGGdoU0pI85qINNKW5B2zhDicH8/u/WHwBMEHbd5V/ZiG Vlz5H1MN/RQl2z/G5pG7ViLDCS0hhb5tPUvC12siksmDD7AjwoKLmrG48clb0kyabX +QVyuLuS6N6hw== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 15/20] x86/cpu/amd: Use named asm operands in asm_clear_divider() Date: Fri, 14 Mar 2025 14:41:28 -0700 Message-ID: X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use named inline asm operands in preparation for using alternative_io(). Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/processor.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/proces= sor.h index a1baf2fc5f9b..b458ff0e4c79 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -709,8 +709,8 @@ static inline u32 per_cpu_l2c_id(unsigned int cpu) */ static __always_inline void amd_clear_divider(void) { - asm volatile(ALTERNATIVE("", "div %2\n\t", X86_BUG_DIV0) - :: "a" (0), "d" (0), "r" (1)); + asm volatile(ALTERNATIVE("", "div %[one]\n\t", X86_BUG_DIV0) + :: "a" (0), "d" (0), [one] "r" (1)); } =20 extern void amd_check_microcode(void); --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9AC5323315F for ; Fri, 14 Mar 2025 21:42:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988523; cv=none; b=rEsh+5fS3WTBRKMnvG+WWpRG6RUmzwYbDYFn6BP+MLJRSwigbGt1klZMBLa2gOlYL2pJAqswO5mdv5yf2d8roIFVevh5h4LaoXOAV1bqp7cnHVKPqi7W8zvC+tDFDJjUa037UticzzxQyUF+s3xVuGiitBUbo2vG5Jm+nPqddbE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988523; c=relaxed/simple; bh=5oIhQA2G6MXNN4S57DSQBoNUOOzJU2afmZyfUSBH/Tk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lSfn+Q/GRDGpPSeYbF+9GOYgJ889NbFfmhUJ+Lv/mYu2W89WXuU3hH7j1BSJck/sSG0Yb42L2ZZcb+7p9VrU73FredkXSYKPrDeJbBl7A/lfk2I0M1wvCZzd+YNuKXlMCk/+twAAi66uv67kxwNNa/40PhoIS6BXKc2eQMY3DT0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=a+hTN2RE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="a+hTN2RE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BB96EC4CEE3; Fri, 14 Mar 2025 21:42:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988523; bh=5oIhQA2G6MXNN4S57DSQBoNUOOzJU2afmZyfUSBH/Tk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=a+hTN2REe48/StivX0ehUohMA48AU908BP1fNGMUhWC52WwsfVoph1qEYg6j5O8qK 0Y8w5dUOOe2B1BTble2AlPsdeqqasj8r/u84uYLSEyuDtSuBPZaGguxofNp6jWqYjN DRXCeNlSwTVbt6YWFhqyMfCfDnFoxspwxvyrkZ7QEmgITnqCHiHU5gvQ3II1Cfwmh5 Dp0IRT8Qy94T7emcUTK8wwZTlzJwPhnK9FioADXozeFiFpZHI3+ak/IocYpclWpqXL FGpzvN1h+ynDjEVGu88mAno4q/OxG352qHAbKQpCWpilHCK2e4MdAvTFFWIx4j4BfP Y5LZrpyJp2Mmg== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 16/20] x86/cpu: Use alternative_io() in amd_clear_divider() Date: Fri, 14 Mar 2025 14:41:29 -0700 Message-ID: <5f79d7213503c426cf4abc8292ae6d240cacb712.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the standard alternative_io() interface. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/processor.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/proces= sor.h index b458ff0e4c79..d7f3f03594a2 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -709,8 +709,10 @@ static inline u32 per_cpu_l2c_id(unsigned int cpu) */ static __always_inline void amd_clear_divider(void) { - asm volatile(ALTERNATIVE("", "div %[one]\n\t", X86_BUG_DIV0) - :: "a" (0), "d" (0), [one] "r" (1)); + alternative_io("", + "div %[one]\n\t", X86_BUG_DIV0, + ARG(), + ARG("a" (0), "d" (0), [one] "r" (1))); } =20 extern void amd_check_microcode(void); --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C9BD2343AF for ; Fri, 14 Mar 2025 21:42:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988524; cv=none; b=AMJpvTpZfexZQ7utMsNkxNNUIs6W4Ilvmbk2z3AwQmxNvybCN86ysGCh/H2SMO/klPhwYu9MD+kWh3/I/NoNfos2OjlQsti96CLHjIUMhn7vQVgYWORRLpli8wse/RAz9zxouII6AxyVz/ZbngKjRAFO7cYtXG3gPBP7QYriAwg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988524; c=relaxed/simple; bh=cIjsaFbFwtTvmpVudgpMPXuLdFSOFmDjD4OJNzfEUJg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JmRZmGvq9f0GUCZQFTuhCkRtV1gfBYl5TeHs/fFJ6dkFcvzv9gyxrooVL8TQnOPOdKOf/BMuyogHQEcBieQurNnRrcQSuxnKK11xXBMllJ/YI0GFuAnYWo1NYIBuFOTl2acy7+T5Vkh5l9CjfhSvRfiBwhOv+6NJZQ3b/P5CSC4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=UtJqmxV7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UtJqmxV7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4918EC4CEEF; Fri, 14 Mar 2025 21:42:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988523; bh=cIjsaFbFwtTvmpVudgpMPXuLdFSOFmDjD4OJNzfEUJg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UtJqmxV7hoMxDMVA64kc/Igh309ltaOhRT8r65+Pq3JUVvARqZDajOG5DbZu2T5+1 JZUnjjx5PIk0CKeZ9O8XUL5KzJE3D9AF9XuvJCGe/KpLzRM/oYQfD20z/wGcXkJBIP oAensFkCFdVGJJHvipTYqhJCFcTC1LxxvMqWz7MXqENRHwkrR4EeC59x0+d8nFeqOJ /18ur0im0NgquvIZjDig9AezlklPRC0VsxvUabPOcGAxiycMiU1dUGRfsQTOkM1G/N HMfRr5MfqHVaTFPL/Mxt57A/hV5PLdetJtlWatVyPtW3tZ7m1NDqMVO/gU09ROlbzR PkarKGWAZxmgQ== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 17/20] x86/smap: Use named asm operands in smap_{save,restore}() Date: Fri, 14 Mar 2025 14:41:30 -0700 Message-ID: <4631b5fb3e33af925f4bd82ecb56a5facff354cf.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use named operands in preparation for using alternative_io(). Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/smap.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/smap.h b/arch/x86/include/asm/smap.h index 2de1e5a75c57..60ea21b4c8b7 100644 --- a/arch/x86/include/asm/smap.h +++ b/arch/x86/include/asm/smap.h @@ -40,9 +40,9 @@ static __always_inline unsigned long smap_save(void) unsigned long flags; =20 asm volatile ("# smap_save\n\t" - ALTERNATIVE("", "pushf; pop %0; " "clac" "\n\t", - X86_FEATURE_SMAP) - : "=3Drm" (flags) : : "memory", "cc"); + ALTERNATIVE("", + "pushf; pop %[flags]; clac\n\t", X86_FEATURE_SMAP) + : [flags] "=3Drm" (flags) : : "memory", "cc"); =20 return flags; } @@ -50,9 +50,9 @@ static __always_inline unsigned long smap_save(void) static __always_inline void smap_restore(unsigned long flags) { asm volatile ("# smap_restore\n\t" - ALTERNATIVE("", "push %0; popf\n\t", - X86_FEATURE_SMAP) - : : "g" (flags) : "memory", "cc"); + ALTERNATIVE("", + "push %[flags]; popf\n\t", X86_FEATURE_SMAP) + : : [flags] "g" (flags) : "memory", "cc"); } =20 /* These macros can be used in asm() statements */ --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FD3323534D for ; Fri, 14 Mar 2025 21:42:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988524; cv=none; b=XCblQlH6MzQwJHqHUnlhsFdvjNjv1Q9wmWCD8tNKbD5RnLn48tsk7kCAEmrQE95Oosn1y9uRiAifJAXPWQdYnMEHEPth1ksF/n5WvgDDpHyBi+wUKi9IydH/kyaU0RVig2VUCr6DHNYPH6/GhWK4Wz5qNNkIxLk9sSJgk9+7TQY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988524; c=relaxed/simple; bh=AreQbbOYtWwAMQIbhfmQ76qIqLFTx9WDsYMwGmBhvpY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=okiMlNmZFCj8naKdMcbHoPVpovsGmCd+EAyMl6Zlsm4vOe6645JNLkSelo7HMAHOynlZSttpfsBcQ3fE8if4yPgw8Lhoq9AE/aQNioPNqCu/EvJG5GmrGl0QKo0nA+wO6aSM+gQXlP1aKjPO89PJxGd4cF+gBf6hAwWc96XQXBM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=peen/c8c; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="peen/c8c" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CF96FC4CEEC; Fri, 14 Mar 2025 21:42:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988524; bh=AreQbbOYtWwAMQIbhfmQ76qIqLFTx9WDsYMwGmBhvpY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=peen/c8c4J5WCi7pvH6CNjLTHGbb53GaJbwk1vDWQknULWIYSZZ8klIJ5lUoFUSWa fGBkFGcMjag94NlnGJm/npLydaePkiNZdJIHE18dL9IrK6mhPpxU8AkmPUk8onX7Ki nboRfA5FtgjvqtPiYutbjJTgwInvXHQ9ZP4bO9VG30WFuE6A8ierq3sqbaxOaYSKpe bpEOcFckmbmmG/nZQkoc33aifsZAV3uNH4IaABqWq5YClxgWA16FlMMLTY7Azf5zeL 8HcwhsUThIqwR+be3OsibiLO5GhMSlizFO0TIGNtm4QUGyJPi4x7Q2OAyidrGAvwDE YZdudgjtjTb7A== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 18/20] x86/smap: Use alternative_io() in smap_{save,restore}() Date: Fri, 14 Mar 2025 14:41:31 -0700 Message-ID: <1f39866bca670a7d0087febee29ab5061b8f9fef.1741988314.git.jpoimboe@kernel.org> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the standard alternative_io() interface. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/smap.h | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/arch/x86/include/asm/smap.h b/arch/x86/include/asm/smap.h index 60ea21b4c8b7..8b77ddcb37e7 100644 --- a/arch/x86/include/asm/smap.h +++ b/arch/x86/include/asm/smap.h @@ -39,20 +39,22 @@ static __always_inline unsigned long smap_save(void) { unsigned long flags; =20 - asm volatile ("# smap_save\n\t" - ALTERNATIVE("", - "pushf; pop %[flags]; clac\n\t", X86_FEATURE_SMAP) - : [flags] "=3Drm" (flags) : : "memory", "cc"); + alternative_io("", + "pushf; pop %[flags]; clac\n\t", X86_FEATURE_SMAP, + ARG([flags] "=3Drm" (flags)), + ARG(), + ARG("memory", "cc")); =20 return flags; } =20 static __always_inline void smap_restore(unsigned long flags) { - asm volatile ("# smap_restore\n\t" - ALTERNATIVE("", - "push %[flags]; popf\n\t", X86_FEATURE_SMAP) - : : [flags] "g" (flags) : "memory", "cc"); + alternative_io("", + "push %[flags]; popf\n\t", X86_FEATURE_SMAP, + ARG(), + ARG([flags] "g" (flags)), + ARG("memory", "cc")); } =20 /* These macros can be used in asm() statements */ --=20 2.48.1 From nobody Wed Dec 17 18:59:22 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5AA54235C01 for ; Fri, 14 Mar 2025 21:42:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988525; cv=none; b=mdt1m3mKCDJs07PMfopqe4PM+/jBXj7gXQ54NbcO+s7QnJneoGfBKDwMhlpvFlD0ptbnpxJ2AWH8LTYePPmllKyAqK83lvWuhjoAh5vP1Hx9CnbH6eQ3HaBFvbYXrWIc2eo06OBvP3vt6Jz9XlY6VnXXkfpj9ryNzn/IVVkiqTg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988525; c=relaxed/simple; bh=qkGFv5PkAYcsVJJDYuUSexRQt+wXN3/4FXTTpwxW2NI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FDOby0vu7JNSbJrTSqq+QhC0YKWPV530lLCM2Vr8Tz+zJmjyD6537hnA+lldg31bgg8i1ZUsTTffEA8uEplmopLIBogUOApnxvUoeispPWgfm/DW+qjiaiZTqDG48v5/nrMiN6EGZZfudFdzMwIoGWxB/7OaPyu6eka9d48axKs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nQZfgOzL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nQZfgOzL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 66E4CC4CEEF; Fri, 14 Mar 2025 21:42:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988524; bh=qkGFv5PkAYcsVJJDYuUSexRQt+wXN3/4FXTTpwxW2NI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nQZfgOzL1IkA/XyvFXbht5J0EPTQVYmV5Z7C8DDVCDs9yuZdttYIvwRxsUbLPLlZe cecAEaGCpwNkL/56dllMDJ1e430Dze7US1UlVwwEnZJCnVrQDgSK8XVC5iHXXbvG9X LPeiUcAObJiaW4jHh8ydRAUbLVHb2x5j1y6rVfGOZk2MacTsJyZBlxRVoNN9xq2a9h H5unFA3tBLpMGx5xbjo0tCVVvzpk7blLZm8eNaOWGNDJj3nAAwZ5WWrWqTKZSMHeXf fEFniofwyX+I8ViUNlUVf4j3pHAV5amugYUTjIgCV3/u+GGdolLhuF+ItPTll6aEkG izSC6QT3RQi3g== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 19/20] x86/uaccess: Use alternative_io() in __untagged_addr() Date: Fri, 14 Mar 2025 14:41:32 -0700 Message-ID: X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the standard alternative_io() interface. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/uaccess_64.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uacce= ss_64.h index c52f0133425b..b507d5fb5443 100644 --- a/arch/x86/include/asm/uaccess_64.h +++ b/arch/x86/include/asm/uaccess_64.h @@ -26,10 +26,10 @@ extern unsigned long USER_PTR_MAX; */ static inline unsigned long __untagged_addr(unsigned long addr) { - asm (ALTERNATIVE("", - "and " __percpu_arg([mask]) ", %[addr]", X86_FEATURE_LAM) - : [addr] "+r" (addr) - : [mask] "m" (__my_cpu_var(tlbstate_untag_mask))); + alternative_io("", + "and " __percpu_arg([mask]) ", %[addr]", X86_FEATURE_LAM, + ARG([addr] "+r" (addr)), + ARG([mask] "m" (__my_cpu_var(tlbstate_untag_mask)))); =20 return addr; } --=20 2.48.1 From nobody Wed Dec 17 18:59:23 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5622236A84 for ; Fri, 14 Mar 2025 21:42:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988526; cv=none; b=S95e0h44dWZQzDMpX3PAe+FtG+Ix1RzxiEXTgL0PzRqnhTl+xJ6NbhjdI8bPdYWGiasTb4l6v4jc+krG3VEflv4abuYEIsAraCddvTyXteWGxsOAk7f+0Vf6RUASe9SvvAiqKMW+J+sVEjDxaaz3W8Z/Wn79WFGzawffLfafe5U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741988526; c=relaxed/simple; bh=QEu/+JYx8qH0znXupo+H8I159zjwFZQNXDvmmFhC/iQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CoER1v7Ad0yq1Wm0ahvW/1VuATyJVZCd+VfR01vkogqSa+xmE6L7EyQw0n1BnAtz82kwLnlcrB58J5UMn4Gl702kN7P6HCLhm2OumB18xRN2v3n3DncJM9bWbjpbdp5PKlWoPaKZHRKOGrk0ajN05o5wnBg8rZyN8F1GwiDI8X0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Krr+bTIy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Krr+bTIy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F0C99C4CEE3; Fri, 14 Mar 2025 21:42:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741988525; bh=QEu/+JYx8qH0znXupo+H8I159zjwFZQNXDvmmFhC/iQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Krr+bTIyxkdmvcoK1uPAfAZqbgqdA1gRsg+CV8sTJlO8qSNWgVIXa0fbrL8wwgmhG O5rmx5cWCdVcMjrKa1DA63ryr8ZLoKRwgj+W8uxJGP12ayeOKz1bhPDjWRPCUHsIha kjFiyevm2WWUE/P58N0f+e0dY2ujUFmmqMgVg0qqXsa28DpflQ6QoOR4zKxPQWDsCS exFzJnKdjWIPNNic+DzZ6l4GXd0foRGDUQxrgChHbCe7JeEQkBwnfQ7FSIyZY6d+R8 XW/nx9AK0BOKmnmI1zjrVHNW8lw30Pbnc1Q+rfofmEIfjNaEPGAHoeUJ8a+luK/13E XiP1unRmUuFKg== From: Josh Poimboeuf To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, Linus Torvalds , Peter Zijlstra , Borislav Petkov , "H. Peter Anvin" , Uros Bizjak , Andrew Cooper , Ingo Molnar Subject: [PATCH 20/20] x86/msr: Use alternative_2_io() in rdtsc_ordered() Date: Fri, 14 Mar 2025 14:41:33 -0700 Message-ID: X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use the standard alternative_2_io() interface. Signed-off-by: Josh Poimboeuf --- arch/x86/include/asm/msr.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 001853541f1e..996e3b5857c6 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h @@ -214,12 +214,13 @@ static __always_inline unsigned long long rdtsc_order= ed(void) * Thus, use the preferred barrier on the respective CPU, aiming for * RDTSCP as the default. */ - asm volatile(ALTERNATIVE_2("rdtsc", - "lfence; rdtsc", X86_FEATURE_LFENCE_RDTSC, - "rdtscp", X86_FEATURE_RDTSCP) - : EAX_EDX_RET(val, low, high) - /* RDTSCP clobbers ECX with MSR_TSC_AUX. */ - :: "ecx"); + alternative_2_io("rdtsc", + "lfence; rdtsc", X86_FEATURE_LFENCE_RDTSC, + "rdtscp", X86_FEATURE_RDTSCP, + ARG(EAX_EDX_RET(val, low, high)), + ARG(), + /* RDTSCP clobbers ECX with MSR_TSC_AUX. */ + ARG("ecx")); =20 return EAX_EDX_VAL(val, low, high); } --=20 2.48.1