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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Feb 2025 01:31:41.0405 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 43acd05d-8768-4fed-fe73-08dd5797a719 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CEB.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR12MB9441 Content-Type: text/plain; charset="utf-8" Steal two bits from the 32-bit "type" in struct iommu_domain to store a new tag for private data owned by either dma-iommu or iommufd. Set the domain->private_data_owner in dma-iommu and iommufd. These will be used to replace the sw_msi function pointer. Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- include/linux/iommu.h | 7 ++++++- drivers/iommu/dma-iommu.c | 2 ++ drivers/iommu/iommufd/hw_pagetable.c | 3 +++ 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index e93d2e918599..4f2774c08262 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -209,8 +209,13 @@ struct iommu_domain_geometry { #define IOMMU_DOMAIN_PLATFORM (__IOMMU_DOMAIN_PLATFORM) #define IOMMU_DOMAIN_NESTED (__IOMMU_DOMAIN_NESTED) =20 +#define IOMMU_DOMAIN_DATA_OWNER_NONE (0U) +#define IOMMU_DOMAIN_DATA_OWNER_DMA (1U) +#define IOMMU_DOMAIN_DATA_OWNER_IOMMUFD (2U) + struct iommu_domain { - unsigned type; + u32 type : 30; + u32 private_data_owner : 2; const struct iommu_domain_ops *ops; const struct iommu_dirty_ops *dirty_ops; const struct iommu_ops *owner; /* Whose domain_alloc we came from */ diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 94263ed2c564..78915d74e8fa 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -403,6 +403,7 @@ int iommu_get_dma_cookie(struct iommu_domain *domain) =20 mutex_init(&domain->iova_cookie->mutex); iommu_domain_set_sw_msi(domain, iommu_dma_sw_msi); + domain->private_data_owner =3D IOMMU_DOMAIN_DATA_OWNER_DMA; return 0; } =20 @@ -435,6 +436,7 @@ int iommu_get_msi_cookie(struct iommu_domain *domain, d= ma_addr_t base) cookie->msi_iova =3D base; domain->iova_cookie =3D cookie; iommu_domain_set_sw_msi(domain, iommu_dma_sw_msi); + domain->private_data_owner =3D IOMMU_DOMAIN_DATA_OWNER_DMA; return 0; } EXPORT_SYMBOL(iommu_get_msi_cookie); diff --git a/drivers/iommu/iommufd/hw_pagetable.c b/drivers/iommu/iommufd/h= w_pagetable.c index 7de6e914232e..5640444de475 100644 --- a/drivers/iommu/iommufd/hw_pagetable.c +++ b/drivers/iommu/iommufd/hw_pagetable.c @@ -157,6 +157,7 @@ iommufd_hwpt_paging_alloc(struct iommufd_ctx *ictx, str= uct iommufd_ioas *ioas, } } iommu_domain_set_sw_msi(hwpt->domain, iommufd_sw_msi); + hwpt->domain->private_data_owner =3D IOMMU_DOMAIN_DATA_OWNER_IOMMUFD; =20 /* * Set the coherency mode before we do iopt_table_add_domain() as some @@ -253,6 +254,7 @@ iommufd_hwpt_nested_alloc(struct iommufd_ctx *ictx, } hwpt->domain->owner =3D ops; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Feb 2025 01:31:37.5745 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 48a79996-ba4d-455e-0ac2-08dd5797a515 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB73.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6424 Content-Type: text/plain; charset="utf-8" To provide the iommufd_sw_msi() to the iommu core that is under a different Kconfig, move it and its related functions to driver.c. Then, stub it into the public iommufd header. iommufd_sw_msi_install() continues to be used by iommufd internal, so put it in the private header. Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/iommufd_private.h | 5 +- include/linux/iommufd.h | 9 ++ drivers/iommu/iommufd/device.c | 122 ----------------------- drivers/iommu/iommufd/driver.c | 124 ++++++++++++++++++++++++ 4 files changed, 136 insertions(+), 124 deletions(-) diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommuf= d/iommufd_private.h index 246297452a44..51da18672c74 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -32,8 +32,9 @@ struct iommufd_sw_msi_maps { DECLARE_BITMAP(bitmap, 64); }; =20 -int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, - phys_addr_t msi_addr); +int iommufd_sw_msi_install(struct iommufd_ctx *ictx, + struct iommufd_hwpt_paging *hwpt_paging, + struct iommufd_sw_msi_map *msi_map); =20 struct iommufd_ctx { struct file *file; diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h index 11110c749200..2f272863a207 100644 --- a/include/linux/iommufd.h +++ b/include/linux/iommufd.h @@ -8,6 +8,7 @@ =20 #include #include +#include #include #include #include @@ -187,6 +188,8 @@ struct iommufd_object *_iommufd_object_alloc(struct iom= mufd_ctx *ictx, enum iommufd_object_type type); struct device *iommufd_viommu_find_dev(struct iommufd_viommu *viommu, unsigned long vdev_id); +int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, + phys_addr_t msi_addr); #else /* !CONFIG_IOMMUFD_DRIVER_CORE */ static inline struct iommufd_object * _iommufd_object_alloc(struct iommufd_ctx *ictx, size_t size, @@ -200,6 +203,12 @@ iommufd_viommu_find_dev(struct iommufd_viommu *viommu,= unsigned long vdev_id) { return NULL; } + +static inline int iommufd_sw_msi(struct iommu_domain *domain, + struct msi_desc *desc, phys_addr_t msi_addr) +{ + return -EOPNOTSUPP; +} #endif /* CONFIG_IOMMUFD_DRIVER_CORE */ =20 /* diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c index 6dccbf7217f5..9c1fe3170d16 100644 --- a/drivers/iommu/iommufd/device.c +++ b/drivers/iommu/iommufd/device.c @@ -294,128 +294,6 @@ u32 iommufd_device_to_id(struct iommufd_device *idev) } EXPORT_SYMBOL_NS_GPL(iommufd_device_to_id, "IOMMUFD"); =20 -/* - * Get a iommufd_sw_msi_map for the msi physical address requested by the = irq - * layer. The mapping to IOVA is global to the iommufd file descriptor, ev= ery - * domain that is attached to a device using the same MSI parameters will = use - * the same IOVA. - */ -static __maybe_unused struct iommufd_sw_msi_map * -iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, phys_addr_t msi_addr, - phys_addr_t sw_msi_start) -{ - struct iommufd_sw_msi_map *cur; - unsigned int max_pgoff =3D 0; - - lockdep_assert_held(&ictx->sw_msi_lock); - - list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { - if (cur->sw_msi_start !=3D sw_msi_start) - continue; - max_pgoff =3D max(max_pgoff, cur->pgoff + 1); - if (cur->msi_addr =3D=3D msi_addr) - return cur; - } - - if (ictx->sw_msi_id >=3D - BITS_PER_BYTE * sizeof_field(struct iommufd_sw_msi_maps, bitmap)) - return ERR_PTR(-EOVERFLOW); - - cur =3D kzalloc(sizeof(*cur), GFP_KERNEL); - if (!cur) - cur =3D ERR_PTR(-ENOMEM); - cur->sw_msi_start =3D sw_msi_start; - cur->msi_addr =3D msi_addr; - cur->pgoff =3D max_pgoff; - cur->id =3D ictx->sw_msi_id++; - list_add_tail(&cur->sw_msi_item, &ictx->sw_msi_list); - return cur; -} - -static int iommufd_sw_msi_install(struct iommufd_ctx *ictx, - struct iommufd_hwpt_paging *hwpt_paging, - struct iommufd_sw_msi_map *msi_map) -{ - unsigned long iova; - - lockdep_assert_held(&ictx->sw_msi_lock); - - iova =3D msi_map->sw_msi_start + msi_map->pgoff * PAGE_SIZE; - if (!test_bit(msi_map->id, hwpt_paging->present_sw_msi.bitmap)) { - int rc; - - rc =3D iommu_map(hwpt_paging->common.domain, iova, - msi_map->msi_addr, PAGE_SIZE, - IOMMU_WRITE | IOMMU_READ | IOMMU_MMIO, - GFP_KERNEL_ACCOUNT); - if (rc) - return rc; - __set_bit(msi_map->id, hwpt_paging->present_sw_msi.bitmap); - } - return 0; -} - -/* - * Called by the irq code if the platform translates the MSI address throu= gh the - * IOMMU. msi_addr is the physical address of the MSI page. iommufd will - * allocate a fd global iova for the physical page that is the same on all - * domains and devices. - */ -#ifdef CONFIG_IRQ_MSI_IOMMU -int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, - phys_addr_t msi_addr) -{ - struct device *dev =3D msi_desc_to_dev(desc); - struct iommufd_hwpt_paging *hwpt_paging; - struct iommu_attach_handle *raw_handle; - struct iommufd_attach_handle *handle; - struct iommufd_sw_msi_map *msi_map; - struct iommufd_ctx *ictx; - unsigned long iova; - int rc; - - /* - * It is safe to call iommu_attach_handle_get() here because the iommu - * core code invokes this under the group mutex which also prevents any - * change of the attach handle for the duration of this function. - */ - iommu_group_mutex_assert(dev); - - raw_handle =3D - iommu_attach_handle_get(dev->iommu_group, IOMMU_NO_PASID, 0); - if (IS_ERR(raw_handle)) - return 0; - hwpt_paging =3D find_hwpt_paging(domain->iommufd_hwpt); - - handle =3D to_iommufd_handle(raw_handle); - /* No IOMMU_RESV_SW_MSI means no change to the msi_msg */ - if (handle->idev->igroup->sw_msi_start =3D=3D PHYS_ADDR_MAX) - return 0; - - ictx =3D handle->idev->ictx; - guard(mutex)(&ictx->sw_msi_lock); - /* - * The input msi_addr is the exact byte offset of the MSI doorbell, we - * assume the caller has checked that it is contained with a MMIO region - * that is secure to map at PAGE_SIZE. - */ - msi_map =3D iommufd_sw_msi_get_map(handle->idev->ictx, - msi_addr & PAGE_MASK, - handle->idev->igroup->sw_msi_start); - if (IS_ERR(msi_map)) - return PTR_ERR(msi_map); - - rc =3D iommufd_sw_msi_install(ictx, hwpt_paging, msi_map); - if (rc) - return rc; - __set_bit(msi_map->id, handle->idev->igroup->required_sw_msi.bitmap); - - iova =3D msi_map->sw_msi_start + msi_map->pgoff * PAGE_SIZE; - msi_desc_set_iommu_msi_iova(desc, iova, PAGE_SHIFT); - return 0; -} -#endif - static int iommufd_group_setup_msi(struct iommufd_group *igroup, struct iommufd_hwpt_paging *hwpt_paging) { diff --git a/drivers/iommu/iommufd/driver.c b/drivers/iommu/iommufd/driver.c index 2d98b04ff1cb..999da79dfa36 100644 --- a/drivers/iommu/iommufd/driver.c +++ b/drivers/iommu/iommufd/driver.c @@ -49,5 +49,129 @@ struct device *iommufd_viommu_find_dev(struct iommufd_v= iommu *viommu, } EXPORT_SYMBOL_NS_GPL(iommufd_viommu_find_dev, "IOMMUFD"); =20 +/* + * Get a iommufd_sw_msi_map for the msi physical address requested by the = irq + * layer. The mapping to IOVA is global to the iommufd file descriptor, ev= ery + * domain that is attached to a device using the same MSI parameters will = use + * the same IOVA. + */ +static __maybe_unused struct iommufd_sw_msi_map * +iommufd_sw_msi_get_map(struct iommufd_ctx *ictx, phys_addr_t msi_addr, + phys_addr_t sw_msi_start) +{ + struct iommufd_sw_msi_map *cur; + unsigned int max_pgoff =3D 0; + + lockdep_assert_held(&ictx->sw_msi_lock); + + list_for_each_entry(cur, &ictx->sw_msi_list, sw_msi_item) { + if (cur->sw_msi_start !=3D sw_msi_start) + continue; + max_pgoff =3D max(max_pgoff, cur->pgoff + 1); + if (cur->msi_addr =3D=3D msi_addr) + return cur; + } + + if (ictx->sw_msi_id >=3D + BITS_PER_BYTE * sizeof_field(struct iommufd_sw_msi_maps, bitmap)) + return ERR_PTR(-EOVERFLOW); + + cur =3D kzalloc(sizeof(*cur), GFP_KERNEL); + if (!cur) + cur =3D ERR_PTR(-ENOMEM); + cur->sw_msi_start =3D sw_msi_start; + cur->msi_addr =3D msi_addr; + cur->pgoff =3D max_pgoff; + cur->id =3D ictx->sw_msi_id++; + list_add_tail(&cur->sw_msi_item, &ictx->sw_msi_list); + return cur; +} + +int iommufd_sw_msi_install(struct iommufd_ctx *ictx, + struct iommufd_hwpt_paging *hwpt_paging, + struct iommufd_sw_msi_map *msi_map) +{ + unsigned long iova; + + lockdep_assert_held(&ictx->sw_msi_lock); + + iova =3D msi_map->sw_msi_start + msi_map->pgoff * PAGE_SIZE; + if (!test_bit(msi_map->id, hwpt_paging->present_sw_msi.bitmap)) { + int rc; + + rc =3D iommu_map(hwpt_paging->common.domain, iova, + msi_map->msi_addr, PAGE_SIZE, + IOMMU_WRITE | IOMMU_READ | IOMMU_MMIO, + GFP_KERNEL_ACCOUNT); + if (rc) + return rc; + __set_bit(msi_map->id, hwpt_paging->present_sw_msi.bitmap); + } + return 0; +} +EXPORT_SYMBOL_NS_GPL(iommufd_sw_msi_install, "IOMMUFD"); + +/* + * Called by the irq code if the platform translates the MSI address throu= gh the + * IOMMU. msi_addr is the physical address of the MSI page. iommufd will + * allocate a fd global iova for the physical page that is the same on all + * domains and devices. + */ +#ifdef CONFIG_IRQ_MSI_IOMMU +int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, + phys_addr_t msi_addr) +{ + struct device *dev =3D msi_desc_to_dev(desc); + struct iommufd_hwpt_paging *hwpt_paging; + struct iommu_attach_handle *raw_handle; + struct iommufd_attach_handle *handle; + struct iommufd_sw_msi_map *msi_map; + struct iommufd_ctx *ictx; + unsigned long iova; + int rc; + + /* + * It is safe to call iommu_attach_handle_get() here because the iommu + * core code invokes this under the group mutex which also prevents any + * change of the attach handle for the duration of this function. + */ + iommu_group_mutex_assert(dev); + + raw_handle =3D + iommu_attach_handle_get(dev->iommu_group, IOMMU_NO_PASID, 0); + if (IS_ERR(raw_handle)) + return 0; + hwpt_paging =3D find_hwpt_paging(domain->iommufd_hwpt); + + handle =3D to_iommufd_handle(raw_handle); + /* No IOMMU_RESV_SW_MSI means no change to the msi_msg */ + if (handle->idev->igroup->sw_msi_start =3D=3D PHYS_ADDR_MAX) + return 0; + + ictx =3D handle->idev->ictx; + guard(mutex)(&ictx->sw_msi_lock); + /* + * The input msi_addr is the exact byte offset of the MSI doorbell, we + * assume the caller has checked that it is contained with a MMIO region + * that is secure to map at PAGE_SIZE. + */ + msi_map =3D iommufd_sw_msi_get_map(handle->idev->ictx, + msi_addr & PAGE_MASK, + handle->idev->igroup->sw_msi_start); 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Feb 2025 01:31:39.2464 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5cb1d2d1-265a-411b-275f-08dd5797a614 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB73.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6835 Content-Type: text/plain; charset="utf-8" There are only two sw_msi implementations in the entire system, thus it's not very necessary to have an sw_msi pointer. Instead, check domain->private_data_owner to call the two implementations directly from the core code. Suggested-by: Robin Murphy Signed-off-by: Nicolin Chen --- drivers/iommu/dma-iommu.h | 9 +++++++++ include/linux/iommu.h | 15 --------------- drivers/iommu/dma-iommu.c | 13 +++---------- drivers/iommu/iommu.c | 16 ++++++++++++++-- drivers/iommu/iommufd/hw_pagetable.c | 3 --- 5 files changed, 26 insertions(+), 30 deletions(-) diff --git a/drivers/iommu/dma-iommu.h b/drivers/iommu/dma-iommu.h index c12d63457c76..97f1da1efbb4 100644 --- a/drivers/iommu/dma-iommu.h +++ b/drivers/iommu/dma-iommu.h @@ -18,6 +18,9 @@ int iommu_dma_init_fq(struct iommu_domain *domain); =20 void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list= ); =20 +int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, + phys_addr_t msi_addr); + extern bool iommu_dma_forcedac; =20 #else /* CONFIG_IOMMU_DMA */ @@ -44,5 +47,11 @@ static inline void iommu_dma_get_resv_regions(struct dev= ice *dev, struct list_he { } =20 +static inline int iommu_dma_sw_msi(struct iommu_domain *domain, + struct msi_desc *desc, phys_addr_t msi_addr) +{ + return -ENODEV; +} + #endif /* CONFIG_IOMMU_DMA */ #endif /* __DMA_IOMMU_H */ diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 4f2774c08262..29400060d648 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -224,11 +224,6 @@ struct iommu_domain { struct iommu_dma_cookie *iova_cookie; int (*iopf_handler)(struct iopf_group *group); =20 -#if IS_ENABLED(CONFIG_IRQ_MSI_IOMMU) - int (*sw_msi)(struct iommu_domain *domain, struct msi_desc *desc, - phys_addr_t msi_addr); -#endif - union { /* Pointer usable by owner of the domain */ struct iommufd_hw_pagetable *iommufd_hwpt; /* iommufd */ }; @@ -249,16 +244,6 @@ struct iommu_domain { }; }; =20 -static inline void iommu_domain_set_sw_msi( - struct iommu_domain *domain, - int (*sw_msi)(struct iommu_domain *domain, struct msi_desc *desc, - phys_addr_t msi_addr)) -{ -#if IS_ENABLED(CONFIG_IRQ_MSI_IOMMU) - domain->sw_msi =3D sw_msi; -#endif -} - static inline bool iommu_is_dma_domain(struct iommu_domain *domain) { return domain->type & __IOMMU_DOMAIN_DMA_API; diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 78915d74e8fa..7ee71b9c53bd 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -103,9 +103,6 @@ static int __init iommu_dma_forcedac_setup(char *str) } early_param("iommu.forcedac", iommu_dma_forcedac_setup); =20 -static int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *= desc, - phys_addr_t msi_addr); - /* Number of entries per flush queue */ #define IOVA_DEFAULT_FQ_SIZE 256 #define IOVA_SINGLE_FQ_SIZE 32768 @@ -402,7 +399,6 @@ int iommu_get_dma_cookie(struct iommu_domain *domain) return -ENOMEM; =20 mutex_init(&domain->iova_cookie->mutex); - iommu_domain_set_sw_msi(domain, iommu_dma_sw_msi); domain->private_data_owner =3D IOMMU_DOMAIN_DATA_OWNER_DMA; return 0; } @@ -435,7 +431,6 @@ int iommu_get_msi_cookie(struct iommu_domain *domain, d= ma_addr_t base) =20 cookie->msi_iova =3D base; domain->iova_cookie =3D cookie; - iommu_domain_set_sw_msi(domain, iommu_dma_sw_msi); domain->private_data_owner =3D IOMMU_DOMAIN_DATA_OWNER_DMA; return 0; } @@ -451,10 +446,8 @@ void iommu_put_dma_cookie(struct iommu_domain *domain) struct iommu_dma_cookie *cookie =3D domain->iova_cookie; struct iommu_dma_msi_page *msi, *tmp; =20 -#if IS_ENABLED(CONFIG_IRQ_MSI_IOMMU) - if (domain->sw_msi !=3D iommu_dma_sw_msi) + if (domain->private_data_owner !=3D IOMMU_DOMAIN_DATA_OWNER_DMA) return; -#endif =20 if (!cookie) return; @@ -1813,8 +1806,8 @@ static struct iommu_dma_msi_page *iommu_dma_get_msi_p= age(struct device *dev, return NULL; } =20 -static int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *= desc, - phys_addr_t msi_addr) +int iommu_dma_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, + phys_addr_t msi_addr) { struct device *dev =3D msi_desc_to_dev(desc); const struct iommu_dma_msi_page *msi_page; diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 022bf96a18c5..462d7bc0d47a 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -3619,8 +3620,19 @@ int iommu_dma_prepare_msi(struct msi_desc *desc, phy= s_addr_t msi_addr) return 0; =20 mutex_lock(&group->mutex); - if (group->domain && group->domain->sw_msi) - ret =3D group->domain->sw_msi(group->domain, desc, msi_addr); + if (group->domain) { + switch (group->domain->private_data_owner) { + case IOMMU_DOMAIN_DATA_OWNER_DMA: + ret =3D iommu_dma_sw_msi(group->domain, desc, msi_addr); + break; + case IOMMU_DOMAIN_DATA_OWNER_IOMMUFD: + ret =3D iommufd_sw_msi(group->domain, desc, msi_addr); + break; + default: + ret =3D -EOPNOTSUPP; + break; + } + } mutex_unlock(&group->mutex); return ret; } diff --git a/drivers/iommu/iommufd/hw_pagetable.c b/drivers/iommu/iommufd/h= w_pagetable.c index 5640444de475..ba46f9c0a81f 100644 --- a/drivers/iommu/iommufd/hw_pagetable.c +++ b/drivers/iommu/iommufd/hw_pagetable.c @@ -156,7 +156,6 @@ iommufd_hwpt_paging_alloc(struct iommufd_ctx *ictx, str= uct iommufd_ioas *ioas, goto out_abort; } } - iommu_domain_set_sw_msi(hwpt->domain, iommufd_sw_msi); hwpt->domain->private_data_owner =3D IOMMU_DOMAIN_DATA_OWNER_IOMMUFD; =20 /* @@ -253,7 +252,6 @@ iommufd_hwpt_nested_alloc(struct iommufd_ctx *ictx, goto out_abort; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Feb 2025 01:31:41.9936 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 985fc9f3-b877-47d2-6dd2-08dd5797a7ab X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CEB.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4157 Content-Type: text/plain; charset="utf-8" Now that iommufd does not rely on dma-iommu.c for any purpose. We can combine the dma-iommu.c iova_cookie and the iommufd_hwpt under the same union. This union is effectively 'owner data' and can be used by the entity that allocated the domain. Note that legacy vfio type1 flows continue to use dma-iommu.c for sw_msi and still need iova_cookie. Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- include/linux/iommu.h | 2 +- drivers/iommu/dma-iommu.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 29400060d648..5c6bca1ace27 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -221,10 +221,10 @@ struct iommu_domain { const struct iommu_ops *owner; /* Whose domain_alloc we came from */ unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */ struct iommu_domain_geometry geometry; - struct iommu_dma_cookie *iova_cookie; int (*iopf_handler)(struct iopf_group *group); =20 union { /* Pointer usable by owner of the domain */ + struct iommu_dma_cookie *iova_cookie; /* dma-iommu */ struct iommufd_hw_pagetable *iommufd_hwpt; /* iommufd */ }; union { /* Fault handler */ diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 7ee71b9c53bd..ee2fcc058aa3 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -443,12 +443,13 @@ EXPORT_SYMBOL(iommu_get_msi_cookie); */ void iommu_put_dma_cookie(struct iommu_domain *domain) { - struct iommu_dma_cookie *cookie =3D domain->iova_cookie; struct iommu_dma_msi_page *msi, *tmp; + struct iommu_dma_cookie *cookie; =20 if (domain->private_data_owner !=3D IOMMU_DOMAIN_DATA_OWNER_DMA) return; =20 + cookie =3D domain->iova_cookie; if (!cookie) return; =20 --=20 2.43.0