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a=rsa-sha256; c=relaxed/relaxed; d=ew.tq-group.com; s=dkim; t=1731334275; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mdJ0HsavbtI5RLxUlcwKb2h8lymAfGCEIXL8a653/I0=; b=WWYWSnS44Hvwl1Clt3Tw7X3eq3C/VAh3JsOKrjR+jMh8g+ehSQUYBkwvTKt2j8++nHrtK9 JmGNMLQ6i9mU6u7sYks2y5Cxg8BLvqrDo5OO0VwUFC6G7EKzozrZm3hF30SlOrrppwrPcx +ZFc8E36+KUc+yyMQu2ijGGQowCSoBzMvbb7WFMKWQSapQxGIXBqFinLzwbQXD3ql37iZM xZjFCTcanVLLHAqts/SdXXtSN7ZJHpOubmEheoDEoLw+7iNsyPkXUvmSAxyzgMAJiuOlD1 QvB328TaLKHt+5K/caoiMk1NyTcDtkxS8+KRmrsmpFLoH6B8/3st/RCBmBPVOA== From: Matthias Schiffer To: Lee Jones Cc: linux@ew.tq-group.com, linux-kernel@vger.kernel.org, Matthias Schiffer Subject: [PATCH v7 1/5] mfd: tqmx86: add board definitions for TQMx120UC, TQMx130UC and TQMxE41S Date: Mon, 11 Nov 2024 15:10:28 +0100 Message-ID: <90ddebda96d29246992b58ae0231a511f6424211.1731325758.git.matthias.schiffer@ew.tq-group.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 This adds support for 3 new TQMx86 COMs: - TQMx120UC/TQMx130UC: COM Express Compact Type 6 modules with 12th and 13th Generation Intel Core CPUs ([1, 2]) - TQMxE41S: SMARC 2.1 module with Intel Atom x7000E and compatible CPUs [3] [1] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx1= 20uc/ [2] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx1= 30uc/ [3] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmxe= 41s/ Signed-off-by: Matthias Schiffer --- drivers/mfd/tqmx86.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/mfd/tqmx86.c b/drivers/mfd/tqmx86.c index fac02875fe7d9..e15b9be98c2db 100644 --- a/drivers/mfd/tqmx86.c +++ b/drivers/mfd/tqmx86.c @@ -35,11 +35,14 @@ #define TQMX86_REG_BOARD_ID_E39C2 7 #define TQMX86_REG_BOARD_ID_70EB 8 #define TQMX86_REG_BOARD_ID_80UC 9 +#define TQMX86_REG_BOARD_ID_120UC 10 #define TQMX86_REG_BOARD_ID_110EB 11 #define TQMX86_REG_BOARD_ID_E40M 12 #define TQMX86_REG_BOARD_ID_E40S 13 #define TQMX86_REG_BOARD_ID_E40C1 14 #define TQMX86_REG_BOARD_ID_E40C2 15 +#define TQMX86_REG_BOARD_ID_130UC 16 +#define TQMX86_REG_BOARD_ID_E41S 19 #define TQMX86_REG_BOARD_REV 0x01 #define TQMX86_REG_IO_EXT_INT 0x06 #define TQMX86_REG_IO_EXT_INT_NONE 0 @@ -132,6 +135,8 @@ static const char *tqmx86_board_id_to_name(u8 board_id,= u8 sauc) return "TQMx70EB"; case TQMX86_REG_BOARD_ID_80UC: return "TQMx80UC"; + case TQMX86_REG_BOARD_ID_120UC: + return "TQMx120UC"; case TQMX86_REG_BOARD_ID_110EB: return "TQMx110EB"; case TQMX86_REG_BOARD_ID_E40M: @@ -142,6 +147,10 @@ static const char *tqmx86_board_id_to_name(u8 board_id= , u8 sauc) return "TQMxE40C1"; case TQMX86_REG_BOARD_ID_E40C2: return "TQMxE40C2"; + case TQMX86_REG_BOARD_ID_130UC: + return "TQMx130UC"; + case TQMX86_REG_BOARD_ID_E41S: + return "TQMxE41S"; default: return "Unknown"; } @@ -154,11 +163,14 @@ static int tqmx86_board_id_to_clk_rate(struct device = *dev, u8 board_id) case TQMX86_REG_BOARD_ID_60EB: case TQMX86_REG_BOARD_ID_70EB: case TQMX86_REG_BOARD_ID_80UC: + case TQMX86_REG_BOARD_ID_120UC: case TQMX86_REG_BOARD_ID_110EB: case TQMX86_REG_BOARD_ID_E40M: case TQMX86_REG_BOARD_ID_E40S: case TQMX86_REG_BOARD_ID_E40C1: case TQMX86_REG_BOARD_ID_E40C2: + case TQMX86_REG_BOARD_ID_130UC: + case TQMX86_REG_BOARD_ID_E41S: return 24000; case TQMX86_REG_BOARD_ID_E39MS: case TQMX86_REG_BOARD_ID_E39C1: --=20 TQ-Systems GmbH | M=C3=BChlstra=C3=9Fe 2, Gut Delling | 82229 Seefeld, Germ= any Amtsgericht M=C3=BCnchen, HRB 105018 Gesch=C3=A4ftsf=C3=BChrer: Detlef Schneider, R=C3=BCdiger Stahl, Stefan Sch= neider https://www.tq-group.com/ From nobody Sat Nov 23 21:01:27 2024 Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 374A019EEBD for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Clarify that "7, 9, 12" refers to the valid arguments that can be passed as gpio_irq. Signed-off-by: Matthias Schiffer --- drivers/mfd/tqmx86.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/tqmx86.c b/drivers/mfd/tqmx86.c index e15b9be98c2db..7b2f9490a9af5 100644 --- a/drivers/mfd/tqmx86.c +++ b/drivers/mfd/tqmx86.c @@ -58,7 +58,7 @@ =20 static uint gpio_irq; module_param(gpio_irq, uint, 0); -MODULE_PARM_DESC(gpio_irq, "GPIO IRQ number (7, 9, 12)"); +MODULE_PARM_DESC(gpio_irq, "GPIO IRQ number (valid parameters: 7, 9, 12)"); =20 static const struct resource tqmx_i2c_soft_resources[] =3D { DEFINE_RES_IO(TQMX86_IOBASE_I2C, TQMX86_IOSIZE_I2C), --=20 TQ-Systems GmbH | M=C3=BChlstra=C3=9Fe 2, Gut Delling | 82229 Seefeld, Germ= any Amtsgericht M=C3=BCnchen, HRB 105018 Gesch=C3=A4ftsf=C3=BChrer: Detlef Schneider, R=C3=BCdiger Stahl, Stefan Sch= neider https://www.tq-group.com/ From nobody Sat Nov 23 21:01:27 2024 Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36BAA19E994 for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Move IRQ setup into a helper function. The string "GPIO" for error messages is replaced with a label argument to prepare for reusing the function for the I2C IRQ. No functional change intended. Co-developed-by: Gregor Herburger Signed-off-by: Gregor Herburger Signed-off-by: Matthias Schiffer --- drivers/mfd/tqmx86.c | 59 +++++++++++++++++++++++++++----------------- 1 file changed, 37 insertions(+), 22 deletions(-) diff --git a/drivers/mfd/tqmx86.c b/drivers/mfd/tqmx86.c index 7b2f9490a9af5..8aa448a67c9a5 100644 --- a/drivers/mfd/tqmx86.c +++ b/drivers/mfd/tqmx86.c @@ -186,33 +186,52 @@ static int tqmx86_board_id_to_clk_rate(struct device = *dev, u8 board_id) } } =20 -static int tqmx86_probe(struct platform_device *pdev) +static int tqmx86_setup_irq(struct device *dev, const char *label, u8 irq, + void __iomem *io_base, u8 reg_shift) { - u8 board_id, sauc, rev, i2c_det, io_ext_int_val; - struct device *dev =3D &pdev->dev; - u8 gpio_irq_cfg, readback; - const char *board_name; - void __iomem *io_base; - int err; + u8 val, readback; + int irq_cfg; =20 - switch (gpio_irq) { + switch (irq) { case 0: - gpio_irq_cfg =3D TQMX86_REG_IO_EXT_INT_NONE; + irq_cfg =3D TQMX86_REG_IO_EXT_INT_NONE; break; case 7: - gpio_irq_cfg =3D TQMX86_REG_IO_EXT_INT_7; + irq_cfg =3D TQMX86_REG_IO_EXT_INT_7; break; case 9: - gpio_irq_cfg =3D TQMX86_REG_IO_EXT_INT_9; + irq_cfg =3D TQMX86_REG_IO_EXT_INT_9; break; case 12: - gpio_irq_cfg =3D TQMX86_REG_IO_EXT_INT_12; + irq_cfg =3D TQMX86_REG_IO_EXT_INT_12; break; default: - pr_err("tqmx86: Invalid GPIO IRQ (%d)\n", gpio_irq); + dev_err(dev, "invalid %s IRQ (%d)\n", label, irq); return -EINVAL; } =20 + val =3D ioread8(io_base + TQMX86_REG_IO_EXT_INT); + val &=3D ~(TQMX86_REG_IO_EXT_INT_MASK << reg_shift); + val |=3D (irq_cfg & TQMX86_REG_IO_EXT_INT_MASK) << reg_shift; + + iowrite8(val, io_base + TQMX86_REG_IO_EXT_INT); + readback =3D ioread8(io_base + TQMX86_REG_IO_EXT_INT); + if (readback !=3D val) { + dev_warn(dev, "%s interrupts not supported\n", label); + return -EINVAL; + } + + return 0; +} + +static int tqmx86_probe(struct platform_device *pdev) +{ + u8 board_id, sauc, rev, i2c_det; + struct device *dev =3D &pdev->dev; + const char *board_name; + void __iomem *io_base; + int err; + io_base =3D devm_ioport_map(dev, TQMX86_IOBASE, TQMX86_IOSIZE); if (!io_base) return -ENOMEM; @@ -233,15 +252,11 @@ static int tqmx86_probe(struct platform_device *pdev) */ i2c_det =3D inb(TQMX86_REG_I2C_DETECT); =20 - if (gpio_irq_cfg) { - io_ext_int_val =3D - gpio_irq_cfg << TQMX86_REG_IO_EXT_INT_GPIO_SHIFT; - iowrite8(io_ext_int_val, io_base + TQMX86_REG_IO_EXT_INT); - readback =3D ioread8(io_base + TQMX86_REG_IO_EXT_INT); - if (readback !=3D io_ext_int_val) { - dev_warn(dev, "GPIO interrupts not supported.\n"); - return -EINVAL; - } + if (gpio_irq) { + err =3D tqmx86_setup_irq(dev, "GPIO", gpio_irq, io_base, + TQMX86_REG_IO_EXT_INT_GPIO_SHIFT); + if (err) + return err; =20 /* Assumes the IRQ resource is first. */ tqmx_gpio_resources[0].start =3D gpio_irq; --=20 TQ-Systems GmbH | M=C3=BChlstra=C3=9Fe 2, Gut Delling | 82229 Seefeld, Germ= any Amtsgericht M=C3=BCnchen, HRB 105018 Gesch=C3=A4ftsf=C3=BChrer: Detlef Schneider, R=C3=BCdiger Stahl, Stefan Sch= neider https://www.tq-group.com/ From nobody Sat Nov 23 21:01:27 2024 Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1EE4C19EED6 for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 GPIO IRQ setup can fail either because an invalid IRQ was passed as a parameter, or because the GPIO controller does not support interrupts. Neither is severe enough to stop the whole probe; simply disable IRQ support in the GPIO resource when setup fails. The code is made a bit more robust by introduing an enum for the resource list indices instead of assuming that the IRQ is at index 0. Signed-off-by: Matthias Schiffer --- drivers/mfd/tqmx86.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/drivers/mfd/tqmx86.c b/drivers/mfd/tqmx86.c index 8aa448a67c9a5..d2704526f9d4b 100644 --- a/drivers/mfd/tqmx86.c +++ b/drivers/mfd/tqmx86.c @@ -68,13 +68,15 @@ static const struct resource tqmx_watchdog_resources[] = =3D { DEFINE_RES_IO(TQMX86_IOBASE_WATCHDOG, TQMX86_IOSIZE_WATCHDOG), }; =20 -/* - * The IRQ resource must be first, since it is updated with the - * configured IRQ in the probe function. - */ +enum tqmx86_gpio_resource_type { + TQMX86_GPIO_IO, + TQMX86_GPIO_IRQ, +}; + static struct resource tqmx_gpio_resources[] =3D { - DEFINE_RES_IRQ(0), - DEFINE_RES_IO(TQMX86_IOBASE_GPIO, TQMX86_IOSIZE_GPIO), + [TQMX86_GPIO_IO] =3D DEFINE_RES_IO(TQMX86_IOBASE_GPIO, TQMX86_IOSIZE_GPIO= ), + /* Placeholder for IRQ resource */ + [TQMX86_GPIO_IRQ] =3D {}, }; =20 static struct i2c_board_info tqmx86_i2c_devices[] =3D { @@ -255,13 +257,8 @@ static int tqmx86_probe(struct platform_device *pdev) if (gpio_irq) { err =3D tqmx86_setup_irq(dev, "GPIO", gpio_irq, io_base, TQMX86_REG_IO_EXT_INT_GPIO_SHIFT); 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 From: Gregor Herburger The i2c-ocores controller can run in interrupt mode on tqmx86 modules. Add a module parameter to allow configuring the IRQ number, similar to the handling of the GPIO IRQ. The new code and module parameter refer to the I2C controller as "I2C1", as the TQMx86 PLD actually contains a second I2C controller, for which driver support will be added in the future. Signed-off-by: Gregor Herburger Signed-off-by: Matthias Schiffer --- drivers/mfd/tqmx86.c | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/tqmx86.c b/drivers/mfd/tqmx86.c index d2704526f9d4b..1cba3b67b0fb9 100644 --- a/drivers/mfd/tqmx86.c +++ b/drivers/mfd/tqmx86.c @@ -50,6 +50,7 @@ #define TQMX86_REG_IO_EXT_INT_9 2 #define TQMX86_REG_IO_EXT_INT_12 3 #define TQMX86_REG_IO_EXT_INT_MASK 0x3 +#define TQMX86_REG_IO_EXT_INT_I2C1_SHIFT 0 #define TQMX86_REG_IO_EXT_INT_GPIO_SHIFT 4 #define TQMX86_REG_SAUC 0x17 =20 @@ -60,8 +61,19 @@ static uint gpio_irq; module_param(gpio_irq, uint, 0); MODULE_PARM_DESC(gpio_irq, "GPIO IRQ number (valid parameters: 7, 9, 12)"); =20 -static const struct resource tqmx_i2c_soft_resources[] =3D { - DEFINE_RES_IO(TQMX86_IOBASE_I2C, TQMX86_IOSIZE_I2C), +static uint i2c1_irq; +module_param(i2c1_irq, uint, 0); +MODULE_PARM_DESC(i2c1_irq, "I2C1 IRQ number (valid parameters: 7, 9, 12)"); + +enum tqmx86_i2c1_resource_type { + TQMX86_I2C1_IO, + TQMX86_I2C1_IRQ, +}; + +static struct resource tqmx_i2c_soft_resources[] =3D { + [TQMX86_I2C1_IO] =3D DEFINE_RES_IO(TQMX86_IOBASE_I2C, TQMX86_IOSIZE_I2C), + /* Placeholder for IRQ resource */ + [TQMX86_I2C1_IRQ] =3D {}, }; =20 static const struct resource tqmx_watchdog_resources[] =3D { @@ -264,6 +276,13 @@ static int tqmx86_probe(struct platform_device *pdev) ocores_platform_data.clock_khz =3D tqmx86_board_id_to_clk_rate(dev, board= _id); =20 if (i2c_det =3D=3D TQMX86_REG_I2C_DETECT_SOFT) { + if (i2c1_irq) { + err =3D tqmx86_setup_irq(dev, "I2C1", i2c1_irq, io_base, + TQMX86_REG_IO_EXT_INT_I2C1_SHIFT); + if (!err) + tqmx_i2c_soft_resources[TQMX86_I2C1_IRQ] =3D DEFINE_RES_IRQ(i2c1_irq); + } + err =3D devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, tqmx86_i2c_soft_dev, ARRAY_SIZE(tqmx86_i2c_soft_dev), --=20 TQ-Systems GmbH | M=C3=BChlstra=C3=9Fe 2, Gut Delling | 82229 Seefeld, Germ= any Amtsgericht M=C3=BCnchen, HRB 105018 Gesch=C3=A4ftsf=C3=BChrer: Detlef Schneider, R=C3=BCdiger Stahl, Stefan Sch= neider https://www.tq-group.com/