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Tue, 5 Nov 2024 12:05:26 -0800 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v7 01/10] iommufd/viommu: Add IOMMUFD_OBJ_VDEVICE and IOMMU_VDEVICE_ALLOC ioctl Date: Tue, 5 Nov 2024 12:05:09 -0800 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00029927:EE_|SJ1PR12MB6362:EE_ X-MS-Office365-Filtering-Correlation-Id: ac416a04-5a09-468a-835d-08dcfdd53cc1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|7416014|376014|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?MBXSRSUuMs7NOvLAOHq1n9ibW4fi/LPKJ7hBgmhZyHe0Bqb0EIo1qO8WLqyS?= =?us-ascii?Q?8qtphCy3iidWGGoQiAFLuVUjZkRzprhWCqEDhtSbFnNBkL7o/xNd5yY8APBJ?= =?us-ascii?Q?SKXaNM9SAiOzIKvWRRZe5UpHrKAS5IOML/ynN6Y6gBouuXD4cXqo600V9fDd?= =?us-ascii?Q?b3zQZjds5kVWDfzzG6bk15crVOTVnIUlUNk1DoYTT54mtg9wtpGzduuzjmk9?= =?us-ascii?Q?hbvpvcjm1RI5WQg1umyOuW70mS7vAc10z9HLHGxS6hrZb6ivzVSgHjBLNvaS?= =?us-ascii?Q?JQDABFDQ3Lg5Orj3AcU3n55gDOV2w/UHpA/QUJCStyMZZHKP3dQdCVuE3aC1?= =?us-ascii?Q?DZiee/pXws9wqU7ViUGHW3X4s/daacU4XENkuRuoz7ZAaLB2HpjXIRmaDK2i?= =?us-ascii?Q?3YjHLIjDg8vYrvqyjj52AeW2ZnihFDuYk07B+VuORxSeV/teZDwd9UId5uWm?= =?us-ascii?Q?06tgq3hQwfMrL1HucTWnU23KkntuAgZ9IzLAlDrlwkfSu0fOguiYsmA2kaRJ?= =?us-ascii?Q?iAMs7OI3tcccVHrKELOsxcPsmILJFI+e3HjbYz2B6MeoKDpca2gVrLBOT7Cc?= =?us-ascii?Q?pO0qQGJ5r6DReclfiwYwPdTEXyrkIA5aiZwYFBCgHBvSmnvIadO5HZ1rnFzB?= =?us-ascii?Q?8k+y+cFvMRIzLssXKJcidgDhimaQ0bW3JEvwElaKKo3mxdSpEujKmSTss6n4?= =?us-ascii?Q?TIXicyI+Vu1W6IOXjG5XSbdbof9cYuK2DEXTOBmunmdNdzjYBhCcnOOV8CmS?= =?us-ascii?Q?ALmJZxcm2wfiVbQtsKX8oz+3yj3nk0yqNVA1AE/PzMvNgTuM3ZImH1Wi8Ihw?= =?us-ascii?Q?Rx9ixosW8mAdEIbcqBvlh6hxRVxBuRYI72zH1cPn0KHHhzFeucsNOgmSdd0D?= =?us-ascii?Q?nhKRaUwHmiNgZGL54ZZAKY81KTjdjtxPxly3fnajdLQozWQsVXTBiRJ/gSN1?= =?us-ascii?Q?40oFTxOJBvi2pPiokuQR2vkquqOENlm/BWMWer8o7S1nHOMmwx9/IQKrpVMe?= =?us-ascii?Q?Cbrtnq+svX/rl68QOHt3Yph/+U9AJVJX2ryZgDGNz2yecspSD9INubyLFrnO?= =?us-ascii?Q?p2u46Oj6DXldwugT6FCaWIhWHCnVZ6KQJkmBpyjg3kuN0MGaQ2NXU05UUL/F?= =?us-ascii?Q?5ouIprNADcw1kEPuI+Es0mid4LmUh2sS1ffBZv56sa00+GaM863trIdmZjP3?= =?us-ascii?Q?7l4aad9g5tmRE7sy0YG1IpCObzqxXWdytIKlD7FIePwzrYIIZDHBqxOd/wb3?= =?us-ascii?Q?iuJ2PASPjMmTEKvZsPJemOxz2fyONeoS7FKwc3HFozetdNVItdXr01uCnf4Y?= =?us-ascii?Q?XEBygSqzOlBK/xbiZcXTpxBkiICjVOI6xzqNdr+IH/hb99H9QVp+hN0odgAV?= =?us-ascii?Q?cbhf+AFxMSnUs1sp43DeVtkQSwQCXDnsC8kq77T4iSrdu3/q2w=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(7416014)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2024 20:05:46.6912 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ac416a04-5a09-468a-835d-08dcfdd53cc1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00029927.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6362 Content-Type: text/plain; charset="utf-8" Introduce a new IOMMUFD_OBJ_VDEVICE to represent a physical device (struct device) against a vIOMMU (struct iommufd_viommu) object in a VM. This vDEVICE object (and its structure) holds all the infos and attributes in the VM, regarding the device related to the vIOMMU. As an initial patch, add a per-vIOMMU virtual ID. This can be: - Virtual StreamID on a nested ARM SMMUv3, an index to a Stream Table - Virtual DeviceID on a nested AMD IOMMU, an index to a Device Table - Virtual RID on a nested Intel VT-D IOMMU, an index to a Context Table Potentially, this vDEVICE structure would hold some vData for Confidential Compute Architecture (CCA). Use this virtual ID to index an "vdevs" xarray that belongs to a vIOMMU object. Add a new ioctl for vDEVICE allocations. Since a vDEVICE is a connection of a device object and an iommufd_viommu object, take two refcounts in the ioctl handler. Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/iommufd_private.h | 18 ++++++ include/linux/iommufd.h | 4 ++ include/uapi/linux/iommufd.h | 22 +++++++ drivers/iommu/iommufd/main.c | 6 ++ drivers/iommu/iommufd/viommu.c | 76 +++++++++++++++++++++++++ 5 files changed, 126 insertions(+) diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommuf= d/iommufd_private.h index e8f5ef550cc9..062656c19a07 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -507,8 +507,26 @@ static inline int iommufd_hwpt_replace_device(struct i= ommufd_device *idev, return iommu_group_replace_domain(idev->igroup->group, hwpt->domain); } =20 +static inline struct iommufd_viommu * +iommufd_get_viommu(struct iommufd_ucmd *ucmd, u32 id) +{ + return container_of(iommufd_get_object(ucmd->ictx, id, + IOMMUFD_OBJ_VIOMMU), + struct iommufd_viommu, obj); +} + int iommufd_viommu_alloc_ioctl(struct iommufd_ucmd *ucmd); void iommufd_viommu_destroy(struct iommufd_object *obj); +int iommufd_vdevice_alloc_ioctl(struct iommufd_ucmd *ucmd); +void iommufd_vdevice_destroy(struct iommufd_object *obj); + +struct iommufd_vdevice { + struct iommufd_object obj; + struct iommufd_ctx *ictx; + struct iommufd_viommu *viommu; + struct device *dev; + u64 id; /* per-vIOMMU virtual ID */ +}; =20 #ifdef CONFIG_IOMMUFD_TEST int iommufd_test(struct iommufd_ucmd *ucmd); diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h index de9b56265c9c..71fa1e343023 100644 --- a/include/linux/iommufd.h +++ b/include/linux/iommufd.h @@ -10,6 +10,7 @@ #include #include #include +#include =20 struct device; struct file; @@ -31,6 +32,7 @@ enum iommufd_object_type { IOMMUFD_OBJ_ACCESS, IOMMUFD_OBJ_FAULT, IOMMUFD_OBJ_VIOMMU, + IOMMUFD_OBJ_VDEVICE, #ifdef CONFIG_IOMMUFD_TEST IOMMUFD_OBJ_SELFTEST, #endif @@ -89,6 +91,8 @@ struct iommufd_viommu { =20 const struct iommufd_viommu_ops *ops; =20 + struct xarray vdevs; + unsigned int type; }; =20 diff --git a/include/uapi/linux/iommufd.h b/include/uapi/linux/iommufd.h index a498d4838f9a..9b5236004b8e 100644 --- a/include/uapi/linux/iommufd.h +++ b/include/uapi/linux/iommufd.h @@ -53,6 +53,7 @@ enum { IOMMUFD_CMD_FAULT_QUEUE_ALLOC =3D 0x8e, IOMMUFD_CMD_IOAS_MAP_FILE =3D 0x8f, IOMMUFD_CMD_VIOMMU_ALLOC =3D 0x90, + IOMMUFD_CMD_VDEVICE_ALLOC =3D 0x91, }; =20 /** @@ -864,4 +865,25 @@ struct iommu_viommu_alloc { __u32 out_viommu_id; }; #define IOMMU_VIOMMU_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VIOMMU_ALLOC) + +/** + * struct iommu_vdevice_alloc - ioctl(IOMMU_VDEVICE_ALLOC) + * @size: sizeof(struct iommu_vdevice_alloc) + * @viommu_id: vIOMMU ID to associate with the virtual device + * @dev_id: The physical device to allocate a virtual instance on the vIOM= MU + * @out_vdevice_id: Object handle for the vDevice. Pass to IOMMU_DESTORY + * @virt_id: Virtual device ID per vIOMMU, e.g. vSID of ARM SMMUv3, vDevic= eID + * of AMD IOMMU, and vRID of a nested Intel VT-d to a Context Ta= ble + * + * Allocate a virtual device instance (for a physical device) against a vI= OMMU. + * This instance holds the device's information (related to its vIOMMU) in= a VM. + */ +struct iommu_vdevice_alloc { + __u32 size; + __u32 viommu_id; + __u32 dev_id; + __u32 out_vdevice_id; + __aligned_u64 virt_id; +}; +#define IOMMU_VDEVICE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VDEVICE_ALLOC) #endif diff --git a/drivers/iommu/iommufd/main.c b/drivers/iommu/iommufd/main.c index cc514f9bc3e6..d735fe04197f 100644 --- a/drivers/iommu/iommufd/main.c +++ b/drivers/iommu/iommufd/main.c @@ -308,6 +308,7 @@ union ucmd_buffer { struct iommu_option option; struct iommu_vfio_ioas vfio_ioas; struct iommu_viommu_alloc viommu; + struct iommu_vdevice_alloc vdev; #ifdef CONFIG_IOMMUFD_TEST struct iommu_test_cmd test; #endif @@ -363,6 +364,8 @@ static const struct iommufd_ioctl_op iommufd_ioctl_ops[= ] =3D { __reserved), IOCTL_OP(IOMMU_VIOMMU_ALLOC, iommufd_viommu_alloc_ioctl, struct iommu_viommu_alloc, out_viommu_id), + IOCTL_OP(IOMMU_VDEVICE_ALLOC, iommufd_vdevice_alloc_ioctl, + struct iommu_vdevice_alloc, virt_id), #ifdef CONFIG_IOMMUFD_TEST IOCTL_OP(IOMMU_TEST_CMD, iommufd_test, struct iommu_test_cmd, last), #endif @@ -501,6 +504,9 @@ static const struct iommufd_object_ops iommufd_object_o= ps[] =3D { [IOMMUFD_OBJ_VIOMMU] =3D { .destroy =3D iommufd_viommu_destroy, }, + [IOMMUFD_OBJ_VDEVICE] =3D { + .destroy =3D iommufd_vdevice_destroy, + }, #ifdef CONFIG_IOMMUFD_TEST [IOMMUFD_OBJ_SELFTEST] =3D { .destroy =3D iommufd_selftest_destroy, diff --git a/drivers/iommu/iommufd/viommu.c b/drivers/iommu/iommufd/viommu.c index 888239b78667..69b88e8c7c26 100644 --- a/drivers/iommu/iommufd/viommu.c +++ b/drivers/iommu/iommufd/viommu.c @@ -11,6 +11,7 @@ void iommufd_viommu_destroy(struct iommufd_object *obj) if (viommu->ops && viommu->ops->destroy) viommu->ops->destroy(viommu); refcount_dec(&viommu->hwpt->common.obj.users); + xa_destroy(&viommu->vdevs); } =20 int iommufd_viommu_alloc_ioctl(struct iommufd_ucmd *ucmd) @@ -53,6 +54,7 @@ int iommufd_viommu_alloc_ioctl(struct iommufd_ucmd *ucmd) goto out_put_hwpt; } =20 + xa_init(&viommu->vdevs); viommu->type =3D cmd->type; viommu->ictx =3D ucmd->ictx; viommu->hwpt =3D hwpt_paging; @@ -79,3 +81,77 @@ int iommufd_viommu_alloc_ioctl(struct iommufd_ucmd *ucmd) iommufd_put_object(ucmd->ictx, &idev->obj); return rc; } + +void iommufd_vdevice_destroy(struct iommufd_object *obj) +{ + struct iommufd_vdevice *vdev =3D + container_of(obj, struct iommufd_vdevice, obj); + struct iommufd_viommu *viommu =3D vdev->viommu; + + /* xa_cmpxchg is okay to fail if alloc failed xa_cmpxchg previously */ + xa_cmpxchg(&viommu->vdevs, vdev->id, vdev, NULL, GFP_KERNEL); + refcount_dec(&viommu->obj.users); + put_device(vdev->dev); +} + +int iommufd_vdevice_alloc_ioctl(struct iommufd_ucmd *ucmd) +{ + struct iommu_vdevice_alloc *cmd =3D ucmd->cmd; + struct iommufd_vdevice *vdev, *curr; + struct iommufd_viommu *viommu; + struct iommufd_device *idev; + u64 virt_id =3D cmd->virt_id; + int rc =3D 0; + + /* virt_id indexes an xarray */ + if (virt_id > ULONG_MAX) + return -EINVAL; + + viommu =3D iommufd_get_viommu(ucmd, cmd->viommu_id); + if (IS_ERR(viommu)) + return PTR_ERR(viommu); + + idev =3D iommufd_get_device(ucmd, cmd->dev_id); + if (IS_ERR(idev)) { + rc =3D PTR_ERR(idev); + goto out_put_viommu; + } + + if (viommu->iommu_dev !=3D __iommu_get_iommu_dev(idev->dev)) { + rc =3D -EINVAL; + goto out_put_idev; + } + + vdev =3D iommufd_object_alloc(ucmd->ictx, vdev, IOMMUFD_OBJ_VDEVICE); + if (IS_ERR(vdev)) { + rc =3D PTR_ERR(vdev); + goto out_put_idev; + } + + vdev->id =3D virt_id; + vdev->dev =3D idev->dev; + get_device(idev->dev); + vdev->viommu =3D viommu; + refcount_inc(&viommu->obj.users); + + curr =3D xa_cmpxchg(&viommu->vdevs, virt_id, NULL, vdev, GFP_KERNEL); + if (curr) { + rc =3D xa_err(curr) ?: -EEXIST; + goto out_abort; + } + + cmd->out_vdevice_id =3D vdev->obj.id; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2024 20:05:47.5047 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: be148b4b-014b-4160-a349-08dcfdd53d3d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8831 Content-Type: text/plain; charset="utf-8" Add a vdevice_alloc op to the viommu mock_viommu_ops for the coverage of IOMMU_VIOMMU_TYPE_SELFTEST allocations. Then, add a vdevice_alloc TEST_F to cover the IOMMU_VDEVICE_ALLOC ioctl. Reviewed-by: Kevin Tian Reviewed-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- tools/testing/selftests/iommu/iommufd_utils.h | 27 +++++++++++++++++++ tools/testing/selftests/iommu/iommufd.c | 20 ++++++++++++++ .../selftests/iommu/iommufd_fail_nth.c | 4 +++ 3 files changed, 51 insertions(+) diff --git a/tools/testing/selftests/iommu/iommufd_utils.h b/tools/testing/= selftests/iommu/iommufd_utils.h index 7dabc261fae2..7fe905924d72 100644 --- a/tools/testing/selftests/iommu/iommufd_utils.h +++ b/tools/testing/selftests/iommu/iommufd_utils.h @@ -847,3 +847,30 @@ static int _test_cmd_viommu_alloc(int fd, __u32 device= _id, __u32 hwpt_id, EXPECT_ERRNO(_errno, \ _test_cmd_viommu_alloc(self->fd, device_id, hwpt_id, \ type, 0, viommu_id)) + +static int _test_cmd_vdevice_alloc(int fd, __u32 viommu_id, __u32 idev_id, + __u64 virt_id, __u32 *vdev_id) +{ + struct iommu_vdevice_alloc cmd =3D { + .size =3D sizeof(cmd), + .dev_id =3D idev_id, + .viommu_id =3D viommu_id, + .virt_id =3D virt_id, + }; + int ret; + + ret =3D ioctl(fd, IOMMU_VDEVICE_ALLOC, &cmd); + if (ret) + return ret; + if (vdev_id) + *vdev_id =3D cmd.out_vdevice_id; + return 0; +} + +#define test_cmd_vdevice_alloc(viommu_id, idev_id, virt_id, vdev_id) = \ + ASSERT_EQ(0, _test_cmd_vdevice_alloc(self->fd, viommu_id, idev_id, \ + virt_id, vdev_id)) +#define test_err_vdevice_alloc(_errno, viommu_id, idev_id, virt_id, vdev_i= d) \ + EXPECT_ERRNO(_errno, \ + _test_cmd_vdevice_alloc(self->fd, viommu_id, idev_id, \ + virt_id, vdev_id)) diff --git a/tools/testing/selftests/iommu/iommufd.c b/tools/testing/selfte= sts/iommu/iommufd.c index 37c7da283824..f3cb628753c9 100644 --- a/tools/testing/selftests/iommu/iommufd.c +++ b/tools/testing/selftests/iommu/iommufd.c @@ -134,6 +134,7 @@ TEST_F(iommufd, cmd_length) TEST_LENGTH(iommu_vfio_ioas, IOMMU_VFIO_IOAS, __reserved); TEST_LENGTH(iommu_ioas_map_file, IOMMU_IOAS_MAP_FILE, iova); TEST_LENGTH(iommu_viommu_alloc, IOMMU_VIOMMU_ALLOC, out_viommu_id); + TEST_LENGTH(iommu_vdevice_alloc, IOMMU_VDEVICE_ALLOC, virt_id); #undef TEST_LENGTH } =20 @@ -2617,4 +2618,23 @@ TEST_F(iommufd_viommu, viommu_alloc_nested_iopf) } } =20 +TEST_F(iommufd_viommu, vdevice_alloc) +{ + uint32_t viommu_id =3D self->viommu_id; + uint32_t dev_id =3D self->device_id; + uint32_t vdev_id =3D 0; + + if (dev_id) { + /* Set vdev_id to 0x99, unset it, and set to 0x88 */ + test_cmd_vdevice_alloc(viommu_id, dev_id, 0x99, &vdev_id); + test_err_vdevice_alloc(EEXIST, viommu_id, dev_id, 0x99, + &vdev_id); + test_ioctl_destroy(vdev_id); + test_cmd_vdevice_alloc(viommu_id, dev_id, 0x88, &vdev_id); + test_ioctl_destroy(vdev_id); + } else { + test_err_vdevice_alloc(ENOENT, viommu_id, dev_id, 0x99, NULL); + } +} + TEST_HARNESS_MAIN diff --git a/tools/testing/selftests/iommu/iommufd_fail_nth.c b/tools/testi= ng/selftests/iommu/iommufd_fail_nth.c index fb618485d7ca..22f6fd5f0f74 100644 --- a/tools/testing/selftests/iommu/iommufd_fail_nth.c +++ b/tools/testing/selftests/iommu/iommufd_fail_nth.c @@ -622,6 +622,7 @@ TEST_FAIL_NTH(basic_fail_nth, device) uint32_t idev_id; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2024 20:05:51.6674 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e7af19e7-953b-4b33-f67f-08dcfdd53fbf X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0002992D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6897 Content-Type: text/plain; charset="utf-8" This per-vIOMMU cache_invalidate op is like the cache_invalidate_user op in struct iommu_domain_ops, but wider, supporting device cache (e.g. PCI ATC invaldiations). Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- include/linux/iommufd.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h index 71fa1e343023..2bc735ff9511 100644 --- a/include/linux/iommufd.h +++ b/include/linux/iommufd.h @@ -16,6 +16,7 @@ struct device; struct file; struct iommu_group; struct iommu_user_data; +struct iommu_user_data_array; struct iommufd_access; struct iommufd_ctx; struct iommufd_device; @@ -105,12 +106,21 @@ struct iommufd_viommu { * must be defined in include/uapi/linux/iommufd.h. * It must fully initialize the new iommu_domain bef= ore * returning. Upon failure, ERR_PTR must be returned. + * @cache_invalidate: Flush hardware cache used by a vIOMMU. It can be use= d for + * any IOMMU hardware specific cache: TLB and device ca= che. + * The @array passes in the cache invalidation requests= , in + * form of a driver data structure. A driver must updat= e the + * array->entry_num to report the number of handled req= uests. + * The data structure of the array entry must be define= d in + * include/uapi/linux/iommufd.h */ struct iommufd_viommu_ops { void (*destroy)(struct iommufd_viommu *viommu); struct iommu_domain *(*alloc_domain_nested)( struct iommufd_viommu *viommu, u32 flags, const struct iommu_user_data *user_data); + int (*cache_invalidate)(struct iommufd_viommu *viommu, + struct iommu_user_data_array *array); }; =20 #if IS_ENABLED(CONFIG_IOMMUFD) --=20 2.43.0 From nobody Sun Nov 24 11:53:27 2024 Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2053.outbound.protection.outlook.com [40.107.223.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6AD1E21747D; Tue, 5 Nov 2024 20:06:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.223.53 ARC-Seal: i=2; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2024 20:05:54.3414 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b26d233e-0068-4851-38bb-08dcfdd54153 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0002992C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7547 Content-Type: text/plain; charset="utf-8" With a vIOMMU object, use space can flush any IOMMU related cache that can be directed via a vIOMMU object. It is similar to the IOMMU_HWPT_INVALIDATE uAPI, but can cover a wider range than IOTLB, e.g. device/desciprtor cache. Allow hwpt_id of the iommu_hwpt_invalidate structure to carry a viommu_id, and reuse the IOMMU_HWPT_INVALIDATE uAPI for vIOMMU invalidations. Drivers can define different structures for vIOMMU invalidations v.s. HWPT ones. Since both the HWPT-based and vIOMMU-based invalidation pathways check own cache invalidation op, remove the WARN_ON_ONCE in the allocator. Update the uAPI, kdoc, and selftest case accordingly. Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- include/uapi/linux/iommufd.h | 9 ++++-- drivers/iommu/iommufd/hw_pagetable.c | 40 +++++++++++++++++++------ tools/testing/selftests/iommu/iommufd.c | 4 +-- 3 files changed, 39 insertions(+), 14 deletions(-) diff --git a/include/uapi/linux/iommufd.h b/include/uapi/linux/iommufd.h index 9b5236004b8e..badb41c5bfa4 100644 --- a/include/uapi/linux/iommufd.h +++ b/include/uapi/linux/iommufd.h @@ -700,7 +700,7 @@ struct iommu_hwpt_vtd_s1_invalidate { /** * struct iommu_hwpt_invalidate - ioctl(IOMMU_HWPT_INVALIDATE) * @size: sizeof(struct iommu_hwpt_invalidate) - * @hwpt_id: ID of a nested HWPT for cache invalidation + * @hwpt_id: ID of a nested HWPT or a vIOMMU, for cache invalidation * @data_uptr: User pointer to an array of driver-specific cache invalidat= ion * data. * @data_type: One of enum iommu_hwpt_invalidate_data_type, defining the d= ata @@ -711,8 +711,11 @@ struct iommu_hwpt_vtd_s1_invalidate { * Output the number of requests successfully handled by kerne= l. * @__reserved: Must be 0. * - * Invalidate the iommu cache for user-managed page table. Modifications o= n a - * user-managed page table should be followed by this operation to sync ca= che. + * Invalidate iommu cache for user-managed page table or vIOMMU. Modificat= ions + * on a user-managed page table should be followed by this operation, if a= HWPT + * is passed in via @hwpt_id. Other caches, such as device cache or descri= ptor + * cache can be flushed if a vIOMMU is passed in via the @hwpt_id field. + * * Each ioctl can support one or more cache invalidation requests in the a= rray * that has a total size of @entry_len * @entry_num. * diff --git a/drivers/iommu/iommufd/hw_pagetable.c b/drivers/iommu/iommufd/h= w_pagetable.c index 982bf4a35a2b..702057655a81 100644 --- a/drivers/iommu/iommufd/hw_pagetable.c +++ b/drivers/iommu/iommufd/hw_pagetable.c @@ -251,8 +251,7 @@ iommufd_hwpt_nested_alloc(struct iommufd_ctx *ictx, } hwpt->domain->owner =3D ops; =20 - if (WARN_ON_ONCE(hwpt->domain->type !=3D IOMMU_DOMAIN_NESTED || - !hwpt->domain->ops->cache_invalidate_user)) { + if (WARN_ON_ONCE(hwpt->domain->type !=3D IOMMU_DOMAIN_NESTED)) { rc =3D -EINVAL; goto out_abort; } @@ -483,7 +482,7 @@ int iommufd_hwpt_invalidate(struct iommufd_ucmd *ucmd) .entry_len =3D cmd->entry_len, .entry_num =3D cmd->entry_num, }; - struct iommufd_hw_pagetable *hwpt; + struct iommufd_object *pt_obj; u32 done_num =3D 0; int rc; =20 @@ -497,17 +496,40 @@ int iommufd_hwpt_invalidate(struct iommufd_ucmd *ucmd) goto out; } =20 - hwpt =3D iommufd_get_hwpt_nested(ucmd, cmd->hwpt_id); - if (IS_ERR(hwpt)) { - rc =3D PTR_ERR(hwpt); + pt_obj =3D iommufd_get_object(ucmd->ictx, cmd->hwpt_id, IOMMUFD_OBJ_ANY); + if (IS_ERR(pt_obj)) { + rc =3D PTR_ERR(pt_obj); goto out; } + if (pt_obj->type =3D=3D IOMMUFD_OBJ_HWPT_NESTED) { + struct iommufd_hw_pagetable *hwpt =3D + container_of(pt_obj, struct iommufd_hw_pagetable, obj); + + if (!hwpt->domain->ops || + !hwpt->domain->ops->cache_invalidate_user) { + rc =3D -EOPNOTSUPP; + goto out_put_pt; + } + rc =3D hwpt->domain->ops->cache_invalidate_user(hwpt->domain, + &data_array); + } else if (pt_obj->type =3D=3D IOMMUFD_OBJ_VIOMMU) { + struct iommufd_viommu *viommu =3D + container_of(pt_obj, struct iommufd_viommu, obj); + + if (!viommu->ops || !viommu->ops->cache_invalidate) { + rc =3D -EOPNOTSUPP; + goto out_put_pt; + } + rc =3D viommu->ops->cache_invalidate(viommu, &data_array); + } else { + rc =3D -EINVAL; + goto out_put_pt; + } =20 - rc =3D hwpt->domain->ops->cache_invalidate_user(hwpt->domain, - &data_array); done_num =3D data_array.entry_num; =20 - iommufd_put_object(ucmd->ictx, &hwpt->obj); +out_put_pt: + iommufd_put_object(ucmd->ictx, pt_obj); out: cmd->entry_num =3D done_num; if (iommufd_ucmd_respond(ucmd, sizeof(*cmd))) diff --git a/tools/testing/selftests/iommu/iommufd.c b/tools/testing/selfte= sts/iommu/iommufd.c index f3cb628753c9..8cb3e835ca97 100644 --- a/tools/testing/selftests/iommu/iommufd.c +++ b/tools/testing/selftests/iommu/iommufd.c @@ -367,9 +367,9 @@ TEST_F(iommufd_ioas, alloc_hwpt_nested) EXPECT_ERRNO(EBUSY, _test_ioctl_destroy(self->fd, parent_hwpt_id)); =20 - /* hwpt_invalidate only supports a user-managed hwpt (nested) */ + /* hwpt_invalidate does not support a parent hwpt */ num_inv =3D 1; - test_err_hwpt_invalidate(ENOENT, parent_hwpt_id, inv_reqs, + test_err_hwpt_invalidate(EINVAL, parent_hwpt_id, inv_reqs, IOMMU_HWPT_INVALIDATE_DATA_SELFTEST, sizeof(*inv_reqs), &num_inv); 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2024 20:05:53.4735 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0961141e-c666-4240-66f8-08dcfdd540cc X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6849 Content-Type: text/plain; charset="utf-8" From: Jason Gunthorpe The iommu_copy_struct_from_user_array helper can be used to copy a single entry from a user array which might not be efficient if the array is big. Add a new iommu_copy_struct_from_full_user_array to copy the entire user array at once. Update the existing iommu_copy_struct_from_user_array kdoc accordingly. Signed-off-by: Jason Gunthorpe Reviewed-by: Kevin Tian Reviewed-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- include/linux/iommu.h | 48 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 2574fc8abaf2..11de66237eaa 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -493,7 +493,9 @@ static inline int __iommu_copy_struct_from_user_array( * @index: Index to the location in the array to copy user data from * @min_last: The last member of the data structure @kdst points in the * initial version. - * Return 0 for success, otherwise -error. + * + * Copy a single entry from a user array. Return 0 for success, otherwise + * -error. */ #define iommu_copy_struct_from_user_array(kdst, user_array, data_type, ind= ex, \ min_last) \ @@ -501,6 +503,50 @@ static inline int __iommu_copy_struct_from_user_array( kdst, user_array, data_type, index, sizeof(*(kdst)), \ offsetofend(typeof(*(kdst)), min_last)) =20 +/** + * iommu_copy_struct_from_full_user_array - Copy iommu driver specific user + * space data from an iommu_user_data_array + * @kdst: Pointer to an iommu driver specific user data that is defined in + * include/uapi/linux/iommufd.h + * @kdst_entry_size: sizeof(*kdst) + * @user_array: Pointer to a struct iommu_user_data_array for a user space + * array + * @data_type: The data type of the @kdst. Must match with @user_array->ty= pe + * + * Copy the entire user array. kdst must have room for kdst_entry_size * + * user_array->entry_num bytes. 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2024 20:05:59.5673 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 28eb027e-1006-49cc-3cdb-08dcfdd5446e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8990 Content-Type: text/plain; charset="utf-8" This avoids a bigger trouble of exposing struct iommufd_device and struct iommufd_vdevice in the public header. Reviewed-by: Kevin Tian Reviewed-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- include/linux/iommufd.h | 8 ++++++++ drivers/iommu/iommufd/driver.c | 13 +++++++++++++ 2 files changed, 21 insertions(+) diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h index 2bc735ff9511..11110c749200 100644 --- a/include/linux/iommufd.h +++ b/include/linux/iommufd.h @@ -185,6 +185,8 @@ static inline int iommufd_vfio_compat_set_no_iommu(stru= ct iommufd_ctx *ictx) struct iommufd_object *_iommufd_object_alloc(struct iommufd_ctx *ictx, size_t size, enum iommufd_object_type type); +struct device *iommufd_viommu_find_dev(struct iommufd_viommu *viommu, + unsigned long vdev_id); #else /* !CONFIG_IOMMUFD_DRIVER_CORE */ static inline struct iommufd_object * _iommufd_object_alloc(struct iommufd_ctx *ictx, size_t size, @@ -192,6 +194,12 @@ _iommufd_object_alloc(struct iommufd_ctx *ictx, size_t= size, { return ERR_PTR(-EOPNOTSUPP); } + +static inline struct device * +iommufd_viommu_find_dev(struct iommufd_viommu *viommu, unsigned long vdev_= id) +{ + return NULL; +} #endif /* CONFIG_IOMMUFD_DRIVER_CORE */ =20 /* diff --git a/drivers/iommu/iommufd/driver.c b/drivers/iommu/iommufd/driver.c index 2bc47d92a0ab..7b67fdf44134 100644 --- a/drivers/iommu/iommufd/driver.c +++ b/drivers/iommu/iommufd/driver.c @@ -36,5 +36,18 @@ struct iommufd_object *_iommufd_object_alloc(struct iomm= ufd_ctx *ictx, } EXPORT_SYMBOL_NS_GPL(_iommufd_object_alloc, IOMMUFD); =20 +/* Caller should xa_lock(&viommu->vdevs) to protect the return value */ +struct device *iommufd_viommu_find_dev(struct iommufd_viommu *viommu, + unsigned long vdev_id) +{ + struct iommufd_vdevice *vdev; + + lockdep_assert_held(&viommu->vdevs.xa_lock); + + vdev =3D xa_load(&viommu->vdevs, vdev_id); + return vdev ? vdev->dev : NULL; +} +EXPORT_SYMBOL_NS_GPL(iommufd_viommu_find_dev, IOMMUFD); + MODULE_DESCRIPTION("iommufd code shared with builtin modules"); MODULE_LICENSE("GPL"); --=20 2.43.0 From nobody Sun Nov 24 11:53:27 2024 Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2079.outbound.protection.outlook.com [40.107.237.79]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35C0721745D; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2024 20:05:59.9955 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4ec1b0d4-741b-442c-95e7-08dcfdd544af X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0002992D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7535 Content-Type: text/plain; charset="utf-8" Similar to the coverage of cache_invalidate_user for iotlb invalidation, add a device cache and a viommu_cache_invalidate function to test it out. Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/iommufd_test.h | 25 +++++++++ drivers/iommu/iommufd/selftest.c | 76 +++++++++++++++++++++++++++- 2 files changed, 100 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/iommufd/iommufd_test.h b/drivers/iommu/iommufd/i= ommufd_test.h index edced4ac7cd3..46558f83e734 100644 --- a/drivers/iommu/iommufd/iommufd_test.h +++ b/drivers/iommu/iommufd/iommufd_test.h @@ -54,6 +54,11 @@ enum { MOCK_NESTED_DOMAIN_IOTLB_NUM =3D 4, }; =20 +enum { + MOCK_DEV_CACHE_ID_MAX =3D 3, + MOCK_DEV_CACHE_NUM =3D 4, +}; + struct iommu_test_cmd { __u32 size; __u32 op; @@ -152,6 +157,7 @@ struct iommu_test_hw_info { /* Should not be equal to any defined value in enum iommu_hwpt_data_type */ #define IOMMU_HWPT_DATA_SELFTEST 0xdead #define IOMMU_TEST_IOTLB_DEFAULT 0xbadbeef +#define IOMMU_TEST_DEV_CACHE_DEFAULT 0xbaddad =20 /** * struct iommu_hwpt_selftest @@ -182,4 +188,23 @@ struct iommu_hwpt_invalidate_selftest { =20 #define IOMMU_VIOMMU_TYPE_SELFTEST 0xdeadbeef =20 +/* Should not be equal to any defined value in enum iommu_viommu_invalidat= e_data_type */ +#define IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST 0xdeadbeef +#define IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST_INVALID 0xdadbeef + +/** + * struct iommu_viommu_invalidate_selftest - Invalidation data for Mock VI= OMMU + * (IOMMU_VIOMMU_INVALIDATE_DATA_SE= LFTEST) + * @flags: Invalidate flags + * @cache_id: Invalidate cache entry index + * + * If IOMMU_TEST_INVALIDATE_ALL is set in @flags, @cache_id will be ignored + */ +struct iommu_viommu_invalidate_selftest { +#define IOMMU_TEST_INVALIDATE_FLAG_ALL (1 << 0) + __u32 flags; + __u32 vdev_id; + __u32 cache_id; +}; + #endif diff --git a/drivers/iommu/iommufd/selftest.c b/drivers/iommu/iommufd/selft= est.c index 31c8f78a3a66..e20498667a2c 100644 --- a/drivers/iommu/iommufd/selftest.c +++ b/drivers/iommu/iommufd/selftest.c @@ -163,6 +163,7 @@ struct mock_dev { struct device dev; unsigned long flags; int id; + u32 cache[MOCK_DEV_CACHE_NUM]; }; =20 static inline struct mock_dev *to_mock_dev(struct device *dev) @@ -609,9 +610,80 @@ mock_viommu_alloc_domain_nested(struct iommufd_viommu = *viommu, u32 flags, return &mock_nested->domain; } =20 +static int mock_viommu_cache_invalidate(struct iommufd_viommu *viommu, + struct iommu_user_data_array *array) +{ + struct iommu_viommu_invalidate_selftest *cmds; + struct iommu_viommu_invalidate_selftest *cur; + struct iommu_viommu_invalidate_selftest *end; + int rc; + + /* A zero-length array is allowed to validate the array type */ + if (array->entry_num =3D=3D 0 && + array->type =3D=3D IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST) { + array->entry_num =3D 0; + return 0; + } + + cmds =3D kcalloc(array->entry_num, sizeof(*cmds), GFP_KERNEL); + if (!cmds) + return -ENOMEM; + cur =3D cmds; + end =3D cmds + array->entry_num; + + static_assert(sizeof(*cmds) =3D=3D 3 * sizeof(u32)); + rc =3D iommu_copy_struct_from_full_user_array( + cmds, sizeof(*cmds), array, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST); + if (rc) + goto out; + + while (cur !=3D end) { + struct mock_dev *mdev; + struct device *dev; + int i; + + if (cur->flags & ~IOMMU_TEST_INVALIDATE_FLAG_ALL) { + rc =3D -EOPNOTSUPP; + goto out; + } + + if (cur->cache_id > MOCK_DEV_CACHE_ID_MAX) { + rc =3D -EINVAL; + goto out; + } + + xa_lock(&viommu->vdevs); + dev =3D iommufd_viommu_find_dev(viommu, + (unsigned long)cur->vdev_id); + if (!dev) { + xa_unlock(&viommu->vdevs); + rc =3D -EINVAL; + goto out; + } + mdev =3D container_of(dev, struct mock_dev, dev); + + if (cur->flags & IOMMU_TEST_INVALIDATE_FLAG_ALL) { + /* Invalidate all cache entries and ignore cache_id */ + for (i =3D 0; i < MOCK_DEV_CACHE_NUM; i++) + mdev->cache[i] =3D 0; + } else { + mdev->cache[cur->cache_id] =3D 0; + } + xa_unlock(&viommu->vdevs); + + cur++; + } +out: + array->entry_num =3D cur - cmds; + kfree(cmds); + return rc; +} + static struct iommufd_viommu_ops mock_viommu_ops =3D { .destroy =3D mock_viommu_destroy, .alloc_domain_nested =3D mock_viommu_alloc_domain_nested, + .cache_invalidate =3D mock_viommu_cache_invalidate, }; =20 static struct iommufd_viommu *mock_viommu_alloc(struct device *dev, @@ -782,7 +854,7 @@ static void mock_dev_release(struct device *dev) static struct mock_dev *mock_dev_create(unsigned long dev_flags) { struct mock_dev *mdev; - int rc; + int rc, i; =20 if (dev_flags & ~(MOCK_FLAGS_DEVICE_NO_DIRTY | MOCK_FLAGS_DEVICE_HUGE_IOVA)) @@ -796,6 +868,8 @@ static struct mock_dev *mock_dev_create(unsigned long d= ev_flags) mdev->flags =3D dev_flags; mdev->dev.release =3D mock_dev_release; mdev->dev.bus =3D &iommufd_mock_bus_type.bus; + for (i =3D 0; i < MOCK_DEV_CACHE_NUM; i++) + mdev->cache[i] =3D IOMMU_TEST_DEV_CACHE_DEFAULT; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2024 20:06:03.5914 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 08e06084-6a43-4805-a775-08dcfdd546d6 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0002992C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7161 Content-Type: text/plain; charset="utf-8" Similar to IOMMU_TEST_OP_MD_CHECK_IOTLB verifying a mock_domain's iotlb, IOMMU_TEST_OP_DEV_CHECK_CACHE will be used to verify a mock_dev's cache. Reviewed-by: Kevin Tian Reviewed-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/iommufd_test.h | 5 ++++ tools/testing/selftests/iommu/iommufd_utils.h | 24 +++++++++++++++++++ drivers/iommu/iommufd/selftest.c | 22 +++++++++++++++++ tools/testing/selftests/iommu/iommufd.c | 7 +++++- 4 files changed, 57 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/iommufd/iommufd_test.h b/drivers/iommu/iommufd/i= ommufd_test.h index 46558f83e734..a6b7a163f636 100644 --- a/drivers/iommu/iommufd/iommufd_test.h +++ b/drivers/iommu/iommufd/iommufd_test.h @@ -23,6 +23,7 @@ enum { IOMMU_TEST_OP_DIRTY, IOMMU_TEST_OP_MD_CHECK_IOTLB, IOMMU_TEST_OP_TRIGGER_IOPF, + IOMMU_TEST_OP_DEV_CHECK_CACHE, }; =20 enum { @@ -140,6 +141,10 @@ struct iommu_test_cmd { __u32 perm; __u64 addr; } trigger_iopf; + struct { + __u32 id; + __u32 cache; + } check_dev_cache; }; __u32 last; }; diff --git a/tools/testing/selftests/iommu/iommufd_utils.h b/tools/testing/= selftests/iommu/iommufd_utils.h index 7fe905924d72..619ffdb1e5e8 100644 --- a/tools/testing/selftests/iommu/iommufd_utils.h +++ b/tools/testing/selftests/iommu/iommufd_utils.h @@ -250,6 +250,30 @@ static int _test_cmd_hwpt_alloc(int fd, __u32 device_i= d, __u32 pt_id, __u32 ft_i test_cmd_hwpt_check_iotlb(hwpt_id, i, expected); \ }) =20 +#define test_cmd_dev_check_cache(device_id, cache_id, expected) = \ + ({ \ + struct iommu_test_cmd test_cmd =3D { \ + .size =3D sizeof(test_cmd), \ + .op =3D IOMMU_TEST_OP_DEV_CHECK_CACHE, \ + .id =3D device_id, \ + .check_dev_cache =3D { \ + .id =3D cache_id, \ + .cache =3D expected, \ + }, \ + }; \ + ASSERT_EQ(0, ioctl(self->fd, \ + _IOMMU_TEST_CMD( \ + IOMMU_TEST_OP_DEV_CHECK_CACHE), \ + &test_cmd)); \ + }) + +#define test_cmd_dev_check_cache_all(device_id, expected) = \ + ({ \ + int c; \ + for (c =3D 0; c < MOCK_DEV_CACHE_NUM; c++) \ + test_cmd_dev_check_cache(device_id, c, expected); \ + }) + static int _test_cmd_hwpt_invalidate(int fd, __u32 hwpt_id, void *reqs, uint32_t data_type, uint32_t lreq, uint32_t *nreqs) diff --git a/drivers/iommu/iommufd/selftest.c b/drivers/iommu/iommufd/selft= est.c index e20498667a2c..2f9de177dffc 100644 --- a/drivers/iommu/iommufd/selftest.c +++ b/drivers/iommu/iommufd/selftest.c @@ -1125,6 +1125,24 @@ static int iommufd_test_md_check_iotlb(struct iommuf= d_ucmd *ucmd, return rc; } =20 +static int iommufd_test_dev_check_cache(struct iommufd_ucmd *ucmd, u32 ide= v_id, + unsigned int cache_id, u32 cache) +{ + struct iommufd_device *idev; + struct mock_dev *mdev; + int rc =3D 0; + + idev =3D iommufd_get_device(ucmd, idev_id); + if (IS_ERR(idev)) + return PTR_ERR(idev); + mdev =3D container_of(idev->dev, struct mock_dev, dev); + + if (cache_id > MOCK_DEV_CACHE_ID_MAX || mdev->cache[cache_id] !=3D cache) + rc =3D -EINVAL; + iommufd_put_object(ucmd->ictx, &idev->obj); + return rc; +} + struct selftest_access { struct iommufd_access *access; struct file *file; @@ -1634,6 +1652,10 @@ int iommufd_test(struct iommufd_ucmd *ucmd) return iommufd_test_md_check_iotlb(ucmd, cmd->id, cmd->check_iotlb.id, cmd->check_iotlb.iotlb); + case IOMMU_TEST_OP_DEV_CHECK_CACHE: + return iommufd_test_dev_check_cache(ucmd, cmd->id, + cmd->check_dev_cache.id, + cmd->check_dev_cache.cache); case IOMMU_TEST_OP_CREATE_ACCESS: return iommufd_test_create_access(ucmd, cmd->id, cmd->create_access.flags); diff --git a/tools/testing/selftests/iommu/iommufd.c b/tools/testing/selfte= sts/iommu/iommufd.c index 8cb3e835ca97..4bc9dd2e620a 100644 --- a/tools/testing/selftests/iommu/iommufd.c +++ b/tools/testing/selftests/iommu/iommufd.c @@ -227,6 +227,8 @@ FIXTURE_SETUP(iommufd_ioas) for (i =3D 0; i !=3D variant->mock_domains; i++) { test_cmd_mock_domain(self->ioas_id, &self->stdev_id, &self->hwpt_id, &self->device_id); + test_cmd_dev_check_cache_all(self->device_id, + IOMMU_TEST_DEV_CACHE_DEFAULT); self->base_iova =3D MOCK_APERTURE_START; } } @@ -1392,9 +1394,12 @@ FIXTURE_SETUP(iommufd_mock_domain) =20 ASSERT_GE(ARRAY_SIZE(self->hwpt_ids), variant->mock_domains); =20 - for (i =3D 0; i !=3D variant->mock_domains; i++) + for (i =3D 0; i !=3D variant->mock_domains; i++) { test_cmd_mock_domain(self->ioas_id, &self->stdev_ids[i], &self->hwpt_ids[i], &self->idev_ids[i]); + test_cmd_dev_check_cache_all(self->idev_ids[0], + IOMMU_TEST_DEV_CACHE_DEFAULT); + } self->hwpt_id =3D self->hwpt_ids[0]; =20 self->mmap_flags =3D MAP_SHARED | MAP_ANONYMOUS; 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Tue, 5 Nov 2024 12:05:41 -0800 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v7 09/10] iommufd/selftest: Add vIOMMU coverage for IOMMU_HWPT_INVALIDATE ioctl Date: Tue, 5 Nov 2024 12:05:17 -0800 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F69:EE_|SN7PR12MB8791:EE_ X-MS-Office365-Filtering-Correlation-Id: c26ef448-df8d-49e1-6a5d-08dcfdd5477a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|36860700013|7416014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?cYu9FimrewE+zUPiuuYL3jCE3CZFl7beKN9bAXCuhK8Afyba7qfIsj5QcD7k?= =?us-ascii?Q?W9brcdlFowDAxLtM4tudCH+MZWXfojDyKTKwqJWHRUQRncHVL+tuwXJp8E1h?= =?us-ascii?Q?9WYHj1gtDK1JCk5ttKYHAw60e7mSMhaarBjklD9S2wZ2gALAGwWgDiSYlsW/?= =?us-ascii?Q?sqydCVoGPVSbtJ6IEKf4JpD4VgJhxNRo95GzjBEGEc5lufw4fwUHkX6DggWA?= =?us-ascii?Q?owwNjRATUYD2o6pJctxE9txceHXyHUG1h1VJj7YhPh9DMaSJnAkclb5qrUZg?= =?us-ascii?Q?k3BXGqCgqZawTt+RkhtsfI8CfkvoDRN6YTWBSbawbcEMLY8MD+RRDUcos5bC?= =?us-ascii?Q?oXobQlTAcR0SHogeZ/sZzQLDD4TBM3UFx/ZXpe6GiIRPCdGgnd5KjwrCspbU?= =?us-ascii?Q?X1B7hjul3w8VyLT8Skm8n27nEmpHNRG4XIHXJJ44ixm2LbIqQjPSucwfUKNO?= =?us-ascii?Q?fnFiql/8ro2744FJ/d7AFLUamiDDJ4C9xCSqn7LOglpATNClH1S5/IfyxW8J?= =?us-ascii?Q?FxS+L86CWTk74d9iAMAp6Q6YEAtgBHT2jRCWD0x40V0Gatnt5JeHL3z55Xv4?= =?us-ascii?Q?ypxSUoMNO3TblHYTFGlD6nHVNnjwZzhfO1wMny29JjZ2n92JX0KUMQ2sDgG6?= =?us-ascii?Q?Srr4ZDQm9RHaT3OzfXP73DssjX8ALhtKWfmWEPo0lfAmB6HJctwb+6bco1QB?= =?us-ascii?Q?WJJ6KtG0oK3iN9i+CwcfURDF2biE6vGYcv6SPORvWDc8LO5jE+PinOUVbLiY?= =?us-ascii?Q?dBno8lOc0ARcoPLk4lStmtoZ6bS+rxrSnN/6ZAPO28Q/zZoNmyz2umQlP07i?= =?us-ascii?Q?wUtNw9CHdTij+iGsUH/XJIgV/xtxoqNGAFvTR4D5xj6aE2Dg9yqUrZXB71/Y?= =?us-ascii?Q?svk89dNTcsP1xU3YndXaqXM9LJvzEkGNkprMwMmLGMbGkml6zYBrO//h8U4j?= =?us-ascii?Q?+kcjhHGxX35SfyO7XfBy3E/G+QLE7xp43dCWn7mPv1LTUfhlHpm8Lo1lhiUT?= =?us-ascii?Q?nACDm2MYuihWOURO8wVLXP6euozrcPcoKSH+sg/q3j7Rc9s5ZgOjt3SWAzQG?= =?us-ascii?Q?+HM8q5NWkH6aaL6T100BpinbH86D76y1UdA4azsQtypkNpKjtIGZ5c364yKH?= =?us-ascii?Q?yd3KV3xQ1abMORDMsGk+oJ1ioOAmRJdOLE0uOD90XgEwV3JMU/ZoV5HFYp2j?= =?us-ascii?Q?FwBYG4spk7IU4V3fbcmGT/vhDHVC9Dq4p0wXmz49SKq65M5E83hul5rKihSS?= =?us-ascii?Q?Dus3x5Vu2otJdb+1xr82psR+8SdUZEKR8R9mAcDEd/k1NYNCpJM75mOhkE3M?= =?us-ascii?Q?KOg78q8VcV7ZFehmo138Ye/ZuNhgN0Y5jiyNp5XJEPAxoUq7C5rtkhLyb7On?= =?us-ascii?Q?qiutgBi+3IFhd3dUml5UaYvOSHD0P9ldI22eI/iaVFZkMU4amg=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(376014)(36860700013)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2024 20:06:04.6802 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c26ef448-df8d-49e1-6a5d-08dcfdd5477a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F69.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB8791 Content-Type: text/plain; charset="utf-8" Add a viommu_cache test function to cover vIOMMU invalidations using the updated IOMMU_HWPT_INVALIDATE ioctl, which now allows passing in a vIOMMU via its hwpt_id field. Reviewed-by: Kevin Tian Reviewed-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- tools/testing/selftests/iommu/iommufd_utils.h | 32 ++++ tools/testing/selftests/iommu/iommufd.c | 173 ++++++++++++++++++ 2 files changed, 205 insertions(+) diff --git a/tools/testing/selftests/iommu/iommufd_utils.h b/tools/testing/= selftests/iommu/iommufd_utils.h index 619ffdb1e5e8..c0239f86f2f8 100644 --- a/tools/testing/selftests/iommu/iommufd_utils.h +++ b/tools/testing/selftests/iommu/iommufd_utils.h @@ -305,6 +305,38 @@ static int _test_cmd_hwpt_invalidate(int fd, __u32 hwp= t_id, void *reqs, data_type, lreq, nreqs)); \ }) =20 +static int _test_cmd_viommu_invalidate(int fd, __u32 viommu_id, void *reqs, + uint32_t data_type, uint32_t lreq, + uint32_t *nreqs) +{ + struct iommu_hwpt_invalidate cmd =3D { + .size =3D sizeof(cmd), + .hwpt_id =3D viommu_id, + .data_type =3D data_type, + .data_uptr =3D (uint64_t)reqs, + .entry_len =3D lreq, + .entry_num =3D *nreqs, + }; + int rc =3D ioctl(fd, IOMMU_HWPT_INVALIDATE, &cmd); + *nreqs =3D cmd.entry_num; + return rc; +} + +#define test_cmd_viommu_invalidate(viommu, reqs, lreq, nreqs) = \ + ({ \ + ASSERT_EQ(0, \ + _test_cmd_viommu_invalidate(self->fd, viommu, reqs, \ + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, \ + lreq, nreqs)); \ + }) +#define test_err_viommu_invalidate(_errno, viommu_id, reqs, data_type, lre= q, \ + nreqs) \ + ({ \ + EXPECT_ERRNO(_errno, _test_cmd_viommu_invalidate( \ + self->fd, viommu_id, reqs, \ + data_type, lreq, nreqs)); \ + }) + static int _test_cmd_access_replace_ioas(int fd, __u32 access_id, unsigned int ioas_id) { diff --git a/tools/testing/selftests/iommu/iommufd.c b/tools/testing/selfte= sts/iommu/iommufd.c index 4bc9dd2e620a..94fe038d2eee 100644 --- a/tools/testing/selftests/iommu/iommufd.c +++ b/tools/testing/selftests/iommu/iommufd.c @@ -2642,4 +2642,177 @@ TEST_F(iommufd_viommu, vdevice_alloc) } } =20 +TEST_F(iommufd_viommu, vdevice_cache) +{ + struct iommu_viommu_invalidate_selftest inv_reqs[2] =3D {}; + uint32_t viommu_id =3D self->viommu_id; + uint32_t dev_id =3D self->device_id; + uint32_t vdev_id =3D 0; + uint32_t num_inv; + + if (dev_id) { + test_cmd_vdevice_alloc(viommu_id, dev_id, 0x99, &vdev_id); + + test_cmd_dev_check_cache_all(dev_id, + IOMMU_TEST_DEV_CACHE_DEFAULT); + + /* Check data_type by passing zero-length array */ + num_inv =3D 0; + test_cmd_viommu_invalidate(viommu_id, inv_reqs, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* Negative test: Invalid data_type */ + num_inv =3D 1; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST_INVALID, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* Negative test: structure size sanity */ + num_inv =3D 1; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs) + 1, &num_inv); + assert(!num_inv); + + num_inv =3D 1; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + 1, &num_inv); + assert(!num_inv); + + /* Negative test: invalid flag is passed */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0xffffffff; + inv_reqs[0].vdev_id =3D 0x99; + test_err_viommu_invalidate(EOPNOTSUPP, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* Negative test: invalid data_uptr when array is not empty */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + test_err_viommu_invalidate(EINVAL, viommu_id, NULL, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* Negative test: invalid entry_len when array is not empty */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + 0, &num_inv); + assert(!num_inv); + + /* Negative test: invalid cache_id */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].cache_id =3D MOCK_DEV_CACHE_ID_MAX + 1; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* Negative test: invalid vdev_id */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x9; + inv_reqs[0].cache_id =3D 0; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* + * Invalidate the 1st cache entry but fail the 2nd request + * due to invalid flags configuration in the 2nd request. + */ + num_inv =3D 2; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].cache_id =3D 0; + inv_reqs[1].flags =3D 0xffffffff; + inv_reqs[1].vdev_id =3D 0x99; + inv_reqs[1].cache_id =3D 1; + test_err_viommu_invalidate(EOPNOTSUPP, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(num_inv =3D=3D 1); + test_cmd_dev_check_cache(dev_id, 0, 0); + test_cmd_dev_check_cache(dev_id, 1, + IOMMU_TEST_DEV_CACHE_DEFAULT); + test_cmd_dev_check_cache(dev_id, 2, + IOMMU_TEST_DEV_CACHE_DEFAULT); + test_cmd_dev_check_cache(dev_id, 3, + IOMMU_TEST_DEV_CACHE_DEFAULT); + + /* + * Invalidate the 1st cache entry but fail the 2nd request + * due to invalid cache_id configuration in the 2nd request. + */ + num_inv =3D 2; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].cache_id =3D 0; + inv_reqs[1].flags =3D 0; + inv_reqs[1].vdev_id =3D 0x99; + inv_reqs[1].cache_id =3D MOCK_DEV_CACHE_ID_MAX + 1; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(num_inv =3D=3D 1); + test_cmd_dev_check_cache(dev_id, 0, 0); + test_cmd_dev_check_cache(dev_id, 1, + IOMMU_TEST_DEV_CACHE_DEFAULT); + test_cmd_dev_check_cache(dev_id, 2, + IOMMU_TEST_DEV_CACHE_DEFAULT); + test_cmd_dev_check_cache(dev_id, 3, + IOMMU_TEST_DEV_CACHE_DEFAULT); + + /* Invalidate the 2nd cache entry and verify */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].cache_id =3D 1; + test_cmd_viommu_invalidate(viommu_id, inv_reqs, + sizeof(*inv_reqs), &num_inv); + assert(num_inv =3D=3D 1); + test_cmd_dev_check_cache(dev_id, 0, 0); + test_cmd_dev_check_cache(dev_id, 1, 0); + test_cmd_dev_check_cache(dev_id, 2, + IOMMU_TEST_DEV_CACHE_DEFAULT); + test_cmd_dev_check_cache(dev_id, 3, + IOMMU_TEST_DEV_CACHE_DEFAULT); + + /* Invalidate the 3rd and 4th cache entries and verify */ + num_inv =3D 2; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].cache_id =3D 2; + inv_reqs[1].flags =3D 0; + inv_reqs[1].vdev_id =3D 0x99; + inv_reqs[1].cache_id =3D 3; + test_cmd_viommu_invalidate(viommu_id, inv_reqs, + sizeof(*inv_reqs), &num_inv); + assert(num_inv =3D=3D 2); + test_cmd_dev_check_cache_all(dev_id, 0); + + /* Invalidate all cache entries for nested_dev_id[1] and verify */ + num_inv =3D 1; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].flags =3D IOMMU_TEST_INVALIDATE_FLAG_ALL; + test_cmd_viommu_invalidate(viommu_id, inv_reqs, + sizeof(*inv_reqs), &num_inv); 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Tue, 5 Nov 2024 12:05:43 -0800 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v7 10/10] Documentation: userspace-api: iommufd: Update vDEVICE Date: Tue, 5 Nov 2024 12:05:18 -0800 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F6A:EE_|SA3PR12MB8810:EE_ X-MS-Office365-Filtering-Correlation-Id: 0b9f576c-d0e5-40d2-5317-08dcfdd54973 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|36860700013|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?HkdShU9yP+XOW8ZwhFbv70cy+7I9YzRDQSnGE8qNPsgHrGxnSk5JzRNKeFes?= =?us-ascii?Q?f8ibYfTxMFuMiRFn2kXHU0Q+kFoefGfannzinnP3XCsq3GmATfRzukR505Kg?= =?us-ascii?Q?bbsnobVPUR1coC81oNs86BM5IlbGoNnM0tRA/lxzAXwQyw1CaNzOTZ3dCBuu?= =?us-ascii?Q?cbxQzPPRcDHXs/9+rt+nSyHKcwMHJ49OYqF4/xDNr8ycIEgnhOY126JxNY7P?= =?us-ascii?Q?pSUnhd3AMSgSAq2xHjweKiQSM/RUI1Kps1YhZMU1zHdg2D9wpRCOT8tep6Rf?= =?us-ascii?Q?tDqyaQamYPjcHLd1HN/XtzQT9ONmB/sLVWEQUBcEiGryZ5kx9mH+oAXret4v?= =?us-ascii?Q?Rf1WVEreR/4daoAAl+JE3RdL9hl+k3ZO2l6WysiEVb7wXj2SGOw8g3XaRGeB?= =?us-ascii?Q?kbZnhZbN1zpvRcRd8ApizuzhdjOiR6SORMFvCvb8Rsy6I8QTbC3uZ8hrqNBH?= =?us-ascii?Q?wdgjjF6ZRvDUs78gCPTiwCjKTZXIsLDZgPyVvKv/3JGooWSMEOBU7xh96Ti9?= =?us-ascii?Q?V48LUm5Hz1iCbcGUGMpvB/cjcgIaLvu9VL6Icbli9V7snfazeHDFJPSl1e9F?= =?us-ascii?Q?V9rojqUmGPtbcGuUrOPY3YHYsG0gbCK+yGK1TsrMelTlnbK7qz+I58lWNDFh?= =?us-ascii?Q?JL+yEHu+Lg6WIaywvwoeC14qK/Z3/pTzpZlGIqcph8OTwIrga1qhBPITY11F?= =?us-ascii?Q?IfJ0hM3tP+V6xOqc1B4NbTqwtdf3qSLdbMFNZfqxwWg32ghxYN5nm3zlbGat?= =?us-ascii?Q?fhzvDlArzZhVIn6Qe5p+I/StULgK3NWE2tmqxc2IFnicRk3OUHqOOHKELLPX?= =?us-ascii?Q?VhZ2zP0DKLW/wNFY10YOaZW5zN+/BbJoZKixW1c4Px/fT1SFqd8Mj+O50LJs?= =?us-ascii?Q?Yj13ktjXOsmMux7zdLnqjyLODltl2+VX1w07jEOrqog7UH2LfQclHrrfUct1?= =?us-ascii?Q?6FNMNGDWKaDbOY50Tiyzxme705Anbxq/UfQlgkHhJR7QoccJwjqWXJzIR3gt?= =?us-ascii?Q?672DWA0LKjpal39WDmhTkqvgdAzTmdes+Q7psO9DqnlpuTl3U3BmtR0im0oU?= =?us-ascii?Q?iJM4zmeBu19zvLgC0stoYa8mUiPxISj9rNVjpBto40Hy8ce5CD5M4egYNO1P?= =?us-ascii?Q?AMMS4OPgpaVidYpZJ8lBTB8yy/zAj4k4qfRUcXczp/kQ6iYMMq9FTxe2UYK/?= =?us-ascii?Q?JPHzqHZ6WFkrpJND4RR4LKLsjC6G/XR1SIMr3U0SAgu1CtGZOOjK7wSlAv+N?= =?us-ascii?Q?CyECCQ5vj3Q/plm65t7E5U6gwE2wLifkQNwXBxom+QyU6YflLNf9BLyy7nmc?= =?us-ascii?Q?QdHDUEuYIyE+9Ngxj4YbTg/1Yp2INdFd8OAh/+2OyV5jBHor+O0u6cL0pyKU?= =?us-ascii?Q?a3KKWUx6K6uJDyn+4mVBCmP2iNRPPx0wisEn7QFHCnx9cUdg+w=3D=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(36860700013)(1800799024)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2024 20:06:07.9736 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0b9f576c-d0e5-40d2-5317-08dcfdd54973 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F6A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8810 Content-Type: text/plain; charset="utf-8" With the introduction of the new object and its infrastructure, update the doc and the vIOMMU graph to reflect that. Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- Documentation/userspace-api/iommufd.rst | 41 +++++++++++++++++++------ 1 file changed, 32 insertions(+), 9 deletions(-) diff --git a/Documentation/userspace-api/iommufd.rst b/Documentation/usersp= ace-api/iommufd.rst index a8b7766c2849..8ba868ce7960 100644 --- a/Documentation/userspace-api/iommufd.rst +++ b/Documentation/userspace-api/iommufd.rst @@ -94,6 +94,19 @@ Following IOMMUFD objects are exposed to userspace: backed by corresponding vIOMMU objects, in which case a guest OS woul= d do the "dispatch" naturally instead of VMM trappings. =20 +- IOMMUFD_OBJ_VDEVICE, representing a virtual device for an IOMMUFD_OBJ_DE= VICE + against an IOMMUFD_OBJ_VIOMMU. This virtual device holds the device's vi= rtual + information or attributes (related to the vIOMMU) in a VM. An immediate = vDATA + example can be the virtual ID of the device on a vIOMMU, which is a uniq= ue ID + that VMM assigns to the device for a translation channel/port of the vIO= MMU, + e.g. vSID of ARM SMMUv3, vDeviceID of AMD IOMMU, and vRID of Intel VT-d = to a + Context Table. Potential use cases of some advanced security information= can + be forwarded via this object too, such as security level or realm inform= ation + in a Confidential Compute Architecture. A VMM should create a vDEVICE ob= ject + to forward all the device information in a VM, when it connects a device= to a + vIOMMU, which is a separate ioctl call from attaching the same device to= an + HWPT_PAGING that the vIOMMU holds. + All user-visible objects are destroyed via the IOMMU_DESTROY uAPI. =20 The diagrams below show relationships between user-visible objects and ker= nel @@ -133,16 +146,16 @@ creating the objects and links:: |____________| |____________| |______| =20 _______________________________________________________________________ - | iommufd (with vIOMMU) | + | iommufd (with vIOMMU/vDEVICE) | | | - | [5] | - | _____________ | - | | | | - | |----------------| vIOMMU | | - | | | | | - | | | | | - | | [1] | | [4] [2] | - | | ______ | | _____________ ________ | + | [5] [6] | + | _____________ _____________ | + | | | | | | + | |----------------| vIOMMU |<---| vDEVICE |<----| | + | | | | |_____________| | | + | | | | | | + | | [1] | | [4] | [2] | + | | ______ | | _____________ _|______ | | | | | | [3] | | | | | | | | | IOAS |<---|(HWPT_PAGING)|<---| HWPT_NESTED |<--| DEVICE | | | | |______| |_____________| |_____________| |________| | @@ -215,6 +228,15 @@ creating the objects and links:: the vIOMMU object and the HWPT_PAGING, then this vIOMMU object can be u= sed as a nesting parent object to allocate an HWPT_NESTED object described = above. =20 +6. IOMMUFD_OBJ_VDEVICE can be only manually created via the IOMMU_VDEVICE_= ALLOC + uAPI, provided a viommu_id for an iommufd_viommu object and a dev_id fo= r an + iommufd_device object. The vDEVICE object will be the binding between t= hese + two parent objects. Another @virt_id will be also set via the uAPI prov= iding + the iommufd core an index to store the vDEVICE object to a vDEVICE arra= y per + vIOMMU. If necessary, the IOMMU driver may choose to implement a vdevce= _alloc + op to init its HW for virtualization feature related to a vDEVICE. Succ= essful + completion of this operation sets up the linkages between vIOMMU and de= vice. + A device can only bind to an iommufd due to DMA ownership claim and attach= to at most one IOAS object (no support of PASID yet). =20 @@ -228,6 +250,7 @@ User visible objects are backed by following datastruct= ures: - iommufd_hwpt_paging for IOMMUFD_OBJ_HWPT_PAGING. - iommufd_hwpt_nested for IOMMUFD_OBJ_HWPT_NESTED. - iommufd_viommu for IOMMUFD_OBJ_VIOMMU. +- iommufd_vdevice for IOMMUFD_OBJ_VDEVICE. =20 Several terminologies when looking at these datastructures: =20 --=20 2.43.0